Spike, a RISC-V ISA Simulator
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if (VL) {
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if (!h->vf_active()) {
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h->get_ct_state()->vf_pc = XS1 + insn.s_imm();
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for (uint32_t i=0; i<VL; i++)
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h->get_ut_state(i)->run = true;
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}
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mmu_t::insn_fetch_t ut_fetch = p->get_mmu()->load_insn(h->get_ct_state()->vf_pc);
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insn_t ut_insn = ut_fetch.insn.insn;
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bool matched = false;
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#define DECLARE_INSN(name, match, mask) \
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extern reg_t hwacha_##name(processor_t*, insn_t, reg_t); \
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if ((ut_insn.bits() & mask) == match) { \
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h->get_ct_state()->vf_pc = hwacha_##name(p, ut_insn, h->get_ct_state()->vf_pc); \
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matched = true; \
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}
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#include "opcodes_hwacha_ut.h"
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#undef DECLARE_INSN
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// YUNSUP FIXME
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assert(matched);
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// if vf is still running, rewind pc so that it will execute again
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if (h->vf_active())
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npc = pc;
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}
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