riscv-isa-sim/ci-tests/dummy-slliuw.c

#include <stdio.h>

int main() {
  // as if slli.uw zero, t1, 3
  asm(".4byte 0x0833101b");
  printf("Executed successfully\n");
  return 0;
}
workaround to support custom extensions that use standard prefixes RISC-V ISA states (21.1): "A standard-compatible global encoding can also use standard prefixes for non-standard extensions if the associated standard extensions are not included in the global encoding." Currently all the instructions (either from standard or custom extensions) are all being inserted into a single std::vector which is then being sorted. An instruction matching process performs linear search on that vector. The problem is that when a custom extension uses the same opcode as standard one (i.e. match and mask are equal to the standard counterparts) it is undefined which instruction will be picked. That is because in std::sort "The order of equal elements is not guaranteed to be preserved". That being said it is impossible to define custom extension (via customext) that would use the prefix of a disabled standard extension. In this change I separate custom and standard extensions in two separate std::vector's. By default we report an error if they have common elements (There're an additional processor_t constructor's argument that skips this check). If this error is disabled during instruction matching we first trying to find it among custom instructions. If it has been found the search is stopped and custom instruction is executed, otherwise we look for it among standard instructions. Overall this change does not completely fix the problem but at least makes it possible to use the feature of RISC-V ISA. 2 years ago			`#include <stdio.h>`

			`int main() {`
			`// as if slli.uw zero, t1, 3`
			`asm(".4byte 0x0833101b");`
			`printf("Executed successfully\n");`
			`return 0;`
			`}`