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125 lines
3.1 KiB
125 lines
3.1 KiB
#ifndef _ASM_RISCV_CSR_H
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#define _ASM_RISCV_CSR_H
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#include <linux/const.h>
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/* Status register flags */
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#define SR_S _AC(0x00000001,UL) /* Supervisor */
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#define SR_PS _AC(0x00000002,UL) /* Previous supervisor */
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#define SR_EI _AC(0x00000004,UL) /* Enable interrupts */
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#define SR_PEI _AC(0x00000008,UL) /* Previous EI */
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#define SR_EF _AC(0x00000010,UL) /* Enable floating-point */
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#define SR_U64 _AC(0x00000020,UL) /* RV64 user mode */
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#define SR_S64 _AC(0x00000040,UL) /* RV64 supervisor mode */
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#define SR_VM _AC(0x00000080,UL) /* Enable virtual memory */
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#define SR_IM _AC(0x00FF0000,UL) /* Interrupt mask */
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#define SR_IP _AC(0xFF000000,UL) /* Pending interrupts */
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#define SR_IM_SHIFT 16
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#define SR_IM_MASK(n) ((_AC(1,UL)) << ((n) + SR_IM_SHIFT))
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#define EXC_INST_MISALIGNED 0
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#define EXC_INST_ACCESS 1
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#define EXC_SYSCALL 6
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#define EXC_LOAD_MISALIGNED 8
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#define EXC_STORE_MISALIGNED 9
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#define EXC_LOAD_ACCESS 10
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#define EXC_STORE_ACCESS 11
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#ifndef __ASSEMBLY__
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#define CSR_ZIMM(val) \
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(__builtin_constant_p(val) && ((unsigned long)(val) < 0x20))
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#define csr_swap(csr,val) \
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({ \
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typeof(val) __v = (val); \
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if (CSR_ZIMM(__v)) { \
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__asm__ __volatile__ ( \
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"csrrw %0, " #csr ", %1" \
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: "=r" (__v) : "i" (__v)); \
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} else { \
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__asm__ __volatile__ ( \
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"csrrw %0, " #csr ", %1" \
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: "=r" (__v) : "r" (__v)); \
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} \
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__v; \
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})
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#define csr_read(csr) \
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({ \
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register unsigned long __v; \
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__asm__ __volatile__ ( \
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"csrr %0, " #csr : "=r" (__v)); \
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__v; \
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})
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#define csr_write(csr,val) \
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({ \
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typeof(val) __v = (val); \
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if (CSR_ZIMM(__v)) { \
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__asm__ __volatile__ ( \
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"csrw " #csr ", %0" : : "i" (__v)); \
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} else { \
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__asm__ __volatile__ ( \
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"csrw " #csr ", %0" : : "r" (__v)); \
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} \
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})
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#define csr_read_set(csr,val) \
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({ \
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typeof(val) __v = (val); \
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if (CSR_ZIMM(val)) { \
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__asm__ __volatile__ ( \
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"csrrs %0, " #csr ", %1" \
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: "=r" (__v) : "i" (__v)); \
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} else { \
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__asm__ __volatile__ ( \
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"csrrs %0, " #csr ", %1" \
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: "=r" (__v) : "r" (__v)); \
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} \
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__v; \
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})
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#define csr_set(csr,val) \
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({ \
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typeof(val) __v = (val); \
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if (CSR_ZIMM(__v)) { \
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__asm__ __volatile__ ( \
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"csrs " #csr ", %0" : : "i" (__v)); \
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} else { \
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__asm__ __volatile__ ( \
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"csrs " #csr ", %0" : : "r" (__v)); \
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} \
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})
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#define csr_read_clear(csr,val) \
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({ \
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typeof(val) __v = (val); \
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if (CSR_ZIMM(__v)) { \
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__asm__ __volatile__ ( \
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"csrrc %0, " #csr ", %1" \
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: "=r" (__v) : "i" (__v)); \
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} else { \
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__asm__ __volatile__ ( \
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"csrrc %0, " #csr ", %1" \
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: "=r" (__v) : "r" (__v)); \
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} \
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__v; \
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})
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#define csr_clear(csr,val) \
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({ \
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typeof(val) __v = (val); \
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if (CSR_ZIMM(__v)) { \
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__asm__ __volatile__ ( \
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"csrc " #csr ", %0" : : "i" (__v)); \
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} else { \
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__asm__ __volatile__ ( \
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"csrc " #csr ", %0" : : "r" (__v)); \
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} \
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})
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_RISCV_CSR_H */
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