This has the same commits as the previous hash, it's just on the proper
branch now (so it's round-tripped through upstream's trunk). I archived
the old commit.
b66926e93524 RISC-V: Emit "i" suffix for instructions with immediate operands
a2fc54542b66 RISC-V: If -m[no-]strict-align is not passed, assume its value from -mtune
f34a83e82258 RISC-V: Set SLOW_BYTE_ACCESS=1
7dde69e2c5f7 RISC-V: Handle non-legitimate address in riscv_legitimize_move
1751fbe7b9e8 RISC-V: Use "@minus{}2 GB" instead of "-2 GB" in invoke.texi
6d1f1f891869 RISC-V: Document the medlow and medany code models
Much like the recent binutils changes, I've now moved to a different GCC
strategy. We have the following commits right now
d2d1f783b2c1 RISC-V: Correct and improve the "-mabi" documentation
d13dd0242604 RISC-V: Add Sign/Zero extend patterns for PIC loads
341375637a7d RISC-V: Add -mstrict-align option
f47f9c2b3b90 RISC-V: Unify indention in riscv.md
Note that this still fails a handful of the GCC regression tests, so
it's not ready to go yet.
Our previous development flow was to rebase some of our patches on an
upstream binutils release branch, but that's proved to be too much work
to deal with. Instead we're just going to add our patches on top of the
latest binutils release (2.29 in this case). This will be easier for me
to manage, and will more closely match what distributions will be doing
with RISC-V toolchains.
This is also the first clean commit of riscv-binutils-gdb where every
backported branch has landed on upstream's master branch before being
backported.
Here's the full list of patches we have on riscv-binutils-gdb right now.
f64577d1c916 ("RISC-V: Fix disassembly of c.addi4spn, c.addi16sp, c.lui when imm=0")
d51d92c4d06b ("RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2")
3593f7f30f80 ("Fix my previous gas/ChangeLog entry")
164a62116dc9 ("RISC-V: Don't emit 2-byte NOPs if the C extension is disabled")
915b00e356e0 ("RISC-V: Relax RISCV_PCREL_* to RISCV_GPREL_*")
fa753df2d560 ("RISC-V: Add R_RISCV_DELETE, which marks bytes for deletion")
9eb250cb914c ("RISC-V: Mark unsupported gas testcases")
0d96fbb3095f ("riscv: Cache the max alignment of output sections")
60cda8de81dc ("RISC-V: Avoid emitting invalid instructions in mixed RVC/no-RVC code")
296c682e9d92 ("RISC-V: Print an error when unable to align a section")
1bfb4ecbd84c ("RISC-V: Support PCREL_* relocations agaist weak undefined symbols")
d3fae8db583d ("Improve handling of ADD and SUB relocations on the RISCV target.")
404de0666a6a ("RISC-V: Mark "c.nop" as an alias")
dfbf9e44a0e1 ("Fix problems parsing RISCV architecture extenstions in the assembler.")
697d5b8ee280 ("(RISC-V GDB) Only save FPRs on harts that support F/D/Q")
495d737e62c0 ("(RISC-V GDB) GDB update")
c950de297cd7 ("(RISC-V GDB) RISC-V GDB Port")
dd9a28c0966d ("Bump version to 2.29")