Palmer Dabbelt
0da639dbc3
Compile Dhrystone with multiple GCC runs
This doesn't actually make a difference because we had some pragmas in
there to avoid badness, but this sets a better example.
9 years ago
Palmer Dabbelt
36c9832aa7
Ensure we don't regress in Dhrystone dynamic instruction count
I haven't actually gone and made sure these numbers are good yet, but
this at least automates getting the numbers.
9 years ago
Palmer Dabbelt
959536e4ff
Allow tests to pass special QEMU arguments
9 years ago
Palmer Dabbelt
23e0cd0ad0
Split the glibc and newlib multilib names in the Makefile
9 years ago
Andrew Waterman
829f362368
Bump gcc for block-move support ( #277 )
9 years ago
Palmer Dabbelt
dc3df8619f
Merge pull request #276 from riscv/disable-gdb
Add a "--disable-gdb" argument
9 years ago
Palmer Dabbelt
9d284915bf
Add a "--disable-gdb" argument
9 years ago
Palmer Dabbelt
06b1ebbe4b
Merge pull request #275 from riscv/new-failures
Whitelist new failures
9 years ago
Palmer Dabbelt
f505a68c4b
Whitelist some failing gfortran tests
These appear to be real test failures, but I don't have time to deal
with them right now.
9 years ago
Palmer Dabbelt
6f0f463735
Allow multiple test whitelists to be used
9 years ago
Palmer Dabbelt
d99c12ffc4
Merge pull request #273 from riscv/gdb-testsuite
Add gdb testsuite
9 years ago
Kito Cheng
8437b3d0b4
Add gdb testsuite
9 years ago
Andrew Waterman
2a70a41448
Add comments explaining why fortran tests fail ( #272 )
9 years ago
Palmer Dabbelt
1a74ccbe5e
Merge pull request #269 from riscv/glibc-2.26
Move to glibc-2.26, and the latest Linux headers (riscv-for-submissio…
9 years ago
Palmer Dabbelt
f115df2adc
Merge pull request #270 from riscv/status-image
Add travis-ci status image in README.md
9 years ago
Kito Cheng
c8b1b7f11b
Add travis-ci status image in README.md
9 years ago
Palmer Dabbelt
bff4ec01e9
Move to glibc-2.26, and the latest Linux headers (riscv-for-submission-v7)
I'm trying to get all our ports up to date with the latest stable
versions, just for my own sanity. This handles glibc, but pushes Linux
a bit past what's currently stable.
9 years ago
Palmer Dabbelt
e88aaa6f56
Merge pull request #268 from riscv/regression
Run the GCC test suite on Travis
9 years ago
Palmer Dabbelt
2d9011b8bd
Run the GCC test suite on Travis
I don't run any multilib tests here because they take too long for
Travis.
9 years ago
Palmer Dabbelt
3456b66f69
Add a "make report" phony target
This builds everything, runs the test suites, and then diffs against the
whitelists to make sure there aren't any new failures.
9 years ago
Palmer Dabbelt
5dafe66916
Whitelist the current set of test failures
I haven't actually done my due diligance here to ensure this is the
minimal set of test failures.
9 years ago
Palmer Dabbelt
daa0c7f5c5
Run the GCC test suite on all the multilibs
9 years ago
Palmer Dabbelt
d0f8935bfa
Always set the multilib list
9 years ago
Palmer Dabbelt
e62c25a779
Automate building QEMU
We need QEMU to run the test suite. This patch automates the build so
I don't need to keep remembering how to do it by hand.
9 years ago
Palmer Dabbelt
b40950d657
Link all the QEMU wrapper scripts together
9 years ago
Palmer Dabbelt
65cb174d37
Merge pull request #265 from riscv/weak_undef
Bump binutils
9 years ago
Palmer Dabbelt
b9b77d2320
Bump binutils
5852e73c72db RISC-V: Support PCREL_* relocations agaist weak undefined symbols
9 years ago
Palmer Dabbelt
c7fb15341e
Move back to the stable binutils release
9 years ago
Andrew Waterman
7603a43814
bump binutils
9 years ago
Yunsup Lee
8b0f2c8ef3
Merge pull request #262 from riscv/rvc-norvc
bump binutils, to allow mixing RVC and no-RVC
9 years ago
Palmer Dabbelt
8d74bf8eeb
bump binutils, to allow mixing RVC and no-RVC
* 0419befe6f92 (WIP) RISC-V: Provide better disassembly of alignment
sequences
* 160ba91886e3 (WIP) objdump: Provide the found reloc to the disassembler
* 779cd1f46451 (WIP) RISC-V: Avoid emitting invalid instructions in mixed
RVC/no-RVC code
* ceef952725fb (WIP) RISC-V: Print an error when unable to align a section
9 years ago
Palmer Dabbelt
38d4b1adf5
Merge pull request #258 from riscv/rtems
Allow users to override the tuples
9 years ago
Palmer Dabbelt
725eca001e
Merge pull request #256 from riscv/gc
The default ISA is GC
9 years ago
Palmer Dabbelt
4c354cd1e7
Allow users to override the tuples
A user just added RTEMS support to the GCC port (via newlib), which is
very similar to the existing newlib port but has a different tuple.
This patch allows users to override the tuples to build other targets if
they want to.
9 years ago
Palmer Dabbelt
b7e00039e1
The default ISA is GC
9 years ago
Palmer Dabbelt
f5fae1c27b
Merge pull request #247 from kyrias/with-guile
Add support for --with-guile configure flag
9 years ago
Palmer Dabbelt
d1bd763d17
Merge pull request #246 from kito-cheng/master
Bump newlib to 2.5
9 years ago
Johannes Löthberg
b49d20837e
Add support for --with-guile configure flag
And re-run autoreconf to generate the configure script.
Signed-off-by: Johannes Löthberg <johannes@kyriasis.com>
9 years ago
Kito Cheng
8be713a48e
Bump newlib to 2.5
9 years ago
Palmer Dabbelt
dcda255e1f
Bump GCC, for an ICE fix
16210e6 RISC-V: Handle non-legitimate address in riscv_legitimize_move
9 years ago
Andrew Waterman
87fdf4305d
Factor out tuples in Makefile
This makes it easier to use this repo to build other toolchains,
as I occasionally want to do.
9 years ago
Palmer Dabbelt
a71fc53985
Don't require sudo on Travis
I'm hoping this will speed up our builds a bit, as we'll no longer be
executing in a VM but instead in a container.
9 years ago
Palmer Dabbelt
8b464a814a
Download the GCC prereq libraries, even when using submodules
9 years ago
Palmer Dabbelt
c9c612ba70
Bump gcc
ff03ebe RISC-V: Add Sign/Zero extend patterns for PIC loads
2fe94d5 RISC-V: Add -mstrict-align option
f9771ad RISC-V: Unify indention in riscv.md
9 years ago
Palmer Dabbelt
3b6c8747ab
Bump binutils
RISC-V: Fix disassemble for c.li, c.andi and c.addiw
9 years ago
Palmer Dabbelt
4e51f2641f
Merge pull request #237 from riscv/bumps
Update binutils and glibc
9 years ago
Palmer Dabbelt
4b0a9f97c8
Bump glibc, for a __global_pointer$ change
* RISC-V: Prohibit relaxing the initial gp generation
9 years ago
Palmer Dabbelt
5dac17852d
Bump binutils, for a host of backports
* RISC-V: Change CALL macro to use ra as the temporary address register
* RISC-V: Allow 32-bit BFD to handle 64-bit objects
* RISC-V: Resurrect GP-relative disassembly hints
* RISC-V/bfd: Hook elf_backend_object_p to set the mach type.
9 years ago
Palmer Dabbelt
19ddd4d6f4
Merge pull request #233 from riscv/zlib
Allow users to flip "--with-system-zlib"
9 years ago
Palmer Dabbelt
43a55a8eb0
Allow the user to flip "--with-system-zlib"
We need this to have different polarity for different platforms (Windows
vs RedHat). I don't know how to autodetect this for now, so I'm just
doing it manually.
9 years ago