diff --git a/gcc/libgcc/config/riscv/mul.S b/gcc/libgcc/config/riscv/muldi3.S
similarity index 100%
rename from gcc/libgcc/config/riscv/mul.S
rename to gcc/libgcc/config/riscv/muldi3.S
diff --git a/gcc/libgcc/config/riscv/multi3.S b/gcc/libgcc/config/riscv/multi3.S
new file mode 100644
index 00000000..849951ef
--- /dev/null
+++ b/gcc/libgcc/config/riscv/multi3.S
@@ -0,0 +1,56 @@
+  .text
+  .align 2
+
+#ifndef __riscv64
+/* Our RV64 64-bit routines are equivalent to our RV32 32-bit routines.  */
+# define __multi3 __muldi3
+#endif
+
+  .globl __multi3
+__multi3:
+
+#ifndef __riscv64
+/* Our RV64 64-bit routines are equivalent to our RV32 32-bit routines.  */
+# define __muldi3 __mulsi3
+#endif
+
+/* We rely on the fact that __muldi3 doesn't clobber the t-registers.  */
+
+  mv  t0, ra
+  mv  t5, a0
+  mv  a0, a1
+  mv  t6, a3
+  mv  a1, t5
+  mv  a4, a2
+  li  a5, 0
+  li  t2, 0
+  li  t4, 0
+.L1:
+  add  a6, t2, a1
+  andi t3, a4, 1
+  slli a7, a5, 1
+  slti t1, a1, 0
+  srli a4, a4, 1
+  add  a5, t4, a5
+  beqz t3, .L2
+  sltu t3, a6, t2
+  mv   t2, a6
+  add  t4, t3, a5
+.L2:
+  slli a1, a1, 1
+  or   a5, t1, a7
+  bnez a4, .L1
+  beqz a0, .L3
+  mv   a1, a2
+  call __muldi3
+  add  t4, t4, a0
+.L3:
+  beqz t6, .L4
+  mv   a1, t6
+  mv   a0, t5
+  call  __muldi3
+  add  t4, t4, a0
+.L4:
+  mv  a0, t2
+  mv  a1, t4
+  jr  t0
diff --git a/gcc/libgcc/config/riscv/t-elf b/gcc/libgcc/config/riscv/t-elf
index 7b5800f5..0b88cdfc 100644
--- a/gcc/libgcc/config/riscv/t-elf
+++ b/gcc/libgcc/config/riscv/t-elf
@@ -1,4 +1,5 @@
 LIB2ADD += $(srcdir)/config/riscv/riscv-fp.c \
 	   $(srcdir)/config/riscv/save-restore.S \
-	   $(srcdir)/config/riscv/mul.S \
+	   $(srcdir)/config/riscv/muldi3.S \
+	   $(srcdir)/config/riscv/multi3.S \
 	   $(srcdir)/config/riscv/div.S
diff --git a/gcc/libgcc/config/riscv/t-elf32 b/gcc/libgcc/config/riscv/t-elf32
index 3eed9ac5..83363ce6 100644
--- a/gcc/libgcc/config/riscv/t-elf32
+++ b/gcc/libgcc/config/riscv/t-elf32
@@ -1,2 +1,4 @@
+LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _udivsi3 _umodsi3 _mulsi3 _muldi3
+
 HOST_LIBGCC2_CFLAGS += -m32
 CRTSTUFF_CFLAGS += -m32
diff --git a/gcc/libgcc/config/riscv/t-elf64 b/gcc/libgcc/config/riscv/t-elf64
new file mode 100644
index 00000000..9ba53013
--- /dev/null
+++ b/gcc/libgcc/config/riscv/t-elf64
@@ -0,0 +1,2 @@
+LIB2FUNCS_EXCLUDE += _divdi3 _moddi3 _udivdi3 _umoddi3 _muldi3 _multi3 \
+		     _divsi3 _modsi3 _udivsi3 _umodsi3 \
diff --git a/patches/gcc b/patches/gcc
index 5561fd19..b845b643 100644
--- a/patches/gcc
+++ b/patches/gcc
@@ -23,7 +23,7 @@
  rs6000*-*-*)
  	extra_options="${extra_options} g.opt fused-madd.opt rs6000/rs6000-tables.opt"
  	;;
-@@ -1976,6 +1980,34 @@ microblaze*-*-elf)
+@@ -1982,6 +1986,34 @@ microblaze*-*-elf)
  	cxx_target_objs="${cxx_target_objs} microblaze-c.o"
  	tmake_file="${tmake_file} microblaze/t-microblaze"
          ;;
@@ -58,7 +58,7 @@
  mips*-*-netbsd*)			# NetBSD/mips, either endian.
  	target_cpu_default="MASK_ABICALLS"
  	tm_file="elfos.h ${tm_file} mips/elf.h netbsd.h netbsd-elf.h mips/netbsd.h"
-@@ -3860,6 +3892,31 @@ case "${target}" in
+@@ -3866,6 +3898,31 @@ case "${target}" in
  		done
  		;;
  
@@ -213,7 +213,7 @@
  sparc64*-*-*)
  	cpu_type=sparc
  	;;
-@@ -1059,6 +1062,18 @@ powerpcle-*-eabi*)
+@@ -1064,6 +1067,22 @@ powerpcle-*-eabi*)
  	tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-crtstuff t-crtstuff-pic t-fdpbit"
  	extra_parts="$extra_parts crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o ecrti.o ecrtn.o ncrti.o ncrtn.o"
  	;;
@@ -222,11 +222,15 @@
 +	extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o crtendS.o crtbeginT.o"
 +	;;
 +riscv*-*-linux*)
-+	tmake_file="${tmake_file} riscv/t-fpbit riscv/t-dpbit riscv/t-tpbit riscv/t-elf"
++	tmake_file="${tmake_file} riscv/t-fpbit riscv/t-dpbit riscv/t-tpbit riscv/t-elf riscv/t-elf64"
 +	extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o crtendS.o crtbeginT.o"
 +	;;
++riscv32*-*-*)
++	tmake_file="${tmake_file} riscv/t-fpbit riscv/t-dpbit riscv/t-elf riscv/t-elf32"
++	extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o"
++	;;
 +riscv*-*-*)
-+	tmake_file="${tmake_file} riscv/t-fpbit riscv/t-dpbit riscv/t-elf"
++	tmake_file="${tmake_file} riscv/t-fpbit riscv/t-dpbit riscv/t-elf riscv/t-elf64"
 +	extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o"
 +	;;
  rs6000-ibm-aix4.[3456789]* | powerpc-ibm-aix4.[3456789]*)