diff --git a/gcc/gcc/config/riscv/sync.md b/gcc/gcc/config/riscv/sync.md
index e8c9a7a9..576e84db 100644
--- a/gcc/gcc/config/riscv/sync.md
+++ b/gcc/gcc/config/riscv/sync.md
@@ -52,7 +52,9 @@
    (match_operand:SI 1 "const_int_operand" "")] ;; model
   ""
 {
-  switch (INTVAL (operands[1]))
+  long model = INTVAL (operands[1]);
+
+  switch (model)
     {
     case MEMMODEL_SEQ_CST:
     case MEMMODEL_SYNC_SEQ_CST:
@@ -66,6 +68,7 @@
     case MEMMODEL_SYNC_RELEASE:
       return "fence rw,w";
     default:
+      fprintf(stderr, "mem_thread_fence_1(%ld)\n", model);
       gcc_unreachable();
     }
 })