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Merge branch 'riscv-collab:master' into master

pull/1063/head
Shao-Ce SUN 4 years ago
committed by GitHub
parent
commit
5f3d3f66bc
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
  1. 8
      .gitmodules
  2. 40
      Makefile.in
  3. 11
      README.md
  4. 87
      configure
  5. 27
      configure.ac
  6. 1
      pk
  7. 2
      qemu
  8. 144
      scripts/march-to-cpu-opt
  9. 2
      scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run
  10. 4
      scripts/wrapper/spike/riscv64-unknown-linux-gnu-run
  11. 1
      spike

8
.gitmodules

@ -28,3 +28,11 @@
path = musl
url = git://git.musl-libc.org/musl
branch = master
[submodule "spike"]
path = spike
url = https://github.com/riscv-software-src/riscv-isa-sim.git
branch = master
[submodule "pk"]
path = pk
url = https://github.com/riscv-software-src/riscv-pk.git
branch = master

40
Makefile.in

@ -10,12 +10,10 @@ MUSL_SRCDIR := @with_musl_src@
LINUX_HEADERS_SRCDIR := @with_linux_headers_src@
GDB_SRCDIR := @with_gdb_src@
QEMU_SRCDIR := @with_qemu_src@
SPIKE_SRCDIR := @with_spike_src@
PK_SRCDIR := @with_pk_src@
SIM:=qemu
# Default branch for proxy kernel and spike
SPIKE_BRANCH:=master
PK_BRANCH:=master
SIM ?= @WITH_SIM@
ifeq ($(srcdir)/riscv-gcc,$(GCC_SRCDIR))
# We need a relative source dir for the gcc configure, to make msys2 mingw64
@ -36,6 +34,7 @@ WITH_TUNE ?= @WITH_TUNE@
WITH_ISA_SPEC ?= @WITH_ISA_SPEC@
SYSROOT := $(INSTALL_DIR)/sysroot
ENABLE_LIBSANITIZER ?= @enable_libsanitizer@
QEMU_TARGETS ?= @qemu_targets@
SHELL := /bin/sh
AWK := @GAWK@
@ -172,14 +171,15 @@ report-gdb: report-gdb-@default_target@
.PHONY: build-sim
ifeq ($(SIM),qemu)
QEMU_CPU=$(shell $(srcdir)/scripts/march-to-cpu-opt $(WITH_ARCH))
SIM_PATH:=$(srcdir)/scripts/wrapper/qemu
SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" RISC_V_SYSROOT="$(SYSROOT)"
SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" RISC_V_SYSROOT="$(SYSROOT)" QEMU_CPU="$(QEMU_CPU)"
SIM_STAMP:= stamps/build-qemu
else
ifeq ($(SIM),spike)
# Using spike simulator.
SIM_PATH:=$(srcdir)/scripts/wrapper/spike
SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" PK_PATH="$(INSTALL_DIR)/$(NEWLIB_TUPLE)/bin/"
SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" PK_PATH="$(INSTALL_DIR)/$(NEWLIB_TUPLE)/bin/" ARCH_STR="$(WITH_ARCH)"
SIM_STAMP:= stamps/build-spike
ifneq (,$(findstring rv32,$(NEWLIB_MULTILIB_NAMES)))
SIM_STAMP+= stamps/build-pk32
@ -258,6 +258,12 @@ else
QEMU_SRC_GIT :=
endif
ifeq ($(findstring $(srcdir),$(SPIKE_SRCDIR)),$(srcdir))
SPIKE_SRC_GIT := $(SPIKE_SRCDIR)/.git
else
SPIKE_SRC_GIT :=
endif
ifneq ("$(wildcard $(GCC_SRCDIR)/.git)","")
GCCPKGVER := g$(shell git -C $(GCC_SRCDIR) describe --always --dirty --exclude '*')
else
@ -803,26 +809,20 @@ stamps/build-gcc-musl-stage2: $(GCC_SRCDIR) $(GCC_SRC_GIT) stamps/build-musl-lin
cp -a $(INSTALL_DIR)/$(MUSL_TUPLE)/lib* $(SYSROOT)
mkdir -p $(dir $@) && touch $@
spike-src:
git clone https://github.com/riscv/riscv-isa-sim.git -b $(SPIKE_BRANCH) $@
pk-src:
git clone https://github.com/riscv/riscv-pk.git -b $(PK_BRANCH) $@
stamps/build-spike: spike-src
stamps/build-spike: $(SPIKE_SRCDIR) $(SPIKE_SRC_GIT)
rm -rf $@ $(notdir $@)
mkdir $(notdir $@)
cd $(notdir $@) && ../$</configure \
cd $(notdir $@) && $</configure \
--prefix=$(INSTALL_DIR)
$(MAKE) -C $(notdir $@)
$(MAKE) -C $(notdir $@) install
mkdir -p $(dir $@)
date > $@
stamps/build-pk32: pk-src stamps/build-gcc-newlib-stage2
stamps/build-pk32: $(PK_SRCDIR) stamps/build-gcc-newlib-stage2
rm -rf $@ $(notdir $@)
mkdir $(notdir $@)
cd $(notdir $@) && ../$</configure \
cd $(notdir $@) && $</configure \
--prefix=$(INSTALL_DIR) \
--host=$(NEWLIB_TUPLE) \
--with-arch=rv32gc
@ -831,10 +831,10 @@ stamps/build-pk32: pk-src stamps/build-gcc-newlib-stage2
mkdir -p $(dir $@)
date > $@
stamps/build-pk64: pk-src stamps/build-gcc-newlib-stage2
stamps/build-pk64: $(PK_SRCDIR) stamps/build-gcc-newlib-stage2
rm -rf $@ $(notdir $@)
mkdir $(notdir $@)
cd $(notdir $@) && ../$</configure \
cd $(notdir $@) && $</configure \
--prefix=$(INSTALL_DIR) \
--host=$(NEWLIB_TUPLE) \
--with-arch=rv64gc
@ -848,7 +848,7 @@ stamps/build-qemu: $(QEMU_SRCDIR) $(QEMU_SRC_GIT)
mkdir $(notdir $@)
cd $(notdir $@) && $</configure \
--prefix=$(INSTALL_DIR) \
--target-list=riscv64-linux-user,riscv32-linux-user \
--target-list=$(QEMU_TARGETS) \
--interp-prefix=$(INSTALL_DIR)/sysroot \
--python=python3
$(MAKE) -C $(notdir $@)

11
README.md

@ -189,8 +189,9 @@ rv64imac with lp64 and rv64imafc with lp64 will reuse this multi-lib set.
The Dejagnu test suite has been ported to RISC-V. This can be run with a
simulator for the elf and linux toolchains. The simulator can be selected
by the SIM variable in the Makefile, e.g. SIM=qemu, SIM=gdb, or SIM=spike
(experimental). However, the testsuite allowlist is only mintained for qemu.
Other simulators might get extra failures.
(experimental).In addition, the simulator can also be selected with the
configure time option `--with-sim=`.However, the testsuite allowlist is
only mintained for qemu.Other simulators might get extra failures.
To test GCC, run the following commands:
./configure --prefix=$RISCV --disable-linux --with-arch=rv64ima # or --with-arch=rv32ima
@ -201,6 +202,10 @@ To test GCC, run the following commands:
make linux
make report-linux SIM=qemu # Run with qemu
./configure --prefix=$RISCV --with-sim=spike
make linux
make report # Run with spike
Note:
- spike only support rv64* bare-metal/elf toolchain.
- gdb simulator only support bare-metal/elf toolchain.
@ -263,3 +268,5 @@ Here is the list of configure option for specify source tree:
--with-gdb-src
--with-linux-headers-src
--with-qemu-src
--with-spike-src
--with-pk-src

87
configure

@ -584,8 +584,11 @@ PACKAGE_URL=''
ac_subst_vars='LTLIBOBJS
LIBOBJS
with_linux_headers_src
qemu_targets
enable_libsanitizer
with_linux_headers_src
with_pk_src
with_spike_src
with_qemu_src
with_gdb_src
with_musl_src
@ -606,6 +609,7 @@ newlib_multilib_names
glibc_multilib_names
multilib_flags
multilib_gen
WITH_SIM
WITH_ISA_SPEC
WITH_TUNE
WITH_ABI
@ -675,6 +679,7 @@ with_arch
with_abi
with_tune
with_isa_spec
with_sim
enable_multilib
with_multilib_generator
enable_gcc_checking
@ -692,8 +697,11 @@ with_glibc_src
with_musl_src
with_gdb_src
with_qemu_src
with_spike_src
with_pk_src
with_linux_headers_src
enable_libsanitizer
enable_qemu_system
'
ac_precious_vars='build_alias
host_alias
@ -1332,6 +1340,7 @@ Optional Features:
[--disable-gcc-checking]
--disable-gdb Don't build GDB, as it's not upstream
--enable-libsanitizer Build libsanitizer, which only supports rv64
--enable-qemu-system Build qemu with system-mode emulation
Optional Packages:
--with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
@ -1341,6 +1350,7 @@ Optional Packages:
--with-tune=rocket Set the base RISC-V CPU, defaults to rocket
--with-isa-spec=2.2 Set the default ISA spec version, default to 2.2,
available options: 2.2, 20190608, 20191213
--with-sim=qemu Sets the base RISC-V Simulator, defaults to qemu
--with-multilib-generator
Multi-libs configuration string, only supported for
bare-metal/elf toolchain, this option implied
@ -1363,6 +1373,8 @@ Optional Packages:
--with-musl-src Set musl source path, use builtin source by default
--with-gdb-src Set gdb source path, use builtin source by default
--with-qemu-src Set qemu source path, use builtin source by default
--with-spike-src Set spike source path, use builtin source by default
--with-pk-src Set pk source path, use builtin source by default
--with-linux-headers-src
Set linux-headers source path, use builtin source by
default
@ -3319,6 +3331,16 @@ else
fi
# Check whether --with-sim was given.
if test "${with_sim+set}" = set; then :
withval=$with_sim;
else
with_sim=qemu
fi
if test "x$with_abi" = xdefault; then :
case $with_arch in #(
*rv64g* | *rv64*d*) :
@ -3349,6 +3371,8 @@ WITH_TUNE=--with-tune=$with_tune
WITH_ISA_SPEC=--with-isa-spec=$with_isa_spec
WITH_SIM=$with_sim
# Check whether --enable-multilib was given.
if test "${enable_multilib+set}" = set; then :
@ -3664,6 +3688,44 @@ fi
else
with_qemu_src="\$(srcdir)/qemu"
fi
}
{
# Check whether --with-spike-src was given.
if test "${with_spike_src+set}" = set; then :
withval=$with_spike_src;
else
with_spike_src=default
fi
if test "x$with_spike_src" != xdefault; then :
with_spike_src=$with_spike_src
else
with_spike_src="\$(srcdir)/spike"
fi
}
{
# Check whether --with-pk-src was given.
if test "${with_pk_src+set}" = set; then :
withval=$with_pk_src;
else
with_pk_src=default
fi
if test "x$with_pk_src" != xdefault; then :
with_pk_src=$with_pk_src
else
with_pk_src="\$(srcdir)/pk"
fi
}
@ -3678,6 +3740,14 @@ else
fi
if test "x$with_linux_headers_src" != xdefault; then :
with_linux_headers_src=$with_linux_headers_src
else
with_linux_headers_src="\$(srcdir)/linux-headers/include"
fi
# Check whether --enable-libsanitizer was given.
if test "${enable_libsanitizer+set}" = set; then :
enableval=$enable_libsanitizer;
@ -3695,11 +3765,20 @@ else
fi
if test "x$with_linux_headers_src" != xdefault; then :
with_linux_headers_src=$with_linux_headers_src
# Check whether --enable-qemu_system was given.
if test "${enable_qemu_system+set}" = set; then :
enableval=$enable_qemu_system;
else
enable_qemu_system=no
fi
if test "x$enable_qemu_system" != xno; then :
qemu_targets=riscv64-linux-user,riscv32-linux-user,riscv64-softmmu,riscv32-softmmu
else
with_linux_headers_src="\$(srcdir)/linux-headers/include"
qemu_targets=riscv64-linux-user,riscv32-linux-user
fi

27
configure.ac

@ -78,6 +78,13 @@ AC_ARG_WITH(isa-spec,
[with_isa_spec=2.2]
)
AC_ARG_WITH(sim,
[AS_HELP_STRING([--with-sim=qemu],
[Sets the base RISC-V Simulator, defaults to qemu])],
[],
[with_sim=qemu]
)
AS_IF([test "x$with_abi" = xdefault],
[AS_CASE([$with_arch],
[*rv64g* | *rv64*d*], [with_abi=lp64d],
@ -94,6 +101,7 @@ AC_SUBST(WITH_ARCH, --with-arch=$with_arch)
AC_SUBST(WITH_ABI, --with-abi=$with_abi)
AC_SUBST(WITH_TUNE, --with-tune=$with_tune)
AC_SUBST(WITH_ISA_SPEC, --with-isa-spec=$with_isa_spec)
AC_SUBST(WITH_SIM, $with_sim)
AC_ARG_ENABLE(multilib,
[AS_HELP_STRING([--enable-multilib],
@ -234,6 +242,8 @@ AX_ARG_WITH_SRC(glibc, glibc)
AX_ARG_WITH_SRC(musl, musl)
AX_ARG_WITH_SRC(gdb, riscv-gdb)
AX_ARG_WITH_SRC(qemu, qemu)
AX_ARG_WITH_SRC(spike, spike)
AX_ARG_WITH_SRC(pk, pk)
AC_ARG_WITH(linux-headers-src,
[AC_HELP_STRING([--with-linux-headers-src],
@ -242,6 +252,10 @@ AC_ARG_WITH(linux-headers-src,
[with_linux_headers_src=default]
)
AS_IF([test "x$with_linux_headers_src" != xdefault],
[AC_SUBST(with_linux_headers_src,$with_linux_headers_src)],
[AC_SUBST(with_linux_headers_src,"\$(srcdir)/linux-headers/include")])
AC_ARG_ENABLE(libsanitizer,
[AS_HELP_STRING([--enable-libsanitizer],
[Build libsanitizer, which only supports rv64])],
@ -253,8 +267,15 @@ AS_IF([test "x$enable_libsanitizer" != xno],
[AC_SUBST(enable_libsanitizer, --enable-libsanitizer)],
[AC_SUBST(enable_libsanitizer, --disable-libsanitizer)])
AS_IF([test "x$with_linux_headers_src" != xdefault],
[AC_SUBST(with_linux_headers_src,$with_linux_headers_src)],
[AC_SUBST(with_linux_headers_src,"\$(srcdir)/linux-headers/include")])
AC_ARG_ENABLE(qemu_system,
[AS_HELP_STRING([--enable-qemu-system],
[Build qemu with system-mode emulation])],
[],
[enable_qemu_system=no]
)
AS_IF([test "x$enable_qemu_system" != xno],
[AC_SUBST(qemu_targets, [riscv64-linux-user,riscv32-linux-user,riscv64-softmmu,riscv32-softmmu])],
[AC_SUBST(qemu_targets, [riscv64-linux-user,riscv32-linux-user])])
AC_OUTPUT

1
pk

@ -0,0 +1 @@
Subproject commit 2efabd3e6604b8a9e8f70baf52f57696680c7855

2
qemu

@ -1 +1 @@
Subproject commit 553032db17440f8de011390e5a1cfddd13751b0b
Subproject commit 823a3f11fb8f04c3c3cc0f95f968fef1bfc6534f

144
scripts/march-to-cpu-opt

@ -0,0 +1,144 @@
#!/usr/bin/python3
import argparse
import sys
EXT_OPTS = {
"zba": "zba=true",
"zbb": "zbb=true",
"zbc": "zbc=true",
"zbs": "zbs=true",
"v": "v=true",
"zve32f": "Zve32f=true",
"zve64f": "Zve64f=true",
"zfh": "Zfh=true",
"zfhmin": "Zfhmin=true",
}
SUPPORTTED_EXTS = "iemafdcbvph"
MC_EXT_PREFIX = "zsx"
def parse_opt(argv):
parser = argparse.ArgumentParser()
parser.add_argument('-march', '--with-arch', type=str, dest='march')
parser.add_argument('-selftest', action='store_true')
opt = parser.parse_args()
return opt
def parse_mc_ext(ext_str, idx):
end_idx = ext_str[idx+1:].find('_')
if end_idx == -1:
end_idx = len(ext_str)
else:
end_idx = end_idx + idx + 1
major = 0
minor = 0
version_begin_idx = end_idx
if ext_str[end_idx-1].isdigit():
# This ext is come with version.
v_idx = end_idx - 1
while (ext_str[v_idx].isdigit()) and v_idx > idx:
v_idx -= 1
major = int(ext_str[v_idx+1:end_idx])
version_begin_idx = v_idx+1
if (ext_str[v_idx] == 'p'):
minor = major
major_v_idx = v_idx - 1
while (ext_str[major_v_idx].isdigit()) and major_v_idx > idx:
major_v_idx -= 1
major = int(ext_str[major_v_idx+1:v_idx])
version_begin_idx = major_v_idx+1
return end_idx, ext_str[idx:version_begin_idx], major, minor
def parse_version(ext_str, idx):
major = 2
minor = 0
strlen = len(ext_str)
end_idx = idx + 1
if idx+1 < strlen and ext_str[idx+1].isdigit():
v_idx = idx + 1
while v_idx < strlen and (ext_str[v_idx].isdigit()):
v_idx += 1
major = int(ext_str[idx+1:v_idx])
end_idx = v_idx
if (ext_str[v_idx] == 'p'):
minor_v_idx = v_idx + 1
while minor_v_idx < strlen and (ext_str[minor_v_idx].isdigit()):
minor_v_idx += 1
minor = int(ext_str[v_idx+1:minor_v_idx])
end_idx = minor_v_idx
return end_idx, ext_str[idx], major, minor
def parse_march(march):
if len(march) < 5:
return None
march = march.replace("rv64g", "rv64imafd").replace("rv32g", "rv32imafd")
if march[0:5] not in ['rv64i', 'rv32i', 'rv32e']:
print (march[0:5])
return None
ext_str = march[4:]
idx = 0
extstrlens = len(ext_str)
exts = dict()
while idx < extstrlens:
if ext_str[idx] in SUPPORTTED_EXTS:
idx, ext_name, major, minor = parse_version(ext_str, idx)
elif ext_str[idx] in MC_EXT_PREFIX:
idx, ext_name, major, minor = parse_mc_ext(ext_str, idx)
elif ext_str[idx] == '_':
idx = idx + 1
continue
else:
raise Exception("Unrecognized ext : `%s`, %s" %
(ext_str[idx], ext_str))
exts[ext_name] = (major, minor)
return exts
def get_vlen(ext_dict):
vlen = 0
for ext in ext_dict.keys():
if ext == 'v':
vlen = max(vlen, 128)
elif (ext.startswith('zvl') and ext[-1] == 'b'):
zvlen = int(arch[3:-1])
vlen = max(vlen, zvlen)
elif ext.startswith("zve"):
zvelen = int(arch[3:-1])
vlen = max(vlen, zvelen)
return vlen
def conver_arch_to_qemu_cpu_opt(march):
if len(march) < 5:
return None
ext_dict = parse_march(march)
cpu_opt = []
cpu_opt.append(march[0:4]) # rv32 or rv64
vlen = get_vlen(ext_dict)
if vlen != 0:
cpu_opt.append("vlen=%d" % vlen)
for ext in ext_dict.keys():
if ext in EXT_OPTS:
cpu_opt.append(EXT_OPTS[ext])
return ",".join(cpu_opt)
def selftest():
print(parse_march("rv64gc"))
def main(argv):
opt = parse_opt(argv)
if opt.selftest:
selftest()
return 0
cpu_opt = conver_arch_to_qemu_cpu_opt(opt.march)
print (cpu_opt)
if __name__ == '__main__':
sys.exit(main(sys.argv))

2
scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run

@ -12,4 +12,4 @@ done
xlen="$(readelf -h $1 | grep 'Class' | cut -d: -f 2 | xargs echo | sed 's/^ELF//')"
qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} "$@"
QEMU_CPU=${QEMU_CPU} qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} "$@"

4
scripts/wrapper/spike/riscv64-unknown-linux-gnu-run

@ -1,7 +1,7 @@
#!/bin/sh
xlen="$(readelf -h $1 | grep 'Class' | cut -d: -f 2 | xargs echo | sed 's/^ELF//')"
arch="${ARCH_STR#*=}"
spike \
--isa=RV${xlen}GC \
--isa=${arch} \
${PK_PATH}/pk${xlen} "$@"

1
spike

@ -0,0 +1 @@
Subproject commit a0298a33e7b2091ba8d9f3a20838d96dc1164cac
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