diff --git a/gcc/gcc/common/config/riscv/riscv-common.c b/gcc/gcc/common/config/riscv/riscv-common.c
index 7fde69ad..2186b2bd 100644
--- a/gcc/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/gcc/common/config/riscv/riscv-common.c
@@ -72,6 +72,10 @@ riscv_parse_arch_string (const char *isa, int *flags)
       return;
     }
 
+  *flags &= ~MASK_RVC;
+  if (*p == 'C')
+    *flags |= MASK_RVC, p++;
+
   if (*p)
     {
       error ("-march=%s: unsupported ISA substring %s", isa, p);
diff --git a/gcc/gcc/config/riscv/riscv.h b/gcc/gcc/config/riscv/riscv.h
index 3de70b5e..2026b714 100644
--- a/gcc/gcc/config/riscv/riscv.h
+++ b/gcc/gcc/config/riscv/riscv.h
@@ -168,6 +168,7 @@ along with GCC; see the file COPYING3.  If not see
 #define ASM_SPEC "\
 %(subtarget_asm_debugging_spec) \
 %{m32} %{m64} %{!m32:%{!m64: %(asm_abi_default_spec)}} \
+%{mrvc} \
 %{fPIC|fpic|fPIE|fpie:-fpic} \
 %{march=*} \
 %(subtarget_asm_spec)"
@@ -285,7 +286,7 @@ along with GCC; see the file COPYING3.  If not see
 #define PARM_BOUNDARY BITS_PER_WORD
 
 /* Allocation boundary (in *bits*) for the code of a function.  */
-#define FUNCTION_BOUNDARY 32
+#define FUNCTION_BOUNDARY (TARGET_RVC ? 16 : 32)
 
 /* There is no point aligning anything to a rounder boundary than this.  */
 #define BIGGEST_ALIGNMENT 128
diff --git a/gcc/gcc/config/riscv/riscv.opt b/gcc/gcc/config/riscv/riscv.opt
index b374a42c..e5489354 100644
--- a/gcc/gcc/config/riscv/riscv.opt
+++ b/gcc/gcc/config/riscv/riscv.opt
@@ -70,6 +70,10 @@ mmuldiv
 Target Report Mask(MULDIV)
 Use hardware instructions for integer multiplication and division.
 
+mrvc
+Target Report Mask(RVC)
+Use compressed instruction encoding
+
 mlra
 Target Report Var(riscv_lra_flag) Init(0) Save
 Use LRA instead of reload