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${ noResults }
It set "aspeed_gpio_ops" struct which containing read and write callbacks to be used when I/O is performed on the GPIO region. Besides, in the previous design of ASPEED SOCs, one register is used for setting one function for 32 GPIO pins. ex: GPIO000 is used for setting data value for GPIO A, B, C and D in AST2600. ex: GPIO004 is used for setting direction for GPIO A, B, C and D in AST2600. However, the register set have a significant change in AST2700. Each GPIO pin has their own control register. In other words, users are able to set one GPIO pin’s direction, interrupt enable, input mask and so on in one register. The aspeed_gpio_read/aspeed_gpio_write callback functions are not compatible AST2700. Introduce a new "const MemoryRegionOps *" attribute in AspeedGPIOClass and use it in aspeed_gpio_realize function. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> |
2 years ago | |
|---|---|---|
| .. | ||
| aspeed_gpio.h | hw/gpio/aspeed: Support different memory region ops | 1 year ago |
| bcm2835_gpio.h | Use OBJECT_DECLARE_SIMPLE_TYPE when possible | 6 years ago |
| bcm2838_gpio.h | hw/gpio: Connect SD controller to BCM2838 GPIO | 2 years ago |
| imx_gpio.h | Use OBJECT_DECLARE_SIMPLE_TYPE when possible | 6 years ago |
| npcm7xx_gpio.h | hw/gpio: Add GPIO model for Nuvoton NPCM7xx | 6 years ago |
| nrf51_gpio.h | hw/gpio/nrf51: implement DETECT signal | 3 years ago |
| pca9552.h | misc/pca955*: Move models under hw/gpio | 2 years ago |
| pca9552_regs.h | misc/pca955*: Move models under hw/gpio | 2 years ago |
| pca9554.h | misc/pca955*: Move models under hw/gpio | 2 years ago |
| pca9554_regs.h | misc/pca955*: Move models under hw/gpio | 2 years ago |
| pcf8574.h | hw/gpio: introduce pcf8574 driver | 2 years ago |
| sifive_gpio.h | sifive: Use DECLARE_*CHECKER* macros | 6 years ago |
| stm32l4x5_gpio.h | hw/arm: Connect STM32L4x5 GPIO to STM32L4x5 SoC | 2 years ago |