riscv/qemu - qemu - Gitea: Git with a cup of tea

Commit Graph

Author	SHA1	Message	Date
liequan che	d078da86d6	crypto: Introduce SM3 hash hmac pbkdf algorithm Introduce the SM3 cryptographic hash algorithm (GB/T 32905-2016). SM3 (GB/T 32905-2016) is a cryptographic standard issued by the Organization of State Commercial Cryptography Administration (OSCCA) as an authorized cryptographic algorithm for use within China. Detect the SM3 cryptographic hash algorithm and enable the feature silently if it is available. Signed-off-by: cheliequan <cheliequan@inspur.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>	2 years ago
Daniel P. Berrangé	62eb377e0a	crypto: purge 'loaded' property that was not fully removed The 'loaded' property on TLS creds and secret objects was marked as deprecated in 6.0.0. In 7.1.0 the deprecation info was moved into the 'removed-features.rst' file, but the property was not actually removed, just made read-only. This was a highly unusual practice, so finish the long overdue removal job. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>	2 years ago
Peter Maydell	44a9394b1d	nvme queue -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmcpDm8ACgkQTeGvMW1P DenpLQgAjpk5tN8oYQKxJVu8qO3RUDatlIXgaZ8ljDSZVIB3cg/qh36qByt2iZNK FC7oLl/Yl44FHF+6ScWJBcSjXuVkQ/aT8UA1pYbTb9wcURB8atMG9IJxmQuhjlnl hgvDbpLwyHb4eVuWwA2aKukGZtYyhUcJIoP2RN8wugwg5T7I6R/eaiBG3kCCqIHB xshgEPIWModzGKR8i6NawhIhFFc3icOabB15QHYwA69BuAK69O9XNlVut2oMLquS Lv9INkAtYQtqHHvUJGsgcQcTS8vxBGR+TFk05heiThgu2f9kGLu+lV1Ud3WBWeW1 6Kt4N1WF9hw6Y4I8pGzEs8C49marFg== =0S/1 -----END PGP SIGNATURE----- Merge tag 'pull-nvme-20241104' of https://gitlab.com/birkelund/qemu into staging nvme queue # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmcpDm8ACgkQTeGvMW1P # DenpLQgAjpk5tN8oYQKxJVu8qO3RUDatlIXgaZ8ljDSZVIB3cg/qh36qByt2iZNK # FC7oLl/Yl44FHF+6ScWJBcSjXuVkQ/aT8UA1pYbTb9wcURB8atMG9IJxmQuhjlnl # hgvDbpLwyHb4eVuWwA2aKukGZtYyhUcJIoP2RN8wugwg5T7I6R/eaiBG3kCCqIHB # xshgEPIWModzGKR8i6NawhIhFFc3icOabB15QHYwA69BuAK69O9XNlVut2oMLquS # Lv9INkAtYQtqHHvUJGsgcQcTS8vxBGR+TFk05heiThgu2f9kGLu+lV1Ud3WBWeW1 # 6Kt4N1WF9hw6Y4I8pGzEs8C49marFg== # =0S/1 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Nov 2024 18:11:59 GMT # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [full] # gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [full] # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * tag 'pull-nvme-20241104' of https://gitlab.com/birkelund/qemu: hw/nvme: remove dead code hw/nvme: add NPDAL/NPDGL hw/nvme: i/o cmd set independent namespace data structure Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Peter Maydell	622b0efa37	qga-pull-2024-11-4 -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEwsLBCepDxjwUI+uE711egWG6hOcFAmcozUUACgkQ711egWG6 hOeSgQ/9FJNPfiGyhbh9RqvAr3DJ8kUskEy7HFedJN0KQJW1U4+0QeMPot9A6Kju y+1KNKnLPRNSwB6HtbOKwiWGEg37cl0EeEwwxV8kteVlXLHTRguIHK7EXRahOq57 oU+y2nZEaZeooHOfWsLgIXqxo3OtsYr1v7HZEvuBGakjJ5irSSdDXoZHzPIOJ36K JY7QdAbEgAfmoLP6LRIMQwbUkhColRPy3mVg5RUOjgYhFbLgCLpr56E5JlLu+J0z XWrUc8rvpiUYuXqNSNPSrkwhhkb6Wa1g99YA0yJLvnXVp1fG7Utm2Q+QIsKeUuTp p9jRVvX27dkfHMIQfG+s90NHt9SGCXGoTPVvd3ACpbZy9hCyFh48FzkyRAhrLiF0 iZ4xAv5gjnne8i+RFJeAtMPh5N32LcnFOODnEbM17xAXWOMKvHqXVHGTiAF6I1mr iyNdPwfZ9rFH81SbsgAjhs5rjXSNIlwoJq2y7jyoNB0Z1/sGMzy/DlLGP+Xyw2Td snDXswQ62qgFl2Ea7Vd+adhAbjFkjqt+L5i+8I2c640w2tbTE3Q6v8QZuKCR/I+t N6nmiifCv0dq90yeBxP5Lq7vIowVKWJegMGSfWokts0UKMXTvYe3EA0LjtWB1zLS D0dHPtj5/iYrc6Hvu6Ciizb+kJVv5GBk1FAz7kz1AxkW366zSr8= =O2+e -----END PGP SIGNATURE----- Merge tag 'qga-pull-2024-11-4' of https://github.com/kostyanf14/qemu into staging qga-pull-2024-11-4 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEwsLBCepDxjwUI+uE711egWG6hOcFAmcozUUACgkQ711egWG6 # hOeSgQ/9FJNPfiGyhbh9RqvAr3DJ8kUskEy7HFedJN0KQJW1U4+0QeMPot9A6Kju # y+1KNKnLPRNSwB6HtbOKwiWGEg37cl0EeEwwxV8kteVlXLHTRguIHK7EXRahOq57 # oU+y2nZEaZeooHOfWsLgIXqxo3OtsYr1v7HZEvuBGakjJ5irSSdDXoZHzPIOJ36K # JY7QdAbEgAfmoLP6LRIMQwbUkhColRPy3mVg5RUOjgYhFbLgCLpr56E5JlLu+J0z # XWrUc8rvpiUYuXqNSNPSrkwhhkb6Wa1g99YA0yJLvnXVp1fG7Utm2Q+QIsKeUuTp # p9jRVvX27dkfHMIQfG+s90NHt9SGCXGoTPVvd3ACpbZy9hCyFh48FzkyRAhrLiF0 # iZ4xAv5gjnne8i+RFJeAtMPh5N32LcnFOODnEbM17xAXWOMKvHqXVHGTiAF6I1mr # iyNdPwfZ9rFH81SbsgAjhs5rjXSNIlwoJq2y7jyoNB0Z1/sGMzy/DlLGP+Xyw2Td # snDXswQ62qgFl2Ea7Vd+adhAbjFkjqt+L5i+8I2c640w2tbTE3Q6v8QZuKCR/I+t # N6nmiifCv0dq90yeBxP5Lq7vIowVKWJegMGSfWokts0UKMXTvYe3EA0LjtWB1zLS # D0dHPtj5/iYrc6Hvu6Ciizb+kJVv5GBk1FAz7kz1AxkW366zSr8= # =O2+e # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Nov 2024 13:33:57 GMT # gpg: using RSA key C2C2C109EA43C63C1423EB84EF5D5E8161BA84E7 # gpg: Good signature from "Kostiantyn Kostiuk (Upstream PR sign) <kkostiuk@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: C2C2 C109 EA43 C63C 1423 EB84 EF5D 5E81 61BA 84E7 * tag 'qga-pull-2024-11-4' of https://github.com/kostyanf14/qemu: qemu-ga: Fix a SIGSEGV in ga_run_command() helper qga: fix missing static and prototypes windows warnings qga: fix -Wsometimes-uninitialized windows warning Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Peter Maydell	67194c7018	MIPS patches queue - Migrate missing CP0 TLB MemoryMapID register (Yongbok) - Enable MSA ASE for mips32r6-generic (Aleksandar) - Convert Loongson LEXT opcodes to decodetree (Philippe) - Introduce ase_3d_available and disas_mt_available helpers (Philippe) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmcopxgACgkQ4+MsLN6t wN4DzQ//UPDSvcwCj6QIZ2TR2oKG5JIVRYrep7aUb+LdK1uus8P2G9REMnr1X/uC 817aiUC6fK/PJEGAo6dTCKrPnMz71YAHM2259jreQXVZtCzOEzU9Fg9RHBCrbzxP +kL+Sjzvnw3Kp0jVB1sgNn8PhKCkIVg9Go6tr4sXyTjINzsNbk78H6w3O4YlFOSX dbQLWDpFQQRvliiSJR5erQyELs1tVJt+76aab9mM7uWvSbpX/6O80bJ607fUFG8J t07c5u6aOU1MaZrGE5KO6G7BQwqYE/O3lGAd1akj8UMQNxJY8lrS+4bxH9+vjJTF ojRdTRGa2cXC1wxiifFphUNfJe2fH+Wvjtdpgnu3vdp17J0wbnJyw5PmZolS2RI6 w9rAn1xnF2C/2HVZw37+Ghf+sdR9EgewgPAGoU1bKN4iQVE7FX1B4B6rIuq5Zxje l2EFyFzkVWFDd+uy62o6WdH8mgwlHySxUkDeUgLLJwjupVKKvm4FCs0r8CE3g5RZ GkHW6iOVg7QqR4OveGe3BGVK41Gex/iU7WNDWqQ2xqXDywnyFuTQVs/y2b7dPtMd dbcQ6a/zFQl+WdhhnE5S1Y4Pjfw0TQ/+nKd+jc8lme8eihUbPvETfDLk3j0JI9xd eXf4plnVMy33qvlLG4GVYzjYU+jNlGK1KCBcBFccFWasLo75Lyk= =Ocl+ -----END PGP SIGNATURE----- Merge tag 'mips-20241104' of https://github.com/philmd/qemu into staging MIPS patches queue - Migrate missing CP0 TLB MemoryMapID register (Yongbok) - Enable MSA ASE for mips32r6-generic (Aleksandar) - Convert Loongson LEXT opcodes to decodetree (Philippe) - Introduce ase_3d_available and disas_mt_available helpers (Philippe) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmcopxgACgkQ4+MsLN6t # wN4DzQ//UPDSvcwCj6QIZ2TR2oKG5JIVRYrep7aUb+LdK1uus8P2G9REMnr1X/uC # 817aiUC6fK/PJEGAo6dTCKrPnMz71YAHM2259jreQXVZtCzOEzU9Fg9RHBCrbzxP # +kL+Sjzvnw3Kp0jVB1sgNn8PhKCkIVg9Go6tr4sXyTjINzsNbk78H6w3O4YlFOSX # dbQLWDpFQQRvliiSJR5erQyELs1tVJt+76aab9mM7uWvSbpX/6O80bJ607fUFG8J # t07c5u6aOU1MaZrGE5KO6G7BQwqYE/O3lGAd1akj8UMQNxJY8lrS+4bxH9+vjJTF # ojRdTRGa2cXC1wxiifFphUNfJe2fH+Wvjtdpgnu3vdp17J0wbnJyw5PmZolS2RI6 # w9rAn1xnF2C/2HVZw37+Ghf+sdR9EgewgPAGoU1bKN4iQVE7FX1B4B6rIuq5Zxje # l2EFyFzkVWFDd+uy62o6WdH8mgwlHySxUkDeUgLLJwjupVKKvm4FCs0r8CE3g5RZ # GkHW6iOVg7QqR4OveGe3BGVK41Gex/iU7WNDWqQ2xqXDywnyFuTQVs/y2b7dPtMd # dbcQ6a/zFQl+WdhhnE5S1Y4Pjfw0TQ/+nKd+jc8lme8eihUbPvETfDLk3j0JI9xd # eXf4plnVMy33qvlLG4GVYzjYU+jNlGK1KCBcBFccFWasLo75Lyk= # =Ocl+ # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Nov 2024 10:51:04 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'mips-20241104' of https://github.com/philmd/qemu: target/mips: Remove unused CPUMIPSState::current_fpu field target/mips: Introduce disas_mt_available() target/mips: Introduce ase_3d_available() helper target/mips: Remove unreachable 32-bit code on 64-bit Loongson Ext target/mips: Convert Loongson [D]MULT[U].G opcodes to decodetree target/mips: Convert Loongson [D]MOD[U].G opcodes to decodetree target/mips: Convert Loongson [D]DIVU.G opcodes to decodetree target/mips: Convert Loongson DIV.G opcodes to decodetree target/mips: Convert Loongson DDIV.G opcodes to decodetree target/mips: Re-introduce OPC_ADDUH_QB_DSP and OPC_MUL_PH_DSP target/mips: Simplify Loongson MULTU.G opcode target/mips: Extract decode_64bit_enabled() helper target/mips: Enable MSA ASE for mips32r6-generic target/mips: Migrate TLB MemoryMapID register Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Peter Maydell	9a7b0a8618	aspeed queue: * Fixed eMMC size calculation * Fixed IRQ definitions on AST2700 * Added RTC support to AST2700 * Fixed timer IRQ status on AST2600 * Improved SDHCI model with new registers * Added -nodefaults support to AST1030 * Provided a way to use an eMMC device without boot partitions -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmcoo4oACgkQUaNDx8/7 7KGYAQ/9GWiwM7SHFD/WTEo6iClQCk+Do3pzGXZPQq7WLqYhBU8mYwSaqMDUtXj+ MQVywyLxSYaKdCKessN0haATyzEDVRtxKwIRnbrSDWWnxG8NGj2esOTsU6/wgfD4 FqARaMH91FQB6rY8QbmbGmqTJ1QbWEPXj7v2piJol5dvI2Oe8iqn/6z1Cv4NMXwh aYHwSVwcHLD9tfmyXP0DKN/XHLC4pTAOoU96ajcN6RRW+D6vuQEsQq0caZt8CHQc I2oSptU+RZF2DPbSeEB42y9I138/kQzTIaVnbBN//NLRwbzRsLlXhA92F2CJyDrD FGNQyynteil8F7M5Oab47fFia1QF/v4G45VOAsHpT1tLBsZPKJdRwfLLqDPZbVbG 2lAVuukqW0gKoEHsXfVsDzcIxpX81SlUsccHY4kCxsRNnwSzCWaDK9OOTx3CAxjG CzzDgQszNr/12dzkWExIhLpMhQNeiUXX1veAH/jzbjyRAKxzjkDYaX2lUC3MfmqX irjmzOU0AbtComv4ybeBqtqNmQvUx5/y993Hgakc9mqqCoAm/Fn4qtx6uW5vSSZJ w4heyWbzcLp5RIzSYZypWlmgI+3bJgJq2aX276MYqAe3m8PnUCkuW9NTsfb+ARMl XGExHPNrAsw7eiiQsTa7Byt/jkEf3KmEp8ye+3cAvJwPgxlDyys= =ms8H -----END PGP SIGNATURE----- Merge tag 'pull-aspeed-20241104' of https://github.com/legoater/qemu into staging aspeed queue: * Fixed eMMC size calculation * Fixed IRQ definitions on AST2700 * Added RTC support to AST2700 * Fixed timer IRQ status on AST2600 * Improved SDHCI model with new registers * Added -nodefaults support to AST1030 * Provided a way to use an eMMC device without boot partitions # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmcoo4oACgkQUaNDx8/7 # 7KGYAQ/9GWiwM7SHFD/WTEo6iClQCk+Do3pzGXZPQq7WLqYhBU8mYwSaqMDUtXj+ # MQVywyLxSYaKdCKessN0haATyzEDVRtxKwIRnbrSDWWnxG8NGj2esOTsU6/wgfD4 # FqARaMH91FQB6rY8QbmbGmqTJ1QbWEPXj7v2piJol5dvI2Oe8iqn/6z1Cv4NMXwh # aYHwSVwcHLD9tfmyXP0DKN/XHLC4pTAOoU96ajcN6RRW+D6vuQEsQq0caZt8CHQc # I2oSptU+RZF2DPbSeEB42y9I138/kQzTIaVnbBN//NLRwbzRsLlXhA92F2CJyDrD # FGNQyynteil8F7M5Oab47fFia1QF/v4G45VOAsHpT1tLBsZPKJdRwfLLqDPZbVbG # 2lAVuukqW0gKoEHsXfVsDzcIxpX81SlUsccHY4kCxsRNnwSzCWaDK9OOTx3CAxjG # CzzDgQszNr/12dzkWExIhLpMhQNeiUXX1veAH/jzbjyRAKxzjkDYaX2lUC3MfmqX # irjmzOU0AbtComv4ybeBqtqNmQvUx5/y993Hgakc9mqqCoAm/Fn4qtx6uW5vSSZJ # w4heyWbzcLp5RIzSYZypWlmgI+3bJgJq2aX276MYqAe3m8PnUCkuW9NTsfb+ARMl # XGExHPNrAsw7eiiQsTa7Byt/jkEf3KmEp8ye+3cAvJwPgxlDyys= # =ms8H # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Nov 2024 10:35:54 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20241104' of https://github.com/legoater/qemu: aspeed: Don't set always boot properties of the emmc device aspeed: Support create flash devices via command line for AST1030 hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0 and 1 hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600 hw/timer/aspeed: Fix coding style aspeed/soc: Support RTC for AST2700 hw/arm/aspeed_ast27x0: Avoid hardcoded '256' in IRQ calculation hw/arm/aspeed_ast27x0: Use bsa.h for PPI definitions hw/sd/sdcard: Fix calculation of size when using eMMC boot partitions hw/arm: enable at24c with aspeed Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Peter Maydell	6b829602e2	* Various bug fixes * Big cleanup of deprecated machines * Power11 support for spapr * XIVE improvements * Goodbye to Cedric and David as ppc reviewers, thank you both o7 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEETkN92lZhb0MpsKeVZ7MCdqhiHK4FAmcoEicACgkQZ7MCdqhi HK5M8Q//fz+ZkJndXkBjb1Oinx+q+eVtNm2JrvcWIsXyhG3K+6VxYPp69H+SRv/Z TWuUqMQPxq8mhQvBJlDAttp/oaUEiOcCRvs/iUoBN12L4mVxXfdoT88TZ4frN3eP 8bePq+DW2N/7gpmsJm5CyEZPpcf9AjVHgLRp3KYFkOJ/14uzvuwnocU39gl+2IUh MXHTedQgMNXaKorJXk1NVdM6NxMuVhOvwxAs6ya2gwhxyA5tteo5PiQOnDJWkejf xg3RRsNzGYcs1Qg/3kFIf3RfEB0aYbPxROM8IfPaJWKN5KnMggj/JAkHyK1x/V3J wml7+cB0doMt/yRiuYJhXpyrtOqpvjRWPA6RhxECWW2kwrovv8NAF8IrFnw9NvOQ QC66ZaaFcbAcFrVT1e/iggU76d01II6m4OAgKcXw+FRHgps4VU9y83j7ApNnNUWN IXp9hkzoHi5VwX0FrG4ELUr2iEf1HASMvM8EZ/0AxzWj5iNtQB8lFsrEdaGVXyIS M5JaJeNjCn4koCyYaFSctH5eKtbzIwnGWnDcdTwaOuQ+9itBvY8O+HZalE6sAc5S kLFZ7i/Ut/qxbY5pMumt8LKD4pR1SsOxFB8dJCmn/f/tvRGtIVsoY6btNe4M0+24 42MxZbWO6W379C32bwbtsPiGA+aLSgShjP4cWm9cgRjz4RJFnwg= =vmIG -----END PGP SIGNATURE----- Merge tag 'pull-ppc-for-9.2-1-20241104' of https://gitlab.com/npiggin/qemu into staging * Various bug fixes * Big cleanup of deprecated machines * Power11 support for spapr * XIVE improvements * Goodbye to Cedric and David as ppc reviewers, thank you both o7 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEETkN92lZhb0MpsKeVZ7MCdqhiHK4FAmcoEicACgkQZ7MCdqhi # HK5M8Q//fz+ZkJndXkBjb1Oinx+q+eVtNm2JrvcWIsXyhG3K+6VxYPp69H+SRv/Z # TWuUqMQPxq8mhQvBJlDAttp/oaUEiOcCRvs/iUoBN12L4mVxXfdoT88TZ4frN3eP # 8bePq+DW2N/7gpmsJm5CyEZPpcf9AjVHgLRp3KYFkOJ/14uzvuwnocU39gl+2IUh # MXHTedQgMNXaKorJXk1NVdM6NxMuVhOvwxAs6ya2gwhxyA5tteo5PiQOnDJWkejf # xg3RRsNzGYcs1Qg/3kFIf3RfEB0aYbPxROM8IfPaJWKN5KnMggj/JAkHyK1x/V3J # wml7+cB0doMt/yRiuYJhXpyrtOqpvjRWPA6RhxECWW2kwrovv8NAF8IrFnw9NvOQ # QC66ZaaFcbAcFrVT1e/iggU76d01II6m4OAgKcXw+FRHgps4VU9y83j7ApNnNUWN # IXp9hkzoHi5VwX0FrG4ELUr2iEf1HASMvM8EZ/0AxzWj5iNtQB8lFsrEdaGVXyIS # M5JaJeNjCn4koCyYaFSctH5eKtbzIwnGWnDcdTwaOuQ+9itBvY8O+HZalE6sAc5S # kLFZ7i/Ut/qxbY5pMumt8LKD4pR1SsOxFB8dJCmn/f/tvRGtIVsoY6btNe4M0+24 # 42MxZbWO6W379C32bwbtsPiGA+aLSgShjP4cWm9cgRjz4RJFnwg= # =vmIG # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Nov 2024 00:15:35 GMT # gpg: using RSA key 4E437DDA56616F4329B0A79567B30276A8621CAE # gpg: Good signature from "Nicholas Piggin <npiggin@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4E43 7DDA 5661 6F43 29B0 A795 67B3 0276 A862 1CAE * tag 'pull-ppc-for-9.2-1-20241104' of https://gitlab.com/npiggin/qemu: (67 commits) MAINTAINERS: Remove myself as reviewer MAINTAINERS: Remove myself from XIVE MAINTAINERS: Remove myself from the PowerNV machines hw/ppc: Consolidate ppc440 initial mapping creation functions hw/ppc: Consolidate e500 initial mapping creation functions tests/qtest: Add XIVE tests for the powernv10 machine pnv/xive2: TIMA CI ops using alternative offsets or byte lengths pnv/xive2: TIMA support for 8-byte OS context push for PHYP pnv/xive: Update PIPR when updating CPPR pnv/xive: Add special handling for pool targets ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line" ppc/xive2: Change context/ring specific functions to be generic ppc/xive2: Support "Pull Thread Context to Register" operation ppc/xive2: Allow 1-byte write of Target field in TIMA ppc/xive2: Dump the VP-group and crowd tables with 'info pic' ppc/xive2: Dump more NVP state with 'info pic' pnv/xive2: Support for "OS LGS Push" TIMA operation ppc/xive2: Support TIMA "Pull OS Context to Odd Thread Reporting Line" pnv/xive2: Define OGEN field in the TIMA pnv/xive: TIMA patch sets pre-req alignment and formatting changes ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Arun Kumar	8f472a0e7a	hw/nvme: remove dead code Remove dead code which always returns success, since PRCHK will have a value of zero. Signed-off-by: Arun Kumar <arun.kka@samsung.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Link: https://lore.kernel.org/r/20241022222105.3609223-1-arun.kka@samsung.com Signed-off-by: Klaus Jensen <k.jensen@samsung.com>	2 years ago
Ayush Mishra	dbaa2936b3	hw/nvme: add NPDAL/NPDGL Add the NPDGL and NPDAL fields to support large alignment and granularities. Signed-off-by: Ayush Mishra <ayush.m55@samsung.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Link: https://lore.kernel.org/r/20241001012833.3551820-1-ayush.m55@samsung.com [k.jensen: renamed the enum values] Signed-off-by: Klaus Jensen <k.jensen@samsung.com>	2 years ago
Arun Kumar	79e490058f	hw/nvme: i/o cmd set independent namespace data structure Add support for the I/O Command Set Independent Namespace Data Structure (CNS 8h and 1fh). Signed-off-by: Arun Kumar <arun.kka@samsung.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Link: https://lore.kernel.org/r/20240925004407.3521406-1-arun.kka@samsung.com Signed-off-by: Klaus Jensen <k.jensen@samsung.com>	2 years ago
Peter Maydell	11b8920ed2	* Remove the redundant macOS-15 CI job * Various fixes, improvements and additions for the functional test suite * Restore the sh4eb target * Fix the OpenBSD VM test * Re-enable the pci-bridge device on s390x * Minor clean-ups / fixes for the next-cube machine -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmcoyoQRHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbVwRg/+M8RWxOW5M2GmEfAj/e1IatLS2eXek6fE YOCPxvc5VK5rjXzcRKNqNKP53gBkF0PRho68b3IkBI6ylDOdzdRcDYsi8CSLWbG4 O6heGJRzn9HyIS+UShAoqoj9l7lxODcZvEJK2ueiy/Hri/Zc4TpullLhSgAPKTgn Ln75nd+hWwS9e0df1BSOBax2iEU/2j1yuBVCcFgFHH8K39Wqrs6Xtyay9yPjYLUg pHNGObikrLF47KGI5yZ22/iVgwr5yhd3KzycjbxHVccCqZSsGl2xkCBwKNlIodRO RMhTzUhOMi/RSjvdSbM5d2Nh4aCJ5mNzzWSUklHdYWnrMOv6uECJ0h2o0ve5L4kT jtTGTcLe8a+JsDs+UxeVWqqlUf4w8Vv0DRky6D6ln25hcqrOveJE++o58FHFt/AX jEolRU5k2tMpOSMgE3wAi5BVCttpI3Idly/IC+rntMjQOTwdKPlgfcBIqQmXI6M8 dM6oUf9WnIr/CAt7qG6QjCONjeBmuMlZV4+v7xdqFsJpwCTyo6k3LwoHx3pTC73z 6x0SmpeDoTzdw6B7O1HlLNllW7hd2/5GQ5qTH+E1pKAktkOf3MQeSD6qQEMjwH7T e7hNUV+APgtDqpnQ0xcTL5AwNAkDGKoKBmaIp0vlwGUET55fw5N0Wb6Oo9LOgeFl yqi5GxIuJu4= =CTOw -----END PGP SIGNATURE----- Merge tag 'pull-request-2024-11-04' of https://gitlab.com/thuth/qemu into staging * Remove the redundant macOS-15 CI job * Various fixes, improvements and additions for the functional test suite * Restore the sh4eb target * Fix the OpenBSD VM test * Re-enable the pci-bridge device on s390x * Minor clean-ups / fixes for the next-cube machine # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmcoyoQRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbVwRg/+M8RWxOW5M2GmEfAj/e1IatLS2eXek6fE # YOCPxvc5VK5rjXzcRKNqNKP53gBkF0PRho68b3IkBI6ylDOdzdRcDYsi8CSLWbG4 # O6heGJRzn9HyIS+UShAoqoj9l7lxODcZvEJK2ueiy/Hri/Zc4TpullLhSgAPKTgn # Ln75nd+hWwS9e0df1BSOBax2iEU/2j1yuBVCcFgFHH8K39Wqrs6Xtyay9yPjYLUg # pHNGObikrLF47KGI5yZ22/iVgwr5yhd3KzycjbxHVccCqZSsGl2xkCBwKNlIodRO # RMhTzUhOMi/RSjvdSbM5d2Nh4aCJ5mNzzWSUklHdYWnrMOv6uECJ0h2o0ve5L4kT # jtTGTcLe8a+JsDs+UxeVWqqlUf4w8Vv0DRky6D6ln25hcqrOveJE++o58FHFt/AX # jEolRU5k2tMpOSMgE3wAi5BVCttpI3Idly/IC+rntMjQOTwdKPlgfcBIqQmXI6M8 # dM6oUf9WnIr/CAt7qG6QjCONjeBmuMlZV4+v7xdqFsJpwCTyo6k3LwoHx3pTC73z # 6x0SmpeDoTzdw6B7O1HlLNllW7hd2/5GQ5qTH+E1pKAktkOf3MQeSD6qQEMjwH7T # e7hNUV+APgtDqpnQ0xcTL5AwNAkDGKoKBmaIp0vlwGUET55fw5N0Wb6Oo9LOgeFl # yqi5GxIuJu4= # =CTOw # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Nov 2024 13:22:12 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2024-11-04' of https://gitlab.com/thuth/qemu: tests/functional: Convert the OrangePi tests to the functional framework tests/functional: Convert BananaPi tests to the functional framework tests/functional: Convert the tcg_plugins test next-cube: remove cpu parameter from next_scsi_init() next-cube: fix up compilation when DEBUG_NEXT is enabled hw/s390x: Re-enable the pci-bridge device on s390x tests/functional: Fix the s390x and ppc64 tuxrun tests tests/vm/openbsd: Remove the "Time appears wrong" workaround tests/functional: Add a test for sh4eb Revert "Remove the unused sh4eb target" tests/functional: make cached asset files read-only tests/functional: make tuxrun disk images writable .gitlab-ci.d/cirrus: Remove the macos-15 job Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Peter Maydell	daaf51001a	SeaBIOS-hppa v17 pull request Please pull a single commit, which updates SeaBIOS-hppa to version 17. If comes with some important firmware and SCSI fixes and prepares for futher development to support 64-bit HP-UX and MPE/UX in the future. New PDC functions & general enhancements: - Add PDC_MODEL_GET_INSTALL_KERNEL firmware call - Add PDC_PAT_EVENT firmware call - Support ENTRY_IO_BOOTOUT - Prefer memory-access over io-access of GSP serial port - Disable LMMIO_DIRECT0 range during modification - Small optimizations in IODC call Fixes: - esp-scsi: indicate acceptance of MESSAGE IN phase data - Avoid crash when booting without SCSI controller - Remove exec flag from hppa-firmware.img - Fix LMMIO detection for PCI cards on Astro/Elroy - Avoid trashing MPE IPL bootloader stack - HP-UX 11 64-bit saves number of RAM pages in PAGE0 at 0x33c - Fix return value of PDC_CACHE/PDC_CACHE_RET_SPID for space id hashing - Allow PDC functions to act when called in narrow mode - pcidevice: Use portaddr_t for io port addresses Cleanups: - Change default make target to "parisc" - Clean the "out-64" directory on "make clean" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZyfV0AAKCRD3ErUQojoP X63XAP9sxLngebfWXdb9YI4+3N2xBpT772tQha3QYdejF0QvrAEAwpB8g8MFHHz3 QKZfvPERw2nBhjtpf+Dl9iexoKh8YQI= =MjU+ -----END PGP SIGNATURE----- Merge tag 'seabios-hppa-v17-pull-request' of https://github.com/hdeller/qemu-hppa into staging SeaBIOS-hppa v17 pull request Please pull a single commit, which updates SeaBIOS-hppa to version 17. If comes with some important firmware and SCSI fixes and prepares for futher development to support 64-bit HP-UX and MPE/UX in the future. New PDC functions & general enhancements: - Add PDC_MODEL_GET_INSTALL_KERNEL firmware call - Add PDC_PAT_EVENT firmware call - Support ENTRY_IO_BOOTOUT - Prefer memory-access over io-access of GSP serial port - Disable LMMIO_DIRECT0 range during modification - Small optimizations in IODC call Fixes: - esp-scsi: indicate acceptance of MESSAGE IN phase data - Avoid crash when booting without SCSI controller - Remove exec flag from hppa-firmware.img - Fix LMMIO detection for PCI cards on Astro/Elroy - Avoid trashing MPE IPL bootloader stack - HP-UX 11 64-bit saves number of RAM pages in PAGE0 at 0x33c - Fix return value of PDC_CACHE/PDC_CACHE_RET_SPID for space id hashing - Allow PDC functions to act when called in narrow mode - pcidevice: Use portaddr_t for io port addresses Cleanups: - Change default make target to "parisc" - Clean the "out-64" directory on "make clean" # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZyfV0AAKCRD3ErUQojoP # X63XAP9sxLngebfWXdb9YI4+3N2xBpT772tQha3QYdejF0QvrAEAwpB8g8MFHHz3 # QKZfvPERw2nBhjtpf+Dl9iexoKh8YQI= # =MjU+ # -----END PGP SIGNATURE----- # gpg: Signature made Sun 03 Nov 2024 19:58:08 GMT # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'seabios-hppa-v17-pull-request' of https://github.com/hdeller/qemu-hppa: target/hppa: Update SeaBIOS-hppa to version 17 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Peter Maydell	ee057a9f29	pull-loongarch-20241102 -----BEGIN PGP SIGNATURE----- iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZyXbXgAKCRBAov/yOSY+ 37a9BADZ7vI2idWNXdH+mLNDZNSOxfdKp6ggNgKS3S48Hi2zR72MEhwvR9dGlHDL 98agrbV7/jI9Z+0dLAxvlyl1MvXfnn2sXYgUuZp6IAaQzFBa11HBAK7UFh3sTA4A gD4oPwl8AdJiFvDN6vNjS+dO0ls+j/YMaoLkAKLv15dlWtg4Rw== =EZnr -----END PGP SIGNATURE----- Merge tag 'pull-loongarch-20241102' of https://gitlab.com/gaosong/qemu into staging pull-loongarch-20241102 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZyXbXgAKCRBAov/yOSY+ # 37a9BADZ7vI2idWNXdH+mLNDZNSOxfdKp6ggNgKS3S48Hi2zR72MEhwvR9dGlHDL # 98agrbV7/jI9Z+0dLAxvlyl1MvXfnn2sXYgUuZp6IAaQzFBa11HBAK7UFh3sTA4A # gD4oPwl8AdJiFvDN6vNjS+dO0ls+j/YMaoLkAKLv15dlWtg4Rw== # =EZnr # -----END PGP SIGNATURE----- # gpg: Signature made Sat 02 Nov 2024 07:57:18 GMT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20241102' of https://gitlab.com/gaosong/qemu: target/loongarch: Add steal time support on migration hw/loongarch/boot: Use warn_report when no kernel filename linux-headers: Update to Linux v6.12-rc5 linux-headers: loongarch: Add kvm_para.h linux-headers: Add unistd_64.h target/loongarch/kvm: Implement LoongArch PMU extension target/loongarch: Implement lbt registers save/restore function target/loongarch: Add loongson binary translation feature Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Thomas Huth	380f7268b7	tests/functional: Convert the OrangePi tests to the functional framework Move the OrangePi tests from tests/avocado/boot_linux_console.py into a new file dedicated for OrangePi tests in the functional framework and update the hash sums of the assets to sha256 along the way. For the buildroot image and the Armbian image, we've got to switch to a newer version since the old images have been removed from the server, and the NetBSD image has been moved to the archive, so we need to update this URL as well. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241029092440.25021-3-thuth@redhat.com>	2 years ago
Thomas Huth	f7d6b77220	tests/functional: Convert BananaPi tests to the functional framework Move the BananaPi tests from tests/avocado/boot_linux_console.py into a new file dedicated for Banana Pi tests in the functional framework. Update the hash sums of the assets to sha256 along the way and fix the broken link for the buildroot image from storage.kernelci.org. (Note: The test_arm_bpim2u_openwrt_22_03_3 test is currently broken due to a regression in commit `4c2c047469` ("target/arm: Fix usage of MMU indexes when EL3 is AArch32") - it works if that commit gets reverted) Signed-off-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241029092440.25021-2-thuth@redhat.com>	2 years ago
Thomas Huth	3abc545e66	tests/functional: Convert the tcg_plugins test A straight forward conversion, only the usual changes were required here (i.e. adjustment for asset downloading, machine selection). Message-ID: <20241023051754.813412-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Mark Cave-Ayland	f5b47c7aa2	next-cube: remove cpu parameter from next_scsi_init() The parameter is not used. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20241023085852.1061031-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Mark Cave-Ayland	39734497a3	next-cube: fix up compilation when DEBUG_NEXT is enabled These were accidentally introduced by my last series. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20241023085852.1061031-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Thomas Huth	bc9da794cc	hw/s390x: Re-enable the pci-bridge device on s390x Commit `e779e5c05a` ("hw/pci-bridge: Add a Kconfig switch for the normal PCI bridge") added a config switch for the pci-bridge, so that the device is not included in the s390x target anymore (since the pci-bridge is not really useful on s390x). However, it seems like libvirt is still adding pci-bridge devices automatically to the guests' XML definitions (when adding a PCI device to a non-zero PCI bus), so these guests are now broken due to the missing pci-bridge in the QEMU binary. To avoid disruption of the users, let's re-enable the pci-bridge device on s390x for the time being. Message-ID: <20241024130405.62134-1-thuth@redhat.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Boris Fiuczynski <fiuczy@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Thomas Huth	e6a401d7a6	tests/functional: Fix the s390x and ppc64 tuxrun tests I forgot to add the tests to the meson.build file and looks like I even managed to somehow mix up the hashsums in the ppc64 test! Message-ID: <20241023141919.930689-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Thomas Huth	a3c946ec88	tests/vm/openbsd: Remove the "Time appears wrong" workaround Seems like the server now reports the right time again, so we have to drop the workaround to get the installer working again. Message-ID: <20241023072414.827732-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Thomas Huth	62728ddcba	tests/functional: Add a test for sh4eb Now that we are aware of binaries that are available for sh4eb, we should make sure that there are no regressions with this target and test it regularly in our CI. Message-ID: <20241024082735.42324-3-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Thomas Huth	51cdb6806f	Revert "Remove the unused sh4eb target" This reverts commit `73ceb12960`. The "r2d" machine can work in big endian mode, see: https://lore.kernel.org/qemu-devel/d6755445-1060-48a8-82b6-2f392c21f9b9@landley.net/ So the reasoning for removing sh4eb was wrong. Message-ID: <20241024082735.42324-2-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Rob Landley <rob@landley.net> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Daniel P. Berrangé	786bc22552	tests/functional: make cached asset files read-only This ensures that if a functional test runs QEMU with a writable disk pointing to a cached asset, an error will be reported, rather than silently modifying the cache file. As an example, tweaking test_sbsaref.py to set snapshot=off, results in a clear error: Command: ./build/qemu-system-aarch64 ...snip... -drive file=/var/home/berrange/.cache/qemu/download/44cdbae275ef1bb6dab1d5fbb59473d4f741e1c8ea8a80fd9e906b531d6ad461,format=raw,snapshot=off -cpu max,pauth=off Output: qemu-system-aarch64: Could not open '/var/home/berrange/.cache/qemu/download/44cdbae275ef1bb6dab1d5fbb59473d4f741e1c8ea8a80fd9e906b531d6ad461': Permission denied Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241025092659.2312118-3-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Daniel P. Berrangé	c9daf680d1	tests/functional: make tuxrun disk images writable The zstd command will preserve the input archive permissions on the output file. So when we decompress the readonly cached image, the resulting per-test run private disk image will also be readonly. We need it to be writable, so make it so. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241025092659.2312118-2-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Thomas Huth	9094f7c934	.gitlab-ci.d/cirrus: Remove the macos-15 job Cirrus-CI stopped providing the possibility to run macOS 15 jobs. Quoting https://cirrus-ci.org/guide/macOS/ : "Cirrus CI Cloud only allows ghcr.io/cirruslabs/macos-runner:sonoma image ..." If you still try to run a Sequoia image, it gets automatically "upgraded" to Sonoma instead. So the macos-15 job in the QEMU CI now does not make sense anymore, thus let's remove it. Message-ID: <20241021124722.139348-1-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 years ago
Peter Maydell	cbad455118	Migration pull request for softfreeze v2: - Patch "migration: Move cpu-throttle.c from system to migration", fix build on MacOS, and subject spelling NOTE: checkpatch.pl could report a false positive on this branch: WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #21: {include/sysemu => migration}/cpu-throttle.h \| 0 That's covered by "F: migration/" entry. Changelog: - Peter's cleanup patch on migrate_fd_cleanup() - Peter's cleanup patch to introduce thread name macros - Hanna's error path fix for vmstate subsection save()s - Hyman's auto converge enhancement on background dirty sync - Peter's additional tracepoints for save state entries - Thomas's build fix for OpenBSD in dirtyrate.c - Peter's deprecation of query-migrationthreads command - Peter's cleanup/fixes from the "export misc.h" series - Maciej's two small patches from multifd+vfio series -----BEGIN PGP SIGNATURE----- iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZyTbVRIccGV0ZXJ4QHJl ZGhhdC5jb20ACgkQO1/MzfOr1wan3wD+L4TVNDc34Hy4mvWu7u1lCOePX0GBdUEc oEeBGblwbrcBAIR8d+5z9O5YcWH1coozG1aUC4qCtSHHk5TGbJk4/UUD =XB5Q -----END PGP SIGNATURE----- Merge tag 'migration-20241030-pull-request' of https://gitlab.com/peterx/qemu into staging Migration pull request for softfreeze v2: - Patch "migration: Move cpu-throttle.c from system to migration", fix build on MacOS, and subject spelling NOTE: checkpatch.pl could report a false positive on this branch: WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #21: {include/sysemu => migration}/cpu-throttle.h \| 0 That's covered by "F: migration/" entry. Changelog: - Peter's cleanup patch on migrate_fd_cleanup() - Peter's cleanup patch to introduce thread name macros - Hanna's error path fix for vmstate subsection save()s - Hyman's auto converge enhancement on background dirty sync - Peter's additional tracepoints for save state entries - Thomas's build fix for OpenBSD in dirtyrate.c - Peter's deprecation of query-migrationthreads command - Peter's cleanup/fixes from the "export misc.h" series - Maciej's two small patches from multifd+vfio series # -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZyTbVRIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wan3wD+L4TVNDc34Hy4mvWu7u1lCOePX0GBdUEc # oEeBGblwbrcBAIR8d+5z9O5YcWH1coozG1aUC4qCtSHHk5TGbJk4/UUD # =XB5Q # -----END PGP SIGNATURE----- # gpg: Signature made Fri 01 Nov 2024 13:44:53 GMT # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [marginal] # gpg: aka "Peter Xu <peterx@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'migration-20241030-pull-request' of https://gitlab.com/peterx/qemu: migration/multifd: Zero p->flags before starting filling a packet migration/ram: Add load start trace event migration: Drop migration_is_idle() migration: Drop migration_is_setup_or_active() migration: Unexport ram_mig_init() migration: Unexport dirty_bitmap_mig_init() migration: Take migration object refcount earlier for threads migration: Deprecate query-migrationthreads command migration/dirtyrate: Silence warning about strcpy() on OpenBSD tests/migration: Add case for periodic ramblock dirty sync migration: Support periodic RAMBlock dirty bitmap sync migration: Remove "rs" parameter in migration_bitmap_sync_precopy migration: Move cpu-throttle.c from system to migration migration: Stop CPU throttling conditionally accel/tcg/icount-common: Remove the reference to the unused header file migration: Ensure vmstate_save() sets errp migration: Put thread names together with macros migration: Cleanup migrate_fd_cleanup() on accessing to_dst_file Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 years ago
Sunil Nimmagadda	9cfe110d9f	qemu-ga: Fix a SIGSEGV in ga_run_command() helper qemu-ga on a NetBSD -current VM terminates with a SIGSEGV upon receiving 'guest-set-time' command... Core was generated by `qemu-ga'. Program terminated with signal SIGSEGV, Segmentation fault. #0 0x000000000cd37a40 in ga_pipe_read_str (fd=fd@entry=0xffffff922a20, str=str@entry=0xffffff922a18) at ../qga/commands-posix.c:88 88 *str[len] = '\0'; [Current thread is 1 (process 1112)] (gdb) bt #0 0x000000000cd37a40 in ga_pipe_read_str (fd=fd@entry=0xffffff922a20, str=str@entry=0xffffff922a18) at ../qga/commands-posix.c:88 #1 0x000000000cd37b60 in ga_run_command (argv=argv@entry=0xffffff922a90, action=action@entry=0xcda34b8 "set hardware clock to system time", errp=errp@entry=0xffffff922a70, in_str=0x0) at ../qga/commands-posix.c:164 #2 0x000000000cd380c4 in qmp_guest_set_time (has_time=<optimized out>, time_ns=<optimized out>, errp=errp@entry=0xffffff922ad0) at ../qga/commands-posix.c:304 #3 0x000000000cd253d8 in qmp_marshal_guest_set_time (args=<optimized out>, ret=<optimized out>, errp=0xffffff922b48) at qga/qga-qapi-commands.c:193 #4 0x000000000cd4e71c in qmp_dispatch (cmds=cmds@entry=0xcdf5b18 <ga_commands>, request=request@entry=0xf3c711a4b000, allow_oob=allow_oob@entry=false, cur_mon=cur_mon@entry=0x0) at ../qapi/qmp-dispatch.c:220 #5 0x000000000cd36524 in process_event (opaque=0xf3c711a79000, obj=0xf3c711a4b000, err=0x0) at ../qga/main.c:677 #6 0x000000000cd526f0 in json_message_process_token (lexer=lexer@entry=0xf3c711a79018, input=0xf3c712072480, type=type@entry=JSON_RCURLY, x=28, y=1) at ../qobject/json-streamer.c:99 #7 0x000000000cd93860 in json_lexer_feed_char (lexer=lexer@entry=0xf3c711a79018, ch=125 '}', flush=flush@entry=false) at ../qobject/json-lexer.c:313 #8 0x000000000cd93a00 in json_lexer_feed (lexer=lexer@entry=0xf3c711a79018, buffer=buffer@entry=0xffffff922d10 "{\"execute\":\"guest-set-time\"}\n", size=<optimized out>) at ../qobject/json-lexer.c:350 #9 0x000000000cd5290c in json_message_parser_feed (parser=parser@entry=0xf3c711a79000, buffer=buffer@entry=0xffffff922d10 "{\"execute\":\"guest-set-time\"}\n", size=<optimized out>) at ../qobject/json-streamer.c:121 #10 0x000000000cd361fc in channel_event_cb (condition=<optimized out>, data=0xf3c711a79000) at ../qga/main.c:703 #11 0x000000000cd3710c in ga_channel_client_event (channel=<optimized out>, condition=<optimized out>, data=0xf3c711b2d300) at ../qga/channel-posix.c:94 #12 0x0000f3c7120d9bec in g_main_dispatch () from /usr/pkg/lib/libglib-2.0.so.0 #13 0x0000f3c7120dd25c in g_main_context_iterate_unlocked.constprop () from /usr/pkg/lib/libglib-2.0.so.0 #14 0x0000f3c7120ddbf0 in g_main_loop_run () from /usr/pkg/lib/libglib-2.0.so.0 #15 0x000000000cda00d8 in run_agent_once (s=0xf3c711a79000) at ../qga/main.c:1522 #16 run_agent (s=0xf3c711a79000) at ../qga/main.c:1559 #17 main (argc=<optimized out>, argv=<optimized out>) at ../qga/main.c:1671 (gdb) The commandline options used on the host machine... qemu-system-aarch64 \ -machine type=virt,pflash0=rom \ -m 8G \ -cpu host \ -smp 8 \ -accel hvf \ -device virtio-net-pci,netdev=unet \ -device virtio-blk-pci,drive=hd \ -drive file=netbsd.qcow2,if=none,id=hd \ -netdev user,id=unet,hostfwd=tcp::2223-:22 \ -object rng-random,filename=/dev/urandom,id=viornd0 \ -device virtio-rng-pci,rng=viornd0 \ -serial mon:stdio \ -display none \ -blockdev node-name=rom,driver=file,filename=/opt/homebrew/Cellar/qemu/9.0.2/share/qemu/edk2-aarch64-code.fd,read-only=true \ -chardev socket,path=/tmp/qga_netbsd.sock,server=on,wait=off,id=qga0 \ -device virtio-serial \ -device virtconsole,chardev=qga0,name=org.qemu.guest_agent.0 This patch rectifies the operator precedence while assigning the NUL terminator. Fixes: `c3f32c13a3` Signed-off-by: Sunil Nimmagadda <sunil@nimmagadda.net> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Link: https://lore.kernel.org/r/m15xppk9qg.fsf@nimmagadda.net Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>	2 years ago
Pierrick Bouvier	73aaabcf22	qga: fix missing static and prototypes windows warnings Reported by clang++, but not by g++. ../qga/vss-win32/provider.cpp:48:6: error: no previous prototype for function 'LockModule' [-Werror,-Wmissing-prototypes] 48 \| void LockModule(BOOL lock) \| ^ ../qga/vss-win32/provider.cpp:48:1: note: declare 'static' if the function is not intended to be used outside of this translation unit 48 \| void LockModule(BOOL lock) \| ^ \| static ../qga/vss-win32/provider.cpp:531:13: error: no previous prototype for function 'DllMain' [-Werror,-Wmissing-prototypes] 531 \| BOOL WINAPI DllMain(HINSTANCE hinstDll, DWORD dwReason, LPVOID lpReserved) \| ^ ../qga/vss-win32/provider.cpp:531:1: note: declare 'static' if the function is not intended to be used outside of this translation unit 531 \| BOOL WINAPI DllMain(HINSTANCE hinstDll, DWORD dwReason, LPVOID lpReserved) \| ^ \| static Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Link: https://lore.kernel.org/r/20241031040426.772604-7-pierrick.bouvier@linaro.org Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>	2 years ago
Pierrick Bouvier	24287d440b	qga: fix -Wsometimes-uninitialized windows warning Reported by clang, but not gcc. [5123/5678] Compiling C object qga/qemu-ga.exe.p/commands-windows-ssh.c.obj FAILED: qga/qemu-ga.exe.p/commands-windows-ssh.c.obj "cc" "-Iqga/qemu-ga.exe.p" "-Iqga" "-I../qga" "-I." "-Iqapi" "-Itrace" "-Iui" "-Iui/shader" "-IC:/msys64/clangarm64/include/glib-2.0" "-IC:/msys64/clangarm64/lib/glib-2.0/include" "-fdiagnostics-color=auto" "-Wall" "-Winvalid-pch" "-Werror" "-std=gnu11" "-O2" "-g" "-fstack-protector-strong" "-Wempty-body" "-Wendif-labels" "-Wexpansion-to-defined" "-Wformat-security" "-Wformat-y2k" "-Wignored-qualifiers" "-Winit-self" "-Wmissing-format-attribute" "-Wmissing-prototypes" "-Wnested-externs" "-Wold-style-definition" "-Wredundant-decls" "-Wstrict-prototypes" "-Wtype-limits" "-Wundef" "-Wvla" "-Wwrite-strings" "-Wno-gnu-variable-sized-type-not-at-end" "-Wno-initializer-overrides" "-Wno-missing-include-dirs" "-Wno-psabi" "-Wno-shift-negative-value" "-Wno-string-plus-int" "-Wno-tautological-type-limit-compare" "-Wno-typedef-redefinition" "-Wthread-safety" "-iquote" "." "-iquote" "C:/w/qemu" "-iquote" "C:/w/qemu/include" "-iquote" "C:/w/qemu/host/include/aarch64" "-iquote" "C:/w/qemu/host/include/generic" "-iquote" "C:/w/qemu/tcg/aarch64" "-D_GNU_SOURCE" "-D_FILE_OFFSET_BITS=64" "-D_LARGEFILE_SOURCE" "-fno-strict-aliasing" "-fno-common" "-fwrapv" "-fno-pie" "-ftrivial-auto-var-init=zero" "-fzero-call-used-regs=used-gpr" -MD -MQ qga/qemu-ga.exe.p/commands-windows-ssh.c.obj -MF "qga/qemu-ga.exe.p/commands-windows-ssh.c.obj.d" -o qga/qemu-ga.exe.p/commands-windows-ssh.c.obj "-c" ../qga/commands-windows-ssh.c ../qga/commands-windows-ssh.c:383:9: error: variable 'userPSID' is used uninitialized whenever 'if' condition is true [-Werror,-Wsometimes-uninitialized] 383 \| if (!create_acl(userInfo, &pACL, errp)) { \| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../qga/commands-windows-ssh.c:415:15: note: uninitialized use occurs here 415 \| LocalFree(userPSID); \| ^~~~~~~~ ../qga/commands-windows-ssh.c:383:5: note: remove the 'if' if its condition is always false 383 \| if (!create_acl(userInfo, &pACL, errp)) { \| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 384 \| goto error; \| ~~~~~~~~~~~ 385 \| } \| ~ ../qga/commands-windows-ssh.c:380:18: note: initialize the variable 'userPSID' to silence this warning 380 \| PSID userPSID; \| ^ \| = NULL 1 error generated. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Link: https://lore.kernel.org/r/20241031040426.772604-6-pierrick.bouvier@linaro.org Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>	2 years ago
Cédric Le Goater	e8f3acdbb8	aspeed: Don't set always boot properties of the emmc device Commit `e554e45b44` ("aspeed: Tune eMMC device properties to reflect HW strapping") added support to boot from an eMMC device by setting the boot properties of the eMMC device. This change made the assumption that the device always has boot areas. However, if the machine boots from the flash device (or -kernel) and uses an eMMC device without boot areas, support would be broken. This impacts the ast2600-evb machine which can choose to boot from flash or eMMC using the "boot-emmc" machine option. To provide some flexibility for Aspeed machine users to use different flavors of eMMC devices (with or without boot areas), do not set the eMMC device boot properties when the machine is not configured to boot from eMMC. However, this approach makes another assumption about eMMC devices, namely that eMMC devices from which the machine does not boot do not have boot areas. A preferable alternative would be to add support for user creatable eMMC devices and define the device boot properties on the QEMU command line : -blockdev node-name=emmc0,driver=file,filename=mmc-ast2600-evb.raw \ -device emmc,bus=sdhci-bus.2,drive=emmc0,boot-partition-size=1048576,boot-config=8 This is a global change requiring more thinking. Nevertheless, in the case of the ast2600-evb machine booting from an eMMC device and when default devices are created, the proposed change still makes sense since the device is required to have boot areas. Cc: Jan Luebbe <jlu@pengutronix.de> Fixes: `e554e45b44` ("aspeed: Tune eMMC device properties to reflect HW strapping") Signed-off-by: Cédric Le Goater <clg@redhat.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Jan Luebbe <jlu@pengutronix.de> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org>	2 years ago
Jamin Lin	22b3c557ff	aspeed: Support create flash devices via command line for AST1030 Add a "if-statement" in aspeed_minibmc_machine_init function. If users add "-nodefaults" in command line, the flash devices should be created by users setting. Otherwise, the flash devices are created at machine init. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>	2 years ago
Jamin Lin	53b3169269	hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0 and 1 The size of SDHCI capabilities register is 64bits, so introduces new Capabilities Register 2 for SD slot 0 (0x144) and SD slot1 (0x244). Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> [ clg: Fixed code alignment ] Signed-off-by: Cédric Le Goater <clg@redhat.com>	2 years ago
Jamin Lin	d3d6def468	hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600 According to the datasheet of AST2600 description, interrupt status set by HW and clear to "0" by software writing "1" on the specific bit. Therefore, if firmware set the specific bit "1" in the interrupt status register(0x34), the specific bit of "s->irq_sts" should be cleared 0. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Fixes: `fadefada4d` ("aspeed/timer: Add support for IRQ status register on the AST2600") Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Reviewed-by: Cédric Le Goater <clg@redhat.com>	2 years ago
Jamin Lin	82a919f8f1	hw/timer/aspeed: Fix coding style Fix coding style issues from checkpatch.pl Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>	2 years ago
Jamin Lin	fc2693cc35	aspeed/soc: Support RTC for AST2700 The RTC controller between AST2600 and AST2700 are identical. Add RTC model for AST2700 RTC support. The RTC controller registers base address is start at 0x12C0_F000 and its alarm interrupt is connected to GICINT13. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>	2 years ago
Peter Maydell	1f67508c1c	hw/arm/aspeed_ast27x0: Avoid hardcoded '256' in IRQ calculation When calculating the index into the GIC's GPIO array for per-CPU interrupts, we have to start with the number of SPIs. The code currently hard-codes this to 'NUM_IRQS = 256'. However the number of SPIs is set separately and implicitly by the value of AST2700_MAX_IRQ, which is the number of SPIs plus 32 (since it is what we set the GIC num-irq property to). Define AST2700_MAX_IRQ as the total number of SPIs; this brings AST2700 into line with AST2600, which defines AST2600_MAX_IRQ as the number of SPIs not including the 32 internal interrupts. We can then use AST2700_MAX_IRQ instead of the hardcoded 256. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>	2 years ago
Peter Maydell	ed680effe3	hw/arm/aspeed_ast27x0: Use bsa.h for PPI definitions Use the private peripheral interrupt definitions from bsa.h instead of defining them locally. Note that bsa.h defines these values as INTID values, which are all 16 greater than the PPI values that we were previously using. So we refactor the code to use INTID-based values to match that. This is the same thing we did in commit `d40ab068c0` for sbsa-ref. It removes the "same constant, different values" confusion where this board code and bsa.h both define an ARCH_GIC_MAINT_IRQ, and allows us to use symbolic names for the timer interrupt IDs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>	2 years ago
Jan Luebbe	c078298301	hw/sd/sdcard: Fix calculation of size when using eMMC boot partitions The sd_bootpart_offset() function calculates the runtime offset which changes as the guest switches between accessing the main user data area and the boot partitions by writing to the EXT_CSD_PART_CONFIG_ACC_MASK bits, so it shouldn't be used to calculate the main user data area size. Instead, subtract the boot_part_size directly (twice, as there are two identical boot partitions defined by the eMMC spec). Suggested-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Fixes: `c8cb19876d` ("hw/sd/sdcard: Support boot area in emmc image") Tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Cédric Le Goater <clg@redhat.com>	2 years ago
Patrick Leis	deb771d8f3	hw/arm: enable at24c with aspeed Enable AT24C with ASPEED in the KConfig because the boards build this device. Signed-off-by: Patrick Leis <venture@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>	2 years ago
David Gibson	bd4be4d9bd	MAINTAINERS: Remove myself as reviewer I've now well and truly moved on from ppc and qemu maintenance. I'm occupied with other things and am pretty much just ignoring mails on these topics I'm CCed on. Time to remove myself. I'm still listed as a reviewer for Device Tree, I'll keep this for now, since I do have some interest and it's lower volume. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
Cédric Le Goater	98a8ac1e65	MAINTAINERS: Remove myself from XIVE Working on XIVE has been one of the most complex and fascinating experiences for me. It's been a real journey, and now it's time for IBM to take over and guide its future. I'm stepping back as the maintainer of XIVE. Cc: Michael Kowal <kowal@linux.ibm.com> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Frédéric Barrat <fbarrat@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
Cédric Le Goater	592d51803e	MAINTAINERS: Remove myself from the PowerNV machines It's been an amazing experience working on PowerNV systems all these years. Now it's time for IBM to take the lead on the QEMU machine and shape its future. I'm stepping back as the maintainer of PowerNV. Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Frédéric Barrat <fbarrat@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
BALATON Zoltan	afff880071	hw/ppc: Consolidate ppc440 initial mapping creation functions Add a utility function and use it to replace very similar create_initial_mapping functions in 440 based machines. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
BALATON Zoltan	779a30df98	hw/ppc: Consolidate e500 initial mapping creation functions Add booke206_set_tlb() utility function and use it to replace very similar create_initial_mapping functions in e500 machines. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
Frederic Barrat	31bfbc00d0	tests/qtest: Add XIVE tests for the powernv10 machine These XIVE tests include: - General interrupt IRQ tests that: - enable and trigger an interrupt - acknowledge the interrupt - end of interrupt processing - Test the Pull Thread Context to Odd Thread Reporting Line - Test the different cache flush inject and queue sync inject operations Co-authored-by: Frederic Barrat <fbarrat@linux.ibm.com> Co-authored-by: Glenn Miles <milesg@linux.ibm.com> Co-authored-by: Michael Kowal <kowal@linux.ibm.com> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
Michael Kowal	85eed50753	pnv/xive2: TIMA CI ops using alternative offsets or byte lengths Some of the TIMA Special CI operations perform the same operation at alternative byte offsets and lengths. The following xive2_tm_opertions[] table entries are missing when they exist for other offsets/sizes and have been added: - lwz@0x810 Pull/Invalidate O/S Context to register added lwz@0x818 exists ld @0x818 exists - lwz@0x820 Pull Pool Context to register added lwz@0x828 exists ld @0x828 exists - lwz@0x830 Pull Thread Context to register added lbz@0x838 exists Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
Glenn Miles	4598ed2545	pnv/xive2: TIMA support for 8-byte OS context push for PHYP PHYP uses 8-byte writes to the 2nd doubleword of the OS context line when dispatching an OS level virtual processor. This support was not used by OPAL/Linux and so was never added. Without this support, the XIVE code doesn't notice that a new context is being pushed and fails to check for unpresented pending interrupts for that context. Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
Glenn Miles	4153139319	pnv/xive: Update PIPR when updating CPPR Current code was updating the PIPR inside the xive_tctx_accept() function instead of the xive_tctx_set_cppr function, which is where the HW would have it updated. Moved the update to the xive_tctx_set_cppr function which required additional support for pool interrupts. Fixes: `cdd4de68ed` ("ppc/xive: notify the CPU when the interrupt priority is more privileged") Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago
Glenn Miles	a9bb09678a	pnv/xive: Add special handling for pool targets Hypervisor "pool" targets do not get their own interrupt line and instead must share an interrupt line with the hypervisor "physical" targets. This also means that the pool ring must use some of the registers from the physical ring in the TIMA. Specifically, the NSR, PIPR and CPPR registers: NSR = Notification Source Register PIPR = Post Interrupt Priority Register CPPR = Current Processor Priority Register The NSR specifies that there is an active interrupt. The CPPR specifies the priority of the context and the PIPR specifies the priority of the interrupt. For an interrupt to be presented to a context, the priority of the interrupt must be higher than the priority of the context it is interrupting (value must be lower). The existing code was not aware of the sharing of these registers. This commit adds that support. Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>	2 years ago

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