Tree:
c2fc83e83d
10.1-testing
99888-virtio-zero-init-c9s
block
coverity
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-10.0
stable-10.1
stable-10.2
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.0-staging
stable-6.1
stable-7.2
stable-7.2-staging
stable-8.0
stable-8.0-staging
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-0.0
staging-10.0
staging-10.1
staging-10.2
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
staging-mjt-test
stsquad-hotfix
tracing
initial
release_0_10_0
release_0_10_1
release_0_10_2
release_0_5_1
release_0_6_0
release_0_6_1
release_0_7_0
release_0_7_1
release_0_8_1
release_0_8_2
release_0_9_0
release_0_9_1
staging-mjt-test
trivial-patches-pull-request
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v2.11.1
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v2.12.0
v2.12.0-rc0
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v2.3.0-rc0
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v2.3.1
v2.4.0
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v2.4.0.1
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v2.8.0-rc0
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v2.8.0-rc3
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v2.8.1
v2.8.1.1
v2.9.0
v2.9.0-rc0
v2.9.0-rc1
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v2.9.1
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v3.0.0-rc4
v3.0.1
v3.1.0
v3.1.0-rc0
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v3.1.1
v3.1.1.1
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${ noResults }
1 Commits (c2fc83e83d4fbc6f63b2b0f0be898374e6ddc78f)
| Author | SHA1 | Message | Date |
|---|---|---|---|
Paolo Bonzini
|
022c62cbbc |
exec: move include files to include/exec/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
14 years ago |
Blue Swirl
|
efbf29b681 |
Document softmmu templates
Add some comments to describe each file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> |
15 years ago |
Igor V. Kovalenko
|
2065061ede |
sparc64: handle asi referencing nucleus and secondary MMU contexts
- increase max supported MMU modes to 6 - handle nucleus context asi - handle secondary context asi - handle non-faulting loads from secondary context Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> |
16 years ago |
aurel32
|
e37e6ee6e1 |
Allow 5 mmu indexes.
This is necessary for alpha because it has 4 protection levels and pal mode. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7028 c046a42c-6fe2-441c-8c8c-71466251a162 |
17 years ago |
blueswir1
|
79383c9c08 |
Fix some warnings that would be generated by gcc -Wredundant-decls
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162 |
18 years ago |
j_mayer
|
6ebbf39000 |
Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162 |
19 years ago |
bellard
|
a9049a07bb |
moved common softmmu code to common header (Paul Brook)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162 |
21 years ago |