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${ noResults }
245 Commits (b0129a14a4fb34b2a3e3ac816dd74bd6391027e6)
| Author | SHA1 | Message | Date |
|---|---|---|---|
Mohamed Mediouni
|
5f52ba1f34 |
qtest: hw/arm: virt: add ACPI tables for new GICv3 + GICv2m test case
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
2 months ago |
|
Mohamed Mediouni
|
2e1bb23b44 |
tests: data: update AArch64 ACPI tables
After the previous commit introducing GICv3 + GICv2m configurations,
update the AArch64 ACPI tables for the GICv2 case.
Changes to the ACPI tables:
tests/data/acpi/aarch64/virt/IORT.dsl:
@@ -11,68 +11,49 @@
*/
[000h 0000 004h] Signature : "IORT" [IO Remapping Table]
-[004h 0004 004h] Table Length : 00000080
+[004h 0004 004h] Table Length : 00000054
[008h 0008 001h] Revision : 05
-[009h 0009 001h] Checksum : B1
+[009h 0009 001h] Checksum : 3C
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
-[024h 0036 004h] Node Count : 00000002
+[024h 0036 004h] Node Count : 00000001
[028h 0040 004h] Node Offset : 00000030
[02Ch 0044 004h] Reserved : 00000000
-[030h 0048 001h] Type : 00
-[031h 0049 002h] Length : 0018
-[033h 0051 001h] Revision : 01
+[030h 0048 001h] Type : 02
+[031h 0049 002h] Length : 0024
+[033h 0051 001h] Revision : 03
[034h 0052 004h] Identifier : 00000000
[038h 0056 004h] Mapping Count : 00000000
-[03Ch 0060 004h] Mapping Offset : 00000000
+[03Ch 0060 004h] Mapping Offset : 00000024
-[040h 0064 004h] ItsCount : 00000001
-[044h 0068 004h] Identifiers : 00000000
-
-[048h 0072 001h] Type : 02
-[049h 0073 002h] Length : 0038
-[04Bh 0075 001h] Revision : 03
-[04Ch 0076 004h] Identifier : 00000001
-[050h 0080 004h] Mapping Count : 00000001
-[054h 0084 004h] Mapping Offset : 00000024
-
-[058h 0088 008h] Memory Properties : [IORT Memory Access Properties]
-[058h 0088 004h] Cache Coherency : 00000001
-[05Ch 0092 001h] Hints (decoded below) : 00
+[040h 0064 008h] Memory Properties : [IORT Memory Access Properties]
+[040h 0064 004h] Cache Coherency : 00000001
+[044h 0068 001h] Hints (decoded below) : 00
Transient : 0
Write Allocate : 0
Read Allocate : 0
Override : 0
-[05Dh 0093 002h] Reserved : 0000
-[05Fh 0095 001h] Memory Flags (decoded below) : 03
+[045h 0069 002h] Reserved : 0000
+[047h 0071 001h] Memory Flags (decoded below) : 03
Coherency : 1
Device Attribute : 1
Ensured Coherency of Accesses : 0
-[060h 0096 004h] ATS Attribute : 00000000
-[064h 0100 004h] PCI Segment Number : 00000000
-[068h 0104 001h] Memory Size Limit : 40
-[069h 0105 002h] PASID Capabilities : 0000
-[06Bh 0107 001h] Reserved : 00
+[048h 0072 004h] ATS Attribute : 00000000
+[04Ch 0076 004h] PCI Segment Number : 00000000
+[050h 0080 001h] Memory Size Limit : 40
+[051h 0081 002h] PASID Capabilities : 0000
+[053h 0083 001h] Reserved : 00
-[06Ch 0108 004h] Input base : 00000000
-[070h 0112 004h] ID Count : 0000FFFF
-[074h 0116 004h] Output Base : 00000000
-[078h 0120 004h] Output Reference : 00000030
-[07Ch 0124 004h] Flags (decoded below) : 00000000
- Single Mapping : 0
+Raw Table Data: Length 84 (0x54)
-Raw Table Data: Length 128 (0x80)
-
- 0000: 49 4F 52 54 80 00 00 00 05 B1 42 4F 43 48 53 20 // IORT......BOCHS
+ 0000: 49 4F 52 54 54 00 00 00 05 3C 42 4F 43 48 53 20 // IORTT....<BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
- 0020: 01 00 00 00 02 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
- 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................
- 0040: 01 00 00 00 00 00 00 00 02 38 00 03 01 00 00 00 // .........8......
- 0050: 01 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$...........
- 0060: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@.......
- 0070: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
+ 0020: 01 00 00 00 01 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
+ 0030: 02 24 00 03 00 00 00 00 00 00 00 00 24 00 00 00 // .$..........$...
+ 0040: 01 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 // ................
+ 0050: 40 00 00 00 // @...
tests/data/acpi/aarch64/virt/IORT.smmuv3-dev.dsl:
@@ -11,164 +11,120 @@
*/
[000h 0000 004h] Signature : "IORT" [IO Remapping Table]
-[004h 0004 004h] Table Length : 0000016C
+[004h 0004 004h] Table Length : 00000104
[008h 0008 001h] Revision : 05
-[009h 0009 001h] Checksum : C8
+[009h 0009 001h] Checksum : 49
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
-[024h 0036 004h] Node Count : 00000004
+[024h 0036 004h] Node Count : 00000003
[028h 0040 004h] Node Offset : 00000030
[02Ch 0044 004h] Reserved : 00000000
-[030h 0048 001h] Type : 00
-[031h 0049 002h] Length : 0018
-[033h 0051 001h] Revision : 01
+[030h 0048 001h] Type : 04
+[031h 0049 002h] Length : 0044
+[033h 0051 001h] Revision : 04
[034h 0052 004h] Identifier : 00000000
[038h 0056 004h] Mapping Count : 00000000
[03Ch 0060 004h] Mapping Offset : 00000000
-[040h 0064 004h] ItsCount : 00000001
-[044h 0068 004h] Identifiers : 00000000
-
-[048h 0072 001h] Type : 04
-[049h 0073 002h] Length : 0058
-[04Bh 0075 001h] Revision : 04
-[04Ch 0076 004h] Identifier : 00000001
-[050h 0080 004h] Mapping Count : 00000001
-[054h 0084 004h] Mapping Offset : 00000044
-
-[058h 0088 008h] Base Address : 000000000C000000
-[060h 0096 004h] Flags (decoded below) : 00000001
+[040h 0064 008h] Base Address : 000000000C000000
+[048h 0072 004h] Flags (decoded below) : 00000001
COHACC Override : 1
HTTU Override : 0
Proximity Domain Valid : 0
DeviceID Valid : 0
-[064h 0100 004h] Reserved : 00000000
-[068h 0104 008h] VATOS Address : 0000000000000000
-[070h 0112 004h] Model : 00000000
-[074h 0116 004h] Event GSIV : 00000090
-[078h 0120 004h] PRI GSIV : 00000091
-[07Ch 0124 004h] GERR GSIV : 00000093
-[080h 0128 004h] Sync GSIV : 00000092
-[084h 0132 004h] Proximity Domain : 00000000
-[088h 0136 004h] Device ID Mapping Index : 00000000
+[04Ch 0076 004h] Reserved : 00000000
+[050h 0080 008h] VATOS Address : 0000000000000000
+[058h 0088 004h] Model : 00000000
+[05Ch 0092 004h] Event GSIV : 00000090
+[060h 0096 004h] PRI GSIV : 00000091
+[064h 0100 004h] GERR GSIV : 00000093
+[068h 0104 004h] Sync GSIV : 00000092
+[06Ch 0108 004h] Proximity Domain : 00000000
+[070h 0112 004h] Device ID Mapping Index : 00000000
-[08Ch 0140 004h] Input base : 00000000
-[090h 0144 004h] ID Count : 0000FFFF
-[094h 0148 004h] Output Base : 00000000
-[098h 0152 004h] Output Reference : 00000030
-[09Ch 0156 004h] Flags (decoded below) : 00000000
- Single Mapping : 0
+[074h 0116 001h] Type : 04
+[075h 0117 002h] Length : 0044
+[077h 0119 001h] Revision : 04
+[078h 0120 004h] Identifier : 00000001
+[07Ch 0124 004h] Mapping Count : 00000000
+[080h 0128 004h] Mapping Offset : 00000000
-[0A0h 0160 001h] Type : 04
-[0A1h 0161 002h] Length : 0058
-[0A3h 0163 001h] Revision : 04
-[0A4h 0164 004h] Identifier : 00000002
-[0A8h 0168 004h] Mapping Count : 00000001
-[0ACh 0172 004h] Mapping Offset : 00000044
-
-[0B0h 0176 008h] Base Address : 000000000C020000
-[0B8h 0184 004h] Flags (decoded below) : 00000001
+[084h 0132 008h] Base Address : 000000000C020000
+[08Ch 0140 004h] Flags (decoded below) : 00000001
COHACC Override : 1
HTTU Override : 0
Proximity Domain Valid : 0
DeviceID Valid : 0
-[0BCh 0188 004h] Reserved : 00000000
-[0C0h 0192 008h] VATOS Address : 0000000000000000
-[0C8h 0200 004h] Model : 00000000
-[0CCh 0204 004h] Event GSIV : 00000094
-[0D0h 0208 004h] PRI GSIV : 00000095
-[0D4h 0212 004h] GERR GSIV : 00000097
-[0D8h 0216 004h] Sync GSIV : 00000096
-[0DCh 0220 004h] Proximity Domain : 00000000
-[0E0h 0224 004h] Device ID Mapping Index : 00000000
+[090h 0144 004h] Reserved : 00000000
+[094h 0148 008h] VATOS Address : 0000000000000000
+[09Ch 0156 004h] Model : 00000000
+[0A0h 0160 004h] Event GSIV : 00000094
+[0A4h 0164 004h] PRI GSIV : 00000095
+[0A8h 0168 004h] GERR GSIV : 00000097
+[0ACh 0172 004h] Sync GSIV : 00000096
+[0B0h 0176 004h] Proximity Domain : 00000000
+[0B4h 0180 004h] Device ID Mapping Index : 00000000
-[0E4h 0228 004h] Input base : 00000000
-[0E8h 0232 004h] ID Count : 0000FFFF
-[0ECh 0236 004h] Output Base : 00000000
-[0F0h 0240 004h] Output Reference : 00000030
-[0F4h 0244 004h] Flags (decoded below) : 00000000
- Single Mapping : 0
+[0B8h 0184 001h] Type : 02
+[0B9h 0185 002h] Length : 004C
+[0BBh 0187 001h] Revision : 03
+[0BCh 0188 004h] Identifier : 00000002
+[0C0h 0192 004h] Mapping Count : 00000002
+[0C4h 0196 004h] Mapping Offset : 00000024
-[0F8h 0248 001h] Type : 02
-[0F9h 0249 002h] Length : 0074
-[0FBh 0251 001h] Revision : 03
-[0FCh 0252 004h] Identifier : 00000003
-[100h 0256 004h] Mapping Count : 00000004
-[104h 0260 004h] Mapping Offset : 00000024
-
-[108h 0264 008h] Memory Properties : [IORT Memory Access Properties]
-[108h 0264 004h] Cache Coherency : 00000001
-[10Ch 0268 001h] Hints (decoded below) : 00
+[0C8h 0200 008h] Memory Properties : [IORT Memory Access Properties]
+[0C8h 0200 004h] Cache Coherency : 00000001
+[0CCh 0204 001h] Hints (decoded below) : 00
Transient : 0
Write Allocate : 0
Read Allocate : 0
Override : 0
-[10Dh 0269 002h] Reserved : 0000
-[10Fh 0271 001h] Memory Flags (decoded below) : 03
+[0CDh 0205 002h] Reserved : 0000
+[0CFh 0207 001h] Memory Flags (decoded below) : 03
Coherency : 1
Device Attribute : 1
Ensured Coherency of Accesses : 0
-[110h 0272 004h] ATS Attribute : 00000000
-[114h 0276 004h] PCI Segment Number : 00000000
-[118h 0280 001h] Memory Size Limit : 40
-[119h 0281 002h] PASID Capabilities : 0000
-[11Bh 0283 001h] Reserved : 00
+[0D0h 0208 004h] ATS Attribute : 00000000
+[0D4h 0212 004h] PCI Segment Number : 00000000
+[0D8h 0216 001h] Memory Size Limit : 40
+[0D9h 0217 002h] PASID Capabilities : 0000
+[0DBh 0219 001h] Reserved : 00
-[11Ch 0284 004h] Input base : 00000000
-[120h 0288 004h] ID Count : 000001FF
-[124h 0292 004h] Output Base : 00000000
-[128h 0296 004h] Output Reference : 00000048
-[12Ch 0300 004h] Flags (decoded below) : 00000000
+[0DCh 0220 004h] Input base : 00000000
+[0E0h 0224 004h] ID Count : 000001FF
+[0E4h 0228 004h] Output Base : 00000000
+[0E8h 0232 004h] Output Reference : 00000030
+[0ECh 0236 004h] Flags (decoded below) : 00000000
Single Mapping : 0
-[130h 0304 004h] Input base : 00001000
-[134h 0308 004h] ID Count : 000000FF
-[138h 0312 004h] Output Base : 00001000
-[13Ch 0316 004h] Output Reference : 000000A0
-[140h 0320 004h] Flags (decoded below) : 00000000
+[0F0h 0240 004h] Input base : 00001000
+[0F4h 0244 004h] ID Count : 000000FF
+[0F8h 0248 004h] Output Base : 00001000
+[0FCh 0252 004h] Output Reference : 00000074
+[100h 0256 004h] Flags (decoded below) : 00000000
Single Mapping : 0
-[144h 0324 004h] Input base : 00000200
-[148h 0328 004h] ID Count : 00000DFF
-[14Ch 0332 004h] Output Base : 00000200
-[150h 0336 004h] Output Reference : 00000030
-[154h 0340 004h] Flags (decoded below) : 00000000
- Single Mapping : 0
+Raw Table Data: Length 260 (0x104)
-[158h 0344 004h] Input base : 00001100
-[15Ch 0348 004h] ID Count : 0000EEFF
-[160h 0352 004h] Output Base : 00001100
-[164h 0356 004h] Output Reference : 00000030
-[168h 0360 004h] Flags (decoded below) : 00000000
- Single Mapping : 0
-
-Raw Table Data: Length 364 (0x16C)
-
- 0000: 49 4F 52 54 6C 01 00 00 05 C8 42 4F 43 48 53 20 // IORTl.....BOCHS
+ 0000: 49 4F 52 54 04 01 00 00 05 49 42 4F 43 48 53 20 // IORT.....IBOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
- 0020: 01 00 00 00 04 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
- 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................
- 0040: 01 00 00 00 00 00 00 00 04 58 00 04 01 00 00 00 // .........X......
- 0050: 01 00 00 00 44 00 00 00 00 00 00 0C 00 00 00 00 // ....D...........
- 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
- 0070: 00 00 00 00 90 00 00 00 91 00 00 00 93 00 00 00 // ................
- 0080: 92 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
- 0090: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
- 00A0: 04 58 00 04 02 00 00 00 01 00 00 00 44 00 00 00 // .X..........D...
- 00B0: 00 00 02 0C 00 00 00 00 01 00 00 00 00 00 00 00 // ................
- 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 94 00 00 00 // ................
- 00D0: 95 00 00 00 97 00 00 00 96 00 00 00 00 00 00 00 // ................
- 00E0: 00 00 00 00 00 00 00 00 FF FF 00 00 00 00 00 00 // ................
- 00F0: 30 00 00 00 00 00 00 00 02 74 00 03 03 00 00 00 // 0........t......
- 0100: 04 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$...........
- 0110: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@.......
- 0120: FF 01 00 00 00 00 00 00 48 00 00 00 00 00 00 00 // ........H.......
- 0130: 00 10 00 00 FF 00 00 00 00 10 00 00 A0 00 00 00 // ................
- 0140: 00 00 00 00 00 02 00 00 FF 0D 00 00 00 02 00 00 // ................
- 0150: 30 00 00 00 00 00 00 00 00 11 00 00 FF EE 00 00 // 0...............
- 0160: 00 11 00 00 30 00 00 00 00 00 00 00 // ....0.......
+ 0020: 01 00 00 00 03 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
+ 0030: 04 44 00 04 00 00 00 00 00 00 00 00 00 00 00 00 // .D..............
+ 0040: 00 00 00 0C 00 00 00 00 01 00 00 00 00 00 00 00 // ................
+ 0050: 00 00 00 00 00 00 00 00 00 00 00 00 90 00 00 00 // ................
+ 0060: 91 00 00 00 93 00 00 00 92 00 00 00 00 00 00 00 // ................
+ 0070: 00 00 00 00 04 44 00 04 01 00 00 00 00 00 00 00 // .....D..........
+ 0080: 00 00 00 00 00 00 02 0C 00 00 00 00 01 00 00 00 // ................
+ 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
+ 00A0: 94 00 00 00 95 00 00 00 97 00 00 00 96 00 00 00 // ................
+ 00B0: 00 00 00 00 00 00 00 00 02 4C 00 03 02 00 00 00 // .........L......
+ 00C0: 02 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$...........
+ 00D0: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@.......
+ 00E0: FF 01 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
+ 00F0: 00 10 00 00 FF 00 00 00 00 10 00 00 74 00 00 00 // ............t...
+ 0100: 00 00 00 00 // ....
tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy.dsl:
@@ -11,129 +11,92 @@
*/
[000h 0000 004h] Signature : "IORT" [IO Remapping Table]
-[004h 0004 004h] Table Length : 00000114
+[004h 0004 004h] Table Length : 000000C0
[008h 0008 001h] Revision : 05
-[009h 0009 001h] Checksum : 4A
+[009h 0009 001h] Checksum : 1C
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
-[024h 0036 004h] Node Count : 00000003
+[024h 0036 004h] Node Count : 00000002
[028h 0040 004h] Node Offset : 00000030
[02Ch 0044 004h] Reserved : 00000000
-[030h 0048 001h] Type : 00
-[031h 0049 002h] Length : 0018
-[033h 0051 001h] Revision : 01
+[030h 0048 001h] Type : 04
+[031h 0049 002h] Length : 0044
+[033h 0051 001h] Revision : 04
[034h 0052 004h] Identifier : 00000000
[038h 0056 004h] Mapping Count : 00000000
[03Ch 0060 004h] Mapping Offset : 00000000
-[040h 0064 004h] ItsCount : 00000001
-[044h 0068 004h] Identifiers : 00000000
-
-[048h 0072 001h] Type : 04
-[049h 0073 002h] Length : 0058
-[04Bh 0075 001h] Revision : 04
-[04Ch 0076 004h] Identifier : 00000001
-[050h 0080 004h] Mapping Count : 00000001
-[054h 0084 004h] Mapping Offset : 00000044
-
-[058h 0088 008h] Base Address : 0000000009050000
-[060h 0096 004h] Flags (decoded below) : 00000001
+[040h 0064 008h] Base Address : 0000000009050000
+[048h 0072 004h] Flags (decoded below) : 00000001
COHACC Override : 1
HTTU Override : 0
Proximity Domain Valid : 0
DeviceID Valid : 0
-[064h 0100 004h] Reserved : 00000000
-[068h 0104 008h] VATOS Address : 0000000000000000
-[070h 0112 004h] Model : 00000000
-[074h 0116 004h] Event GSIV : 0000006A
-[078h 0120 004h] PRI GSIV : 0000006B
-[07Ch 0124 004h] GERR GSIV : 0000006D
-[080h 0128 004h] Sync GSIV : 0000006C
-[084h 0132 004h] Proximity Domain : 00000000
-[088h 0136 004h] Device ID Mapping Index : 00000000
+[04Ch 0076 004h] Reserved : 00000000
+[050h 0080 008h] VATOS Address : 0000000000000000
+[058h 0088 004h] Model : 00000000
+[05Ch 0092 004h] Event GSIV : 0000006A
+[060h 0096 004h] PRI GSIV : 0000006B
+[064h 0100 004h] GERR GSIV : 0000006D
+[068h 0104 004h] Sync GSIV : 0000006C
+[06Ch 0108 004h] Proximity Domain : 00000000
+[070h 0112 004h] Device ID Mapping Index : 00000000
-[08Ch 0140 004h] Input base : 00000000
-[090h 0144 004h] ID Count : 0000FFFF
-[094h 0148 004h] Output Base : 00000000
-[098h 0152 004h] Output Reference : 00000030
-[09Ch 0156 004h] Flags (decoded below) : 00000000
- Single Mapping : 0
+[074h 0116 001h] Type : 02
+[075h 0117 002h] Length : 004C
+[077h 0119 001h] Revision : 03
+[078h 0120 004h] Identifier : 00000001
+[07Ch 0124 004h] Mapping Count : 00000002
+[080h 0128 004h] Mapping Offset : 00000024
-[0A0h 0160 001h] Type : 02
-[0A1h 0161 002h] Length : 0074
-[0A3h 0163 001h] Revision : 03
-[0A4h 0164 004h] Identifier : 00000002
-[0A8h 0168 004h] Mapping Count : 00000004
-[0ACh 0172 004h] Mapping Offset : 00000024
-
-[0B0h 0176 008h] Memory Properties : [IORT Memory Access Properties]
-[0B0h 0176 004h] Cache Coherency : 00000001
-[0B4h 0180 001h] Hints (decoded below) : 00
+[084h 0132 008h] Memory Properties : [IORT Memory Access Properties]
+[084h 0132 004h] Cache Coherency : 00000001
+[088h 0136 001h] Hints (decoded below) : 00
Transient : 0
Write Allocate : 0
Read Allocate : 0
Override : 0
-[0B5h 0181 002h] Reserved : 0000
-[0B7h 0183 001h] Memory Flags (decoded below) : 03
+[089h 0137 002h] Reserved : 0000
+[08Bh 0139 001h] Memory Flags (decoded below) : 03
Coherency : 1
Device Attribute : 1
Ensured Coherency of Accesses : 0
-[0B8h 0184 004h] ATS Attribute : 00000000
-[0BCh 0188 004h] PCI Segment Number : 00000000
-[0C0h 0192 001h] Memory Size Limit : 40
-[0C1h 0193 002h] PASID Capabilities : 0000
-[0C3h 0195 001h] Reserved : 00
+[08Ch 0140 004h] ATS Attribute : 00000000
+[090h 0144 004h] PCI Segment Number : 00000000
+[094h 0148 001h] Memory Size Limit : 40
+[095h 0149 002h] PASID Capabilities : 0000
+[097h 0151 001h] Reserved : 00
-[0C4h 0196 004h] Input base : 00000000
-[0C8h 0200 004h] ID Count : 000001FF
-[0CCh 0204 004h] Output Base : 00000000
-[0D0h 0208 004h] Output Reference : 00000048
-[0D4h 0212 004h] Flags (decoded below) : 00000000
+[098h 0152 004h] Input base : 00000000
+[09Ch 0156 004h] ID Count : 000001FF
+[0A0h 0160 004h] Output Base : 00000000
+[0A4h 0164 004h] Output Reference : 00000030
+[0A8h 0168 004h] Flags (decoded below) : 00000000
Single Mapping : 0
-[0D8h 0216 004h] Input base : 00001000
-[0DCh 0220 004h] ID Count : 000000FF
-[0E0h 0224 004h] Output Base : 00001000
-[0E4h 0228 004h] Output Reference : 00000048
-[0E8h 0232 004h] Flags (decoded below) : 00000000
+[0ACh 0172 004h] Input base : 00001000
+[0B0h 0176 004h] ID Count : 000000FF
+[0B4h 0180 004h] Output Base : 00001000
+[0B8h 0184 004h] Output Reference : 00000030
+[0BCh 0188 004h] Flags (decoded below) : 00000000
Single Mapping : 0
-[0ECh 0236 004h] Input base : 00000200
-[0F0h 0240 004h] ID Count : 00000DFF
-[0F4h 0244 004h] Output Base : 00000200
-[0F8h 0248 004h] Output Reference : 00000030
-[0FCh 0252 004h] Flags (decoded below) : 00000000
- Single Mapping : 0
+Raw Table Data: Length 192 (0xC0)
-[100h 0256 004h] Input base : 00001100
-[104h 0260 004h] ID Count : 0000EEFF
-[108h 0264 004h] Output Base : 00001100
-[10Ch 0268 004h] Output Reference : 00000030
-[110h 0272 004h] Flags (decoded below) : 00000000
- Single Mapping : 0
-
-Raw Table Data: Length 276 (0x114)
-
- 0000: 49 4F 52 54 14 01 00 00 05 4A 42 4F 43 48 53 20 // IORT.....JBOCHS
+ 0000: 49 4F 52 54 C0 00 00 00 05 1C 42 4F 43 48 53 20 // IORT......BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
- 0020: 01 00 00 00 03 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
- 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................
- 0040: 01 00 00 00 00 00 00 00 04 58 00 04 01 00 00 00 // .........X......
- 0050: 01 00 00 00 44 00 00 00 00 00 05 09 00 00 00 00 // ....D...........
- 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
- 0070: 00 00 00 00 6A 00 00 00 6B 00 00 00 6D 00 00 00 // ....j...k...m...
- 0080: 6C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // l...............
- 0090: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
- 00A0: 02 74 00 03 02 00 00 00 04 00 00 00 24 00 00 00 // .t..........$...
- 00B0: 01 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 // ................
- 00C0: 40 00 00 00 00 00 00 00 FF 01 00 00 00 00 00 00 // @...............
- 00D0: 48 00 00 00 00 00 00 00 00 10 00 00 FF 00 00 00 // H...............
- 00E0: 00 10 00 00 48 00 00 00 00 00 00 00 00 02 00 00 // ....H...........
- 00F0: FF 0D 00 00 00 02 00 00 30 00 00 00 00 00 00 00 // ........0.......
- 0100: 00 11 00 00 FF EE 00 00 00 11 00 00 30 00 00 00 // ............0...
- 0110: 00 00 00 00 // ....
+ 0020: 01 00 00 00 02 00 00 00 30 00 00 00 00 00 00 00 // ........0.......
+ 0030: 04 44 00 04 00 00 00 00 00 00 00 00 00 00 00 00 // .D..............
+ 0040: 00 00 05 09 00 00 00 00 01 00 00 00 00 00 00 00 // ................
+ 0050: 00 00 00 00 00 00 00 00 00 00 00 00 6A 00 00 00 // ............j...
+ 0060: 6B 00 00 00 6D 00 00 00 6C 00 00 00 00 00 00 00 // k...m...l.......
+ 0070: 00 00 00 00 02 4C 00 03 01 00 00 00 02 00 00 00 // .....L..........
+ 0080: 24 00 00 00 01 00 00 00 00 00 00 03 00 00 00 00 // $...............
+ 0090: 00 00 00 00 40 00 00 00 00 00 00 00 FF 01 00 00 // ....@...........
+ 00A0: 00 00 00 00 30 00 00 00 00 00 00 00 00 10 00 00 // ....0...........
+ 00B0: FF 00 00 00 00 10 00 00 30 00 00 00 00 00 00 00 // ........0.......
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
2 months ago |
Shameer Kolothum
|
f48bddafa2 |
tests/qtest/bios-tables-test: Update IORT blobs after revision upgrade
Update the reference IORT blobs after revision upgrade for RMR node support. This affects the aarch64 'virt' IORT tests. IORT diff is the same for all the tests: /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20230628 (64-bit version) * Copyright (c) 2000 - 2023 Intel Corporation * - * Disassembly of tests/data/acpi/aarch64/virt/IORT, Mon Oct 20 14:42:41 2025 + * Disassembly of /tmp/aml-B4ZRE3, Mon Oct 20 14:42:41 2025 * * ACPI Data Table [IORT] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex) */ [000h 0000 004h] Signature : "IORT" [IO Remapping Table] [004h 0004 004h] Table Length : 00000080 -[008h 0008 001h] Revision : 03 -[009h 0009 001h] Checksum : B3 +[008h 0008 001h] Revision : 05 +[009h 0009 001h] Checksum : B1 [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 ... Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com> Message-id: 20260126104342.253965-27-skolothumtho@nvidia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
2 months ago |
|
Shameer Kolothum
|
ccf166d89d |
tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _DSM change
Update the reference DSDT blobs after GPEX _DSM change. This affects the
aarch64 'virt', riscv64 "virt", loongarch64 "virt" and the x86 'microvm'
machines.
DSDT diff is the same for all the machines/tests:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230628 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/aarch64/virt/DSDT, Fri Oct 10 11:18:21 2025
+ * Disassembly of /tmp/aml-E6V9D3, Fri Oct 10 11:18:21 2025
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000014D9 (5337)
* Revision 0x02
- * Checksum 0xA4
+ * Checksum 0xA5
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Device (C000)
{
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
}
@@ -1822,33 +1822,33 @@
Else
{
CDW1 |= 0x04
}
Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
If ((Arg2 == Zero))
{
Return (Buffer (One)
{
- 0x01 // .
+ 0x00 // .
})
}
}
Return (Buffer (One)
{
0x00 // .
})
}
Device (RES0)
{
Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20251022080639.243965-4-skolothumtho@nvidia.com>
|
5 months ago |
Huacai Chen
|
68e8df8cfa |
tests/data/acpi/loongarch64: Update expected DSDT.*
DSDT diffs from "iasl -d":
@@ -11,7 +11,7 @@
* Signature "DSDT"
* Length 0x000011FB (4603)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x5D
+ * Checksum 0x5B
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
@@ -1426,11 +1426,11 @@
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
- 0x100E001F, // Address Base
+ 0x100E0020, // Address Base
0x0000000C, // Address Length
)
})
- OperationRegion (PRST, SystemMemory, 0x100E001F, 0x0C)
+ OperationRegion (PRST, SystemMemory, 0x100E0020, 0x0C)
Field (PRST, ByteAcc, NoLock, WriteAsZeros)
{
Offset (0x04),
Signed-off-by: Huacai Chen <chenhuacai@kernel.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20250923143542.2391576-4-chenhuacai@kernel.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
|
6 months ago |
Mauro Carvalho Chehab
|
237ca3d578 |
tests/acpi: virt: update HEST and DSDT tables
The following changes for DSDT affecting all files
under tests/data/acpi/aarch64/virt/DSDT* :
-"tests/data/acpi/aarch64/virt/DSDT",
-"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
-"tests/data/acpi/aarch64/virt/DSDT.acpipcihp",
-"tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex",
-"tests/data/acpi/aarch64/virt/DSDT.memhp",
-"tests/data/acpi/aarch64/virt/DSDT.pxb",
-"tests/data/acpi/aarch64/virt/DSDT.topology",
-"tests/data/acpi/aarch64/virt/DSDT.viot",
-"tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev",
-"tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy",
--- /tmp/DSDT_old.dsl 2025-09-05 15:03:18.964968499 +0200
+++ /tmp/DSDT.dsl 2025-09-05 15:03:18.966968470 +0200
@@ -1886,6 +1886,11 @@
{
Notify (PWRB, 0x80) // Status Change
}
+
+ If (((Local0 & 0x20) == 0x20))
+ {
+ Notify (GEDD, 0x80) // Status Change
+ }
}
}
@@ -1894,6 +1899,12 @@
Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
}
+
+ Device (GEDD)
+ {
+ Name (_HID, "PNP0C33" /* Error Device */) // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ }
}
Scope (\_SB.PCI0)
Additionally, HEST changes:
-"tests/data/acpi/aarch64/virt/HEST",
--- /tmp/HEST_old.dsl 2025-09-05 15:03:19.078653625 +0200
+++ /tmp/HEST.dsl 2025-09-05 15:03:19.079511472 +0200
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20240322 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
- * Disassembly of /tmp/HEST_old
+ * Disassembly of /tmp/HEST
*
* ACPI Data Table [HEST]
*
@@ -11,16 +11,16 @@
*/
[000h 0000 004h] Signature : "HEST" [Hardware Error Source Table]
-[004h 0004 004h] Table Length : 00000084
+[004h 0004 004h] Table Length : 000000E0
[008h 0008 001h] Revision : 01
-[009h 0009 001h] Checksum : E2
+[009h 0009 001h] Checksum : 6C
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
-[024h 0036 004h] Error Source Count : 00000001
+[024h 0036 004h] Error Source Count : 00000002
[028h 0040 002h] Subtable Type : 000A [Generic Hardware Error Source V2]
[02Ah 0042 002h] Source Id : 0000
@@ -55,19 +55,62 @@
[069h 0105 001h] Bit Width : 40
[06Ah 0106 001h] Bit Offset : 00
[06Bh 0107 001h] Encoded Access Width : 04 [QWord Access:64]
-[06Ch 0108 008h] Address : 0000000043DA0008
+[06Ch 0108 008h] Address : 0000000043DA0010
[074h 0116 008h] Read Ack Preserve : FFFFFFFFFFFFFFFE
[07Ch 0124 008h] Read Ack Write : 0000000000000001
-Raw Table Data: Length 132 (0x84)
+[084h 0132 002h] Subtable Type : 000A [Generic Hardware Error Source V2]
+[086h 0134 002h] Source Id : 0001
+[088h 0136 002h] Related Source Id : FFFF
+[08Ah 0138 001h] Reserved : 00
+[08Bh 0139 001h] Enabled : 01
+[08Ch 0140 004h] Records To Preallocate : 00000001
+[090h 0144 004h] Max Sections Per Record : 00000001
+[094h 0148 004h] Max Raw Data Length : 00000400
+
+[098h 0152 00Ch] Error Status Address : [Generic Address Structure]
+[098h 0152 001h] Space ID : 00 [SystemMemory]
+[099h 0153 001h] Bit Width : 40
+[09Ah 0154 001h] Bit Offset : 00
+[09Bh 0155 001h] Encoded Access Width : 04 [QWord Access:64]
+[09Ch 0156 008h] Address : 0000000043DA0008
+
+[0A4h 0164 01Ch] Notify : [Hardware Error Notification Structure]
+[0A4h 0164 001h] Notify Type : 07 [GPIO]
+[0A5h 0165 001h] Notify Length : 1C
+[0A6h 0166 002h] Configuration Write Enable : 0000
+[0A8h 0168 004h] PollInterval : 00000000
+[0ACh 0172 004h] Vector : 00000000
+[0B0h 0176 004h] Polling Threshold Value : 00000000
+[0B4h 0180 004h] Polling Threshold Window : 00000000
+[0B8h 0184 004h] Error Threshold Value : 00000000
+[0BCh 0188 004h] Error Threshold Window : 00000000
+
+[0C0h 0192 004h] Error Status Block Length : 00000400
+[0C4h 0196 00Ch] Read Ack Register : [Generic Address Structure]
+[0C4h 0196 001h] Space ID : 00 [SystemMemory]
+[0C5h 0197 001h] Bit Width : 40
+[0C6h 0198 001h] Bit Offset : 00
+[0C7h 0199 001h] Encoded Access Width : 04 [QWord Access:64]
+[0C8h 0200 008h] Address : 0000000043DA0018
- 0000: 48 45 53 54 84 00 00 00 01 E2 42 4F 43 48 53 20 // HEST......BOCHS
+[0D0h 0208 008h] Read Ack Preserve : FFFFFFFFFFFFFFFE
+[0D8h 0216 008h] Read Ack Write : 0000000000000001
+
+Raw Table Data: Length 224 (0xE0)
+
+ 0000: 48 45 53 54 E0 00 00 00 01 6C 42 4F 43 48 53 20 // HEST.....lBOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
- 0020: 01 00 00 00 01 00 00 00 0A 00 00 00 FF FF 00 01 // ................
+ 0020: 01 00 00 00 02 00 00 00 0A 00 00 00 FF FF 00 01 // ................
0030: 01 00 00 00 01 00 00 00 00 04 00 00 00 40 00 04 // .............@..
0040: 00 00 DA 43 00 00 00 00 08 1C 00 00 00 00 00 00 // ...C............
0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
- 0060: 00 00 00 00 00 04 00 00 00 40 00 04 08 00 DA 43 // .........@.....C
+ 0060: 00 00 00 00 00 04 00 00 00 40 00 04 10 00 DA 43 // .........@.....C
0070: 00 00 00 00 FE FF FF FF FF FF FF FF 01 00 00 00 // ................
- 0080: 00 00 00 00 // ....
+ 0080: 00 00 00 00 0A 00 01 00 FF FF 00 01 01 00 00 00 // ................
+ 0090: 01 00 00 00 00 04 00 00 00 40 00 04 08 00 DA 43 // .........@.....C
+ 00A0: 00 00 00 00 07 1C 00 00 00 00 00 00 00 00 00 00 // ................
+ 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
+ 00C0: 00 04 00 00 00 40 00 04 18 00 DA 43 00 00 00 00 // .....@.....C....
+ 00D0: FE FF FF FF FF FF FF FF 01 00 00 00 00 00 00 00 // ................
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <2253eb50df797ab320b4ca610bd22a38e5cfd17a.1758610789.git.mchehab+huawei@kernel.org>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
6 months ago |
Thomas Huth
|
d0fdd2a20b |
tests/data/vmstate-static-checker: Add dump files from QEMU 7.2.17
For automatic tests, we need reference files from older QEMU versions. QEMU 7.2 is a long term stable release, so it's a good candidate for checking whether the migration could still work correctly. Let's add the files from that version that have been taken with the "-dump-vmstate" parameter of QEMU (compiled with single machines and the configure switch "--without-default-devices" to keep the json files reasonable small). Some devices also have been removed manually from the json files, e.g. the "pci-bridge" (which can be disabled in later QEMU versions via Kconfig), and some Linux-related devices like "scsi-block" and "scsi-generic" and KVM-related devices. Without removing them, we might get errors otherwise if these devices have not been compiled into the destination QEMU build. Acked-by: Peter Xu <peterx@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250912100755.316518-4-thuth@redhat.com> |
7 months ago |
|
Thomas Huth
|
2bfe71aa7e |
tests: Move the old vmstate-static-checker files to tests/data/
All other test data resides in tests/data/, so let's move the dump files here, too. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250912100755.316518-2-thuth@redhat.com> |
7 months ago |
|
Shameer Kolothum
|
d35146a660 |
qtest/bios-tables-test: Update tables for smmuv3 tests
For the legacy smmuv3 test case, generated IORT has a single SMMUv3 node,
a Root Complex(RC) node and 1 ITS node.
RC node features 4 ID mappings, of which 2 points to SMMU node and the
remaining ones points to ITS.
pcie.0 -> {SMMU0} -> {ITS}
{RC} pcie.1 -> {SMMU0} -> {ITS}
pcie.2 -> {ITS}
[all other ids] -> {ITS}
...
[030h 0048 1] Type : 00
[031h 0049 2] Length : 0018
[033h 0051 1] Revision : 01
[034h 0052 4] Identifier : 00000000
[038h 0056 4] Mapping Count : 00000000
[03Ch 0060 4] Mapping Offset : 00000000
[040h 0064 4] ItsCount : 00000001
[044h 0068 4] Identifiers : 00000000
[048h 0072 1] Type : 04
[049h 0073 2] Length : 0058
[04Bh 0075 1] Revision : 04
[04Ch 0076 4] Identifier : 00000001
[050h 0080 4] Mapping Count : 00000001
[054h 0084 4] Mapping Offset : 00000044
[058h 0088 8] Base Address : 0000000009050000
[060h 0096 4] Flags (decoded below) : 00000001
COHACC Override : 1
HTTU Override : 0
Proximity Domain Valid : 0
[064h 0100 4] Reserved : 00000000
[068h 0104 8] VATOS Address : 0000000000000000
[070h 0112 4] Model : 00000000
[074h 0116 4] Event GSIV : 0000006A
[078h 0120 4] PRI GSIV : 0000006B
[07Ch 0124 4] GERR GSIV : 0000006D
[080h 0128 4] Sync GSIV : 0000006C
[084h 0132 4] Proximity Domain : 00000000
[088h 0136 4] Device ID Mapping Index : 00000000
[08Ch 0140 4] Input base : 00000000
[090h 0144 4] ID Count : 0000FFFF
[094h 0148 4] Output Base : 00000000
[098h 0152 4] Output Reference : 00000030
[09Ch 0156 4] Flags (decoded below) : 00000000
Single Mapping : 0
[0A0h 0160 1] Type : 02
[0A1h 0161 2] Length : 0074
[0A3h 0163 1] Revision : 03
[0A4h 0164 4] Identifier : 00000002
[0A8h 0168 4] Mapping Count : 00000004
[0ACh 0172 4] Mapping Offset : 00000024
[0B0h 0176 8] Memory Properties : [IORT Memory Access Properties]
[0B0h 0176 4] Cache Coherency : 00000001
[0B4h 0180 1] Hints (decoded below) : 00
Transient : 0
Write Allocate : 0
Read Allocate : 0
Override : 0
[0B5h 0181 2] Reserved : 0000
[0B7h 0183 1] Memory Flags (decoded below) : 03
Coherency : 1
Device Attribute : 1
[0B8h 0184 4] ATS Attribute : 00000000
[0BCh 0188 4] PCI Segment Number : 00000000
[0C0h 0192 1] Memory Size Limit : 40
[0C1h 0193 2] PASID Capabilities : 0000
[0C3h 0195 1] Reserved : 00
[0C4h 0196 4] Input base : 00000000
[0C8h 0200 4] ID Count : 000001FF
[0CCh 0204 4] Output Base : 00000000
[0D0h 0208 4] Output Reference : 00000048
[0D4h 0212 4] Flags (decoded below) : 00000000
Single Mapping : 0
[0D8h 0216 4] Input base : 00001000
[0DCh 0220 4] ID Count : 000000FF
[0E0h 0224 4] Output Base : 00001000
[0E4h 0228 4] Output Reference : 00000048
[0E8h 0232 4] Flags (decoded below) : 00000000
Single Mapping : 0
[0ECh 0236 4] Input base : 00000200
[0F0h 0240 4] ID Count : 00000DFF
[0F4h 0244 4] Output Base : 00000200
[0F8h 0248 4] Output Reference : 00000030
[0FCh 0252 4] Flags (decoded below) : 00000000
Single Mapping : 0
[100h 0256 4] Input base : 00001100
[104h 0260 4] ID Count : 0000EEFF
[108h 0264 4] Output Base : 00001100
[10Ch 0268 4] Output Reference : 00000030
[110h 0272 4] Flags (decoded below) : 00000000
Single Mapping : 0
For the smmuv3-dev test case, IORT has 2 SMMUV3 nodes,
1 RC node and 1 ITS node.
RC node features 4 ID mappings. 2 of them target the 2
SMMU nodes while the others targets the ITS.
pcie.0 -> {SMMU0} -> {ITS}
{RC} pcie.1 -> {SMMU1} -> {ITS}
pcie.2 -> {ITS}
[all other ids] -> {ITS}
...
[030h 0048 1] Type : 00
[031h 0049 2] Length : 0018
[033h 0051 1] Revision : 01
[034h 0052 4] Identifier : 00000000
[038h 0056 4] Mapping Count : 00000000
[03Ch 0060 4] Mapping Offset : 00000000
[040h 0064 4] ItsCount : 00000001
[044h 0068 4] Identifiers : 00000000
[048h 0072 1] Type : 04
[049h 0073 2] Length : 0058
[04Bh 0075 1] Revision : 04
[04Ch 0076 4] Identifier : 00000001
[050h 0080 4] Mapping Count : 00000001
[054h 0084 4] Mapping Offset : 00000044
[058h 0088 8] Base Address : 000000000C000000
[060h 0096 4] Flags (decoded below) : 00000001
COHACC Override : 1
HTTU Override : 0
Proximity Domain Valid : 0
[064h 0100 4] Reserved : 00000000
[068h 0104 8] VATOS Address : 0000000000000000
[070h 0112 4] Model : 00000000
[074h 0116 4] Event GSIV : 00000090
[078h 0120 4] PRI GSIV : 00000091
[07Ch 0124 4] GERR GSIV : 00000093
[080h 0128 4] Sync GSIV : 00000092
[084h 0132 4] Proximity Domain : 00000000
[088h 0136 4] Device ID Mapping Index : 00000000
[08Ch 0140 4] Input base : 00000000
[090h 0144 4] ID Count : 0000FFFF
[094h 0148 4] Output Base : 00000000
[098h 0152 4] Output Reference : 00000030
[09Ch 0156 4] Flags (decoded below) : 00000000
Single Mapping : 0
[0A0h 0160 1] Type : 04
[0A1h 0161 2] Length : 0058
[0A3h 0163 1] Revision : 04
[0A4h 0164 4] Identifier : 00000002
[0A8h 0168 4] Mapping Count : 00000001
[0ACh 0172 4] Mapping Offset : 00000044
[0B0h 0176 8] Base Address : 000000000C020000
[0B8h 0184 4] Flags (decoded below) : 00000001
COHACC Override : 1
HTTU Override : 0
Proximity Domain Valid : 0
[0BCh 0188 4] Reserved : 00000000
[0C0h 0192 8] VATOS Address : 0000000000000000
[0C8h 0200 4] Model : 00000000
[0CCh 0204 4] Event GSIV : 00000094
[0D0h 0208 4] PRI GSIV : 00000095
[0D4h 0212 4] GERR GSIV : 00000097
[0D8h 0216 4] Sync GSIV : 00000096
[0DCh 0220 4] Proximity Domain : 00000000
[0E0h 0224 4] Device ID Mapping Index : 00000000
[0E4h 0228 4] Input base : 00000000
[0E8h 0232 4] ID Count : 0000FFFF
[0ECh 0236 4] Output Base : 00000000
[0F0h 0240 4] Output Reference : 00000030
[0F4h 0244 4] Flags (decoded below) : 00000000
Single Mapping : 0
[0F8h 0248 1] Type : 02
[0F9h 0249 2] Length : 0074
[0FBh 0251 1] Revision : 03
[0FCh 0252 4] Identifier : 00000003
[100h 0256 4] Mapping Count : 00000004
[104h 0260 4] Mapping Offset : 00000024
[108h 0264 8] Memory Properties : [IORT Memory Access Properties]
[108h 0264 4] Cache Coherency : 00000001
[10Ch 0268 1] Hints (decoded below) : 00
Transient : 0
Write Allocate : 0
Read Allocate : 0
Override : 0
[10Dh 0269 2] Reserved : 0000
[10Fh 0271 1] Memory Flags (decoded below) : 03
Coherency : 1
Device Attribute : 1
[110h 0272 4] ATS Attribute : 00000000
[114h 0276 4] PCI Segment Number : 00000000
[118h 0280 1] Memory Size Limit : 40
[119h 0281 2] PASID Capabilities : 0000
[11Bh 0283 1] Reserved : 00
[11Ch 0284 4] Input base : 00000000
[120h 0288 4] ID Count : 000001FF
[124h 0292 4] Output Base : 00000000
[128h 0296 4] Output Reference : 00000048
[12Ch 0300 4] Flags (decoded below) : 00000000
Single Mapping : 0
[130h 0304 4] Input base : 00001000
[134h 0308 4] ID Count : 000000FF
[138h 0312 4] Output Base : 00001000
[13Ch 0316 4] Output Reference : 000000A0
[140h 0320 4] Flags (decoded below) : 00000000
Single Mapping : 0
[144h 0324 4] Input base : 00000200
[148h 0328 4] ID Count : 00000DFF
[14Ch 0332 4] Output Base : 00000200
[150h 0336 4] Output Reference : 00000030
[154h 0340 4] Flags (decoded below) : 00000000
Single Mapping : 0
[158h 0344 4] Input base : 00001100
[15Ch 0348 4] ID Count : 0000EEFF
[160h 0352 4] Output Base : 00001100
[164h 0356 4] Output Reference : 00000030
[168h 0360 4] Flags (decoded below) : 00000000
Single Mapping : 0
Note: DSDT changes are not described here as it is not impacted by the
way the SMMUv3 is instantiated.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Reviewed-by: Donald Dutile <ddutile@redhat.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Message-id: 20250829082543.7680-12-skolothumtho@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
7 months ago |
|
Shameer Kolothum
|
c69520c13d |
bios-tables-test: Allow for smmuv3 test data.
The tests to be added exercise both legacy(iommu=smmuv3) and new -device arm-smmuv3,.. cases. Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com> Reviewed-by: Donald Dutile <ddutile@redhat.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Message-id: 20250829082543.7680-10-skolothumtho@nvidia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 months ago |
|
Mauro Carvalho Chehab
|
cd16f08ad4 |
tests/acpi: virt: update HEST file with its current data
Now that HEST table is checked for aarch64, add the current firmware file. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <e3527be1610b2ef6b20ca2efa025de91a1f1e0a6.1749741085.git.mchehab+huawei@kernel.org> |
10 months ago |
|
Mauro Carvalho Chehab
|
8d5613d2ee |
tests/acpi: virt: add an empty HEST file
Such file will be used to track HEST table changes. For now, disallow HEST table check until we update it to the current data. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <e25ea751a23c7d8da812233c83ce943efbeaaf91.1749741085.git.mchehab+huawei@kernel.org> |
10 months ago |
Sunil V L
|
f3c8b7767f |
tests/data/acpi/riscv64: Update expected FADT and MADT
Update the expected tables for the version change.
/*
*
* ACPI Data Table [FACP]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
*/
[000h 0000 004h] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 004h] Table Length : 00000114
[008h 0008 001h] Revision : 06
-[009h 0009 001h] Checksum : 13
+[009h 0009 001h] Checksum : 12
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
[024h 0036 004h] FACS Address : 00000000
[028h 0040 004h] DSDT Address : 00000000
[02Ch 0044 001h] Model : 00
[02Dh 0045 001h] PM Profile : 00 [Unspecified]
[02Eh 0046 002h] SCI Interrupt : 0000
[030h 0048 004h] SMI Command Port : 00000000
[034h 0052 001h] ACPI Enable Value : 00
[035h 0053 001h] ACPI Disable Value : 00
[036h 0054 001h] S4BIOS Command : 00
[037h 0055 001h] P-State Control : 00
@@ -86,33 +86,33 @@
Use APIC Physical Destination Mode (V4) : 0
Hardware Reduced (V5) : 1
Low Power S0 Idle (V5) : 0
[074h 0116 00Ch] Reset Register : [Generic Address Structure]
[074h 0116 001h] Space ID : 00 [SystemMemory]
[075h 0117 001h] Bit Width : 00
[076h 0118 001h] Bit Offset : 00
[077h 0119 001h] Encoded Access Width : 00 [Undefined/Legacy]
[078h 0120 008h] Address : 0000000000000000
[080h 0128 001h] Value to cause reset : 00
[081h 0129 002h] ARM Flags (decoded below) : 0000
PSCI Compliant : 0
Must use HVC for PSCI : 0
-[083h 0131 001h] FADT Minor Revision : 05
+[083h 0131 001h] FADT Minor Revision : 06
[084h 0132 008h] FACS Address : 0000000000000000
[...]
/*
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
*/
[000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 004h] Table Length : 00000074
-[008h 0008 001h] Revision : 06
-[009h 0009 001h] Checksum : B4
+[008h 0008 001h] Revision : 07
+[009h 0009 001h] Checksum : B3
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[...]
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com>
Message-ID: <20250724110350.452828-4-sunilvl@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|
8 months ago |
Alireza Sanaee
|
98f030e7c9 |
tests: virt: Update expected ACPI tables for virt test
Update the ACPI tables according to the acpi aml_build change, also
empty bios-tables-test-allowed-diff.h.
The disassembled differences between actual and expected PPTT shows
below. Only about the root node adding and identification flag set
as expected.
Diff regarding Loongarch64:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230628 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
- * Disassembly of tests/data/acpi/loongarch64/virt/PPTT, Mon Jul 14 16:15:12 2025
+ * Disassembly of /tmp/aml-4A0092, Mon Jul 14 16:15:12 2025
*
* ACPI Data Table [PPTT]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
*/
[000h 0000 004h] Signature : "PPTT" [Processor Properties Topology Table]
-[004h 0004 004h] Table Length : 0000004C
+[004h 0004 004h] Table Length : 00000060
[008h 0008 001h] Revision : 02
-[009h 0009 001h] Checksum : A8
+[009h 0009 001h] Checksum : 27
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
[024h 0036 001h] Subtable Type : 00 [Processor Hierarchy Node]
[025h 0037 001h] Length : 14
[026h 0038 002h] Reserved : 0000
-[028h 0040 004h] Flags (decoded below) : 00000001
+[028h 0040 004h] Flags (decoded below) : 00000011
Physical package : 1
ACPI Processor ID valid : 0
Processor is a thread : 0
Node is a leaf : 0
- Identical Implementation : 0
+ Identical Implementation : 1
[02Ch 0044 004h] Parent : 00000000
[030h 0048 004h] ACPI Processor ID : 00000000
[034h 0052 004h] Private Resource Number : 00000000
[038h 0056 001h] Subtable Type : 00 [Processor Hierarchy Node]
[039h 0057 001h] Length : 14
[03Ah 0058 002h] Reserved : 0000
-[03Ch 0060 004h] Flags (decoded below) : 0000000A
+[03Ch 0060 004h] Flags (decoded below) : 00000011
+ Physical package : 1
+ ACPI Processor ID valid : 0
+ Processor is a thread : 0
+ Node is a leaf : 0
+ Identical Implementation : 1
+[040h 0064 004h] Parent : 00000024
+[044h 0068 004h] ACPI Processor ID : 00000000
+[048h 0072 004h] Private Resource Number : 00000000
+
+[04Ch 0076 001h] Subtable Type : 00 [Processor Hierarchy Node]
+[04Dh 0077 001h] Length : 14
+[04Eh 0078 002h] Reserved : 0000
+[050h 0080 004h] Flags (decoded below) : 0000000A
Physical package : 0
ACPI Processor ID valid : 1
Processor is a thread : 0
Node is a leaf : 1
Identical Implementation : 0
-[040h 0064 004h] Parent : 00000024
-[044h 0068 004h] ACPI Processor ID : 00000000
-[048h 0072 004h] Private Resource Number : 00000000
+[054h 0084 004h] Parent : 00000038
+[058h 0088 004h] ACPI Processor ID : 00000000
+[05Ch 0092 004h] Private Resource Number : 00000000
-Raw Table Data: Length 76 (0x4C)
+Raw Table Data: Length 96 (0x60)
- 0000: 50 50 54 54 4C 00 00 00 02 A8 42 4F 43 48 53 20 // PPTTL.....BOCHS
+ 0000: 50 50 54 54 60 00 00 00 02 27 42 4F 43 48 53 20 // PPTT`....'BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
- 0020: 01 00 00 00 00 14 00 00 01 00 00 00 00 00 00 00 // ................
- 0030: 00 00 00 00 00 00 00 00 00 14 00 00 0A 00 00 00 // ................
- 0040: 24 00 00 00 00 00 00 00 00 00 00 00 // $...........
+ 0020: 01 00 00 00 00 14 00 00 11 00 00 00 00 00 00 00 // ................
+ 0030: 00 00 00 00 00 00 00 00 00 14 00 00 11 00 00 00 // ................
+ 0040: 24 00 00 00 00 00 00 00 00 00 00 00 00 14 00 00 // $...............
+ 0050: 0A 00 00 00 38 00 00 00 00 00 00 00 00 00 00 00 // ....8...........
Diff regarding ARM64:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/aarch64/virt/PPTT, Thu Apr 24 11:02:39 2025
+ * Disassembly of /tmp/aml-E0RF52, Thu Apr 24 11:02:39 2025
*
* ACPI Data Table [PPTT]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "PPTT" [Processor Properties Topology Table]
-[004h 0004 4] Table Length : 0000004C
+[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : A8
+[009h 0009 1] Checksum : 27
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 1] Subtable Type : 00 [Processor Hierarchy Node]
[025h 0037 1] Length : 14
[026h 0038 2] Reserved : 0000
-[028h 0040 4] Flags (decoded below) : 00000001
+[028h 0040 4] Flags (decoded below) : 00000011
Physical package : 1
ACPI Processor ID valid : 0
Processor is a thread : 0
Node is a leaf : 0
- Identical Implementation : 0
+ Identical Implementation : 1
[02Ch 0044 4] Parent : 00000000
[030h 0048 4] ACPI Processor ID : 00000000
[034h 0052 4] Private Resource Number : 00000000
[038h 0056 1] Subtable Type : 00 [Processor Hierarchy Node]
[039h 0057 1] Length : 14
[03Ah 0058 2] Reserved : 0000
-[03Ch 0060 4] Flags (decoded below) : 0000000A
+[03Ch 0060 4] Flags (decoded below) : 00000011
+ Physical package : 1
+ ACPI Processor ID valid : 0
+ Processor is a thread : 0
+ Node is a leaf : 0
+ Identical Implementation : 1
+[040h 0064 4] Parent : 00000024
+[044h 0068 4] ACPI Processor ID : 00000000
+[048h 0072 4] Private Resource Number : 00000000
+
+[04Ch 0076 1] Subtable Type : 00 [Processor Hierarchy Node]
+[04Dh 0077 1] Length : 14
+[04Eh 0078 2] Reserved : 0000
+[050h 0080 4] Flags (decoded below) : 0000000A
Physical package : 0
ACPI Processor ID valid : 1
Processor is a thread : 0
Node is a leaf : 1
Identical Implementation : 0
-[040h 0064 4] Parent : 00000024
-[044h 0068 4] ACPI Processor ID : 00000000
-[048h 0072 4] Private Resource Number : 00000000
+[054h 0084 4] Parent : 00000038
+[058h 0088 4] ACPI Processor ID : 00000000
+[05Ch 0092 4] Private Resource Number : 00000000
-Raw Table Data: Length 76 (0x4C)
+Raw Table Data: Length 96 (0x60)
- 0000: 50 50 54 54 4C 00 00 00 02 A8 42 4F 43 48 53 20 // PPTTL.....BOCHS
+ 0000: 50 50 54 54 60 00 00 00 02 27 42 4F 43 48 53 20 // PPTT`....'BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
- 0020: 01 00 00 00 00 14 00 00 01 00 00 00 00 00 00 00 // ................
- 0030: 00 00 00 00 00 00 00 00 00 14 00 00 0A 00 00 00 // ................
- 0040: 24 00 00 00 00 00 00 00 00 00 00 00 // $...........
+ 0020: 01 00 00 00 00 14 00 00 11 00 00 00 00 00 00 00 // ................
+ 0030: 00 00 00 00 00 00 00 00 00 14 00 00 11 00 00 00 // ................
+ 0040: 24 00 00 00 00 00 00 00 00 00 00 00 00 14 00 00 // $...............
+ 0050: 0A 00 00 00 38 00 00 00 00 00 00 00 00 00 00 00 // ....8...........
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Message-Id: <20250714173146.511-5-alireza.sanaee@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
9 months ago |
Eric Auger
|
14e37f46b1 |
qtest/bios-tables-test: Generate reference blob for DSDT.acpipcihp
The disassembled DSDT table is given below.
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20210604 (64-bit version)
* Copyright (c) 2000 - 2021 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of ../tests/data/acpi/aarch64/virt/DSDT.acpipcihp, Thu Jul 3 05:16:27 2025
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000183A (6202)
* Revision 0x02
* Checksum 0x98
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Device (C000)
{
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
}
Device (COM0)
{
Name (_HID, "ARMH0011") // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0x09000000, // Address Base
0x00001000, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000021,
}
})
}
Device (FWCF)
{
Name (_HID, "QEMU0002") // _HID: Hardware ID
Name (_STA, 0x0B) // _STA: Status
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0x09020000, // Address Base
0x00000018, // Address Length
)
})
}
Device (VR00)
{
Name (_HID, "LNRO0005") // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0x0A000000, // Address Base
0x00000200, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000030,
}
})
}
../..
Device (L000)
{
Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000023,
}
})
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000023,
}
})
Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
{
}
}
../..
Device (PCI0)
{
Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID
Name (_SEG, Zero) // _SEG: PCI Segment
Name (_BBN, Zero) // _BBN: BIOS Bus Number
Name (_UID, Zero) // _UID: Unique ID
Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
{
Package (0x04)
{
0xFFFF,
Zero,
L000,
Zero
},
../..
})
Method (_CBA, 0, NotSerialized) // _CBA: Configuration Base Address
{
Return (0x0000004010000000)
}
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
0x00FF, // Range Maximum
0x0000, // Translation Offset
0x0100, // Length
,, )
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x00000000, // Granularity
0x10000000, // Range Minimum
0x3EFEFFFF, // Range Maximum
0x00000000, // Translation Offset
0x2EFF0000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x0000FFFF, // Range Maximum
0x3EFF0000, // Translation Offset
0x00010000, // Length
,, , TypeStatic, DenseTranslation)
QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x0000000000000000, // Granularity
0x0000008000000000, // Range Minimum
0x000000FFFFFFFFFF, // Range Maximum
0x0000000000000000, // Translation Offset
0x0000008000000000, // Length
,, , AddressRangeMemory, TypeStatic)
})
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, CDW1)
If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
Local0 &= 0x1E
If ((Arg1 != One))
{
CDW1 |= 0x08
}
If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
CDW3 = Local0
}
Else
{
CDW1 |= 0x04
}
Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
If ((Arg2 == Zero))
{
Return (Buffer (One)
{
0x01 // .
})
}
}
Return (Buffer (One)
{
0x00 // .
})
}
Device (RES0)
{
Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x0000000000000000, // Granularity
0x0000004010000000, // Range Minimum
0x000000401FFFFFFF, // Range Maximum
0x0000000000000000, // Translation Offset
0x0000000010000000, // Length
,, , AddressRangeMemory, TypeStatic)
})
}
}
Device (\_SB.GED)
{
Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID
Name (_UID, "GED") // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
{
0x00000029,
}
})
OperationRegion (EREG, SystemMemory, 0x09080000, 0x04)
Field (EREG, DWordAcc, NoLock, WriteAsZeros)
{
ESEL, 32
}
Method (_EVT, 1, Serialized) // _EVT: Event
{
Local0 = ESEL /* \_SB_.GED_.ESEL */
If (((Local0 & 0x02) == 0x02))
{
Notify (PWRB, 0x80) // Status Change
}
If (((Local0 & 0x10) == 0x10))
{
Acquire (\_SB.PCI0.BLCK, 0xFFFF)
\_SB.PCI0.PCNT ()
Release (\_SB.PCI0.BLCK)
}
}
}
Device (PWRB)
{
Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
}
}
Scope (_SB.PCI0)
{
OperationRegion (PCST, SystemMemory, 0x090C0000, 0x08)
Field (PCST, DWordAcc, NoLock, WriteAsZeros)
{
PCIU, 32,
PCID, 32
}
OperationRegion (SEJ, SystemMemory, 0x090C0008, 0x04)
Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
{
B0EJ, 32
}
OperationRegion (BNMR, SystemMemory, 0x090C0010, 0x08)
Field (BNMR, DWordAcc, NoLock, WriteAsZeros)
{
BNUM, 32,
PIDX, 32
}
Mutex (BLCK, 0x00)
Method (PCEJ, 2, NotSerialized)
{
Acquire (BLCK, 0xFFFF)
BNUM = Arg0
B0EJ = (One << Arg1)
Release (BLCK)
Return (Zero)
}
Method (AIDX, 2, NotSerialized)
{
Acquire (BLCK, 0xFFFF)
BNUM = Arg0
PIDX = (One << Arg1)
Local0 = PIDX /* \_SB_.PCI0.PIDX */
Release (BLCK)
Return (Local0)
}
Method (PDSM, 5, Serialized)
{
If ((Arg2 == Zero))
{
Local0 = Buffer (One)
{
0x00 // .
}
If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
Return (Local0)
}
If ((Arg1 < 0x02))
{
Return (Local0)
}
Local1 = Zero
Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
))
If (!((Local2 == Zero) | (Local2 == 0xFFFFFFFF)))
{
Local1 |= One
Local1 |= (One << 0x07)
}
Local0 [Zero] = Local1
Return (Local0)
}
If ((Arg2 == 0x07))
{
Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
))
Local0 = Package (0x02) {}
If (!((Local2 == Zero) || (Local2 == 0xFFFFFFFF)))
{
Local0 [Zero] = Local2
Local0 [One] = ""
}
Return (Local0)
}
}
}
Scope (\_SB.PCI0)
{
Method (EDSM, 5, Serialized)
{
If ((Arg2 == Zero))
{
Local0 = Buffer (One)
{
0x00 // .
}
If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
Return (Local0)
}
If ((Arg1 < 0x02))
{
Return (Local0)
}
Local0 [Zero] = 0x81
Return (Local0)
}
If ((Arg2 == 0x07))
{
Local0 = Package (0x02)
{
Zero,
""
}
Local1 = DerefOf (Arg4 [Zero])
Local0 [Zero] = Local1
Return (Local0)
}
}
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (S08)
{
Name (_ADR, 0x00010000) // _ADR: Address
}
Device (S38)
{
Name (_ADR, 0x00070000) // _ADR: Address
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
}
Name (BSEL, One)
Scope (S00)
{
Name (ASUN, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x02)
{
Zero,
Zero
}
Local0 [Zero] = BSEL /* \_SB_.PCI0.S38_.BSEL */
Local0 [One] = ASUN /* \_SB_.PCI0.S38_.S00_.ASUN */
Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
Name (_SUN, Zero) // _SUN: Slot User Number
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
PCEJ (BSEL, _SUN)
}
}
Method (DVNT, 2, NotSerialized)
{
If ((Arg0 & One))
{
Notify (S00, Arg1)
}
}
}
Name (BSEL, Zero)
Scope (S00)
{
Name (ASUN, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x02)
{
Zero,
Zero
}
Local0 [Zero] = BSEL /* \_SB_.PCI0.BSEL */
Local0 [One] = ASUN /* \_SB_.PCI0.S00_.ASUN */
Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
Name (_SUN, Zero) // _SUN: Slot User Number
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
PCEJ (BSEL, _SUN)
}
}
Scope (S08)
{
Name (ASUN, One)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x02)
{
Zero,
Zero
}
Local0 [Zero] = BSEL /* \_SB_.PCI0.BSEL */
Local0 [One] = ASUN /* \_SB_.PCI0.S08_.ASUN */
Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
Name (_SUN, One) // _SUN: Slot User Number
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
PCEJ (BSEL, _SUN)
}
}
Method (DVNT, 2, NotSerialized)
{
If ((Arg0 & One))
{
Notify (S00, Arg1)
}
If ((Arg0 & 0x02))
{
Notify (S08, Arg1)
}
}
Device (PHPR)
{
Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID
Name (_UID, "PCI Hotplug resources") // _UID: Unique ID
Name (_STA, 0x0B) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x01, // Alignment
0x18, // Length
)
})
}
Scope (S38)
{
Method (PCNT, 0, NotSerialized)
{
BNUM = One
DVNT (PCIU, One)
DVNT (PCID, 0x03)
}
}
Method (PCNT, 0, NotSerialized)
{
BNUM = Zero
DVNT (PCIU, One)
DVNT (PCID, 0x03)
^S38.PCNT ()
}
}
}
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20250714080639.2525563-37-eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
9 months ago |
|
Eric Auger
|
84dfc6c074 |
qtest/bios-tables-test: Generate reference blob for DSDT.hpoffacpiindex
The disassembled DSDT table is given below
* Original Table Header:
* Signature "DSDT"
* Length 0x000014E3 (5347)
* Revision 0x02
* Checksum 0x92
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Device (C000)
{
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
}
Device (COM0)
{
Name (_HID, "ARMH0011") // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0x09000000, // Address Base
0x00001000, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000021,
}
})
}
Device (FWCF)
{
Name (_HID, "QEMU0002") // _HID: Hardware ID
Name (_STA, 0x0B) // _STA: Status
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0x09020000, // Address Base
0x00000018, // Address Length
)
})
}
Device (VR00)
{
Name (_HID, "LNRO0005") // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0x0A000000, // Address Base
0x00000200, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000030,
}
})
}
../..
Device (L000)
{
Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000023,
}
})
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000023,
}
})
Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
{
}
}
../..
Device (PCI0)
{
Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID
Name (_SEG, Zero) // _SEG: PCI Segment
Name (_BBN, Zero) // _BBN: BIOS Bus Number
Name (_UID, Zero) // _UID: Unique ID
Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
{
Package (0x04)
{
0xFFFF,
Zero,
L000,
Zero
},
../..
})
Method (_CBA, 0, NotSerialized) // _CBA: Configuration Base Address
{
Return (0x0000004010000000)
}
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
0x00FF, // Range Maximum
0x0000, // Translation Offset
0x0100, // Length
,, )
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x00000000, // Granularity
0x10000000, // Range Minimum
0x3EFEFFFF, // Range Maximum
0x00000000, // Translation Offset
0x2EFF0000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x0000FFFF, // Range Maximum
0x3EFF0000, // Translation Offset
0x00010000, // Length
,, , TypeStatic, DenseTranslation)
QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x0000000000000000, // Granularity
0x0000008000000000, // Range Minimum
0x000000FFFFFFFFFF, // Range Maximum
0x0000000000000000, // Translation Offset
0x0000008000000000, // Length
,, , AddressRangeMemory, TypeStatic)
})
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, CDW1)
If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
CDW3 = Local0
}
Else
{
CDW1 |= 0x04
}
Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
If ((Arg2 == Zero))
{
Return (Buffer (One)
{
0x01 // .
})
}
}
Return (Buffer (One)
{
0x00 // .
})
}
Device (RES0)
{
Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x0000000000000000, // Granularity
0x0000004010000000, // Range Minimum
0x000000401FFFFFFF, // Range Maximum
0x0000000000000000, // Translation Offset
0x0000000010000000, // Length
,, , AddressRangeMemory, TypeStatic)
})
}
}
Device (\_SB.GED)
{
Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID
Name (_UID, "GED") // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
{
0x00000029,
}
})
OperationRegion (EREG, SystemMemory, 0x09080000, 0x04)
Field (EREG, DWordAcc, NoLock, WriteAsZeros)
{
ESEL, 32
}
Method (_EVT, 1, Serialized) // _EVT: Event
{
Local0 = ESEL /* \_SB_.GED_.ESEL */
If (((Local0 & 0x02) == 0x02))
{
Notify (PWRB, 0x80) // Status Change
}
}
}
Device (PWRB)
{
Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
}
}
Scope (\_SB.PCI0)
{
Method (EDSM, 5, Serialized)
{
If ((Arg2 == Zero))
{
Local0 = Buffer (One)
{
0x00 // .
}
If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
Return (Local0)
}
If ((Arg1 < 0x02))
{
Return (Local0)
}
Local0 [Zero] = 0x81
Return (Local0)
}
If ((Arg2 == 0x07))
{
Local0 = Package (0x02)
{
Zero,
""
}
Local1 = DerefOf (Arg4 [Zero])
Local0 [Zero] = Local1
Return (Local0)
}
}
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (S08)
{
Name (_ADR, 0x00010000) // _ADR: Address
}
Device (S38)
{
Name (_ADR, 0x00070000) // _ADR: Address
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
{
0x0C
}
Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
}
}
}
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20250714080639.2525563-36-eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
9 months ago |
Gustavo Romero
|
099ea5daea |
tests/qtest/bios-tables-test: Prepare for addition of acpi pci hp tests
Soon we will introduce new tests related to ACPI PCI hotplug and acpi-index that will use a new reference blob: tests/data/acpi/aarch64/virt/DSDT.acpipcihp tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-34-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
9 months ago |
|
Eric Auger
|
4dfb141827 |
tests/qtest/bios-tables-test: Update ARM DSDT reference blobs
Changes relate to the introduction of pieces related to
acpi-index static support along with root ports with no hotplug.
+
+ Scope (\_SB.PCI0)
+ {
+ Method (EDSM, 5, Serialized)
+ {
+ If ((Arg2 == Zero))
+ {
+ Local0 = Buffer (One)
+ {
+ 0x00 // .
+ }
+ If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
+ {
+ Return (Local0)
+ }
+
+ If ((Arg1 < 0x02))
+ {
+ Return (Local0)
+ }
+
+ Local0 [Zero] = 0x81
+ Return (Local0)
+ }
+
+ If ((Arg2 == 0x07))
+ {
+ Local0 = Package (0x02)
+ {
+ Zero,
+ ""
+ }
+ Local1 = DerefOf (Arg4 [Zero])
+ Local0 [Zero] = Local1
+ Return (Local0)
+ }
+ }
+
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
+
+ Device (S08)
+ {
+ Name (_ADR, 0x00010000) // _ADR: Address
+ }
+
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ }
+ }
}
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20250714080639.2525563-23-eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
9 months ago |
|
Eric Auger
|
c34115091f |
qtest/bios-tables-test: Generate DSDT.viot
Use a specific DSDT.viot reference blob instead of relying on the default DSDT blob. The content is unchanged. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-20-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
9 months ago |
|
Eric Auger
|
c82a9d7407 |
qtest/bios-tables-test: Prepare for fixing the aarch64 viot test
The test misses a variant and this puts the mess on subsequent rebuild-expected-aml.sh where a first DSDT reference blob is overriden by another one. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250714080639.2525563-18-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
9 months ago |
Michael S. Tsirkin
|
f47d6e6a8f |
tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change
Update the reference DSDT blobs after GPEX _OSC change. The _OSC change
affects the aarch64 'virt' and the x86 'microvm' machines.
DSDT diff is the same for all the machines/tests:
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001A4F (6735)
+ * Length 0x00001A35 (6709)
* Revision 0x02
- * Checksum 0xBF
+ * Checksum 0xDD
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
@@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
- SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
- CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
- CTRL &= 0x1F
+ Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
+ Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
- If ((CDW3 != CTRL))
+ If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
- CDW3 = CTRL /* \_SB_.PCI0.CTRL */
- Return (Arg3)
+ CDW3 = Local0
}
Else
{
CDW1 |= 0x04
- Return (Arg3)
}
+
+ Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20250714080639.2525563-11-eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
9 months ago |
Bibo Mao
|
67fbf12288 |
tests/acpi: Fill acpi table data for LoongArch
The acpi table data is filled for LoongArch virt machine with the following command: tests/data/acpi/rebuild-expected-aml.sh Signed-off-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20250612090321.3416594-5-maobibo@loongson.cn> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
10 months ago |
|
Bibo Mao
|
c43ca0de62 |
rebuild-expected-aml.sh: Add support for LoongArch
Update the list of supported architectures to include LoongArch. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20250612090321.3416594-4-maobibo@loongson.cn> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
10 months ago |
|
Bibo Mao
|
f3bc2c3f33 |
tests/acpi: Add empty ACPI data files for LoongArch
Add empty acpi table for LoongArch virt machine, it is only empty file and there is no data in these files. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20250612090321.3416594-2-maobibo@loongson.cn> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
10 months ago |
Daniel Henrique Barboza
|
bab2be1923 |
target/riscv/cpu.c: add 'ssstrict' to riscv, isa
'ssstrict' is a RVA23 profile-defined extension defined as follows: "No non-conforming extensions are present. Attempts to execute unimplemented opcodes or access unimplemented CSRs in the standard or reserved encoding spaces raises an illegal instruction exception that results in a contained trap to the supervisor-mode trap handler." In short, we need to throw an exception when accessing unimplemented CSRs or opcodes. We do that, so let's advertise it. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20250529202315.1684198-3-dbarboza@ventanamicro.com> Message-ID: <20250604174329.1147549-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
10 months ago |
|
Daniel Henrique Barboza
|
f31ba686a9 |
target/riscv/cpu.c: add 'sdtrig' in riscv,isa
We have support for sdtrig for awhile but we are not advertising it. It is enabled by default via the 'debug' flag. Use the same flag to also advertise sdtrig. Add an exception in disable_priv_spec_isa_exts() to avoid spamming warnings for 'sdtrig' for vendor CPUs like sifive_u. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250604174329.1147549-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
10 months ago |
|
Gustavo Romero
|
96791e69e6 |
qtest/bios-tables-test: Update blobs for its=off test on aarch64
Update blobs for the its=off test on aarch64 after fix.
Basically, all structs related to ITS are gone in MADT and IORT
tables after the fix (previously ITS was not properly disabled
when "its=off" option was passed to the machine).
MADT diff:
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
-[004h 0004 4] Table Length : 000000B8
+[004h 0004 4] Table Length : 000000A4
[008h 0008 1] Revision : 04
-[009h 0009 1] Checksum : C1
+[009h 0009 1] Checksum : 08
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : 00000000
[028h 0040 4] Flags (decoded below) : 00000000
PC-AT Compatibility : 0
[02Ch 0044 1] Subtable Type : 0C [Generic Interrupt Distributor]
[02Dh 0045 1] Length : 18
[02Eh 0046 2] Reserved : 0000
[030h 0048 4] Local GIC Hardware ID : 00000000
[034h 0052 8] Base Address : 0000000008000000
[03Ch 0060 4] Interrupt Base : 00000000
@@ -48,37 +48,29 @@
[064h 0100 8] Base Address : 0000000000000000
[06Ch 0108 8] Virtual GIC Base Address : 0000000000000000
[074h 0116 8] Hypervisor GIC Base Address : 0000000000000000
[07Ch 0124 4] Virtual GIC Interrupt : 00000000
[080h 0128 8] Redistributor Base Address : 0000000000000000
[088h 0136 8] ARM MPIDR : 0000000000000000
[090h 0144 1] Efficiency Class : 00
[091h 0145 1] Reserved : 00
[092h 0146 2] SPE Overflow Interrupt : 0000
[094h 0148 1] Subtable Type : 0E [Generic Interrupt Redistributor]
[095h 0149 1] Length : 10
[096h 0150 2] Reserved : 0000
[098h 0152 8] Base Address : 00000000080A0000
[0A0h 0160 4] Length : 00F60000
-[0A4h 0164 1] Subtable Type : 0F [Generic Interrupt Translator]
-[0A5h 0165 1] Length : 14
-[0A6h 0166 2] Reserved : 0000
-[0A8h 0168 4] Translation ID : 00000000
-[0ACh 0172 8] Base Address : 0000000008080000
-[0B4h 0180 4] Reserved : 00000000
IORT diff:
[000h 0000 4] Signature : "IORT" [IO Remapping Table]
-[004h 0004 4] Table Length : 000000EC
+[004h 0004 4] Table Length : 000000AC
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 57
+[009h 0009 1] Checksum : 97
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
-[024h 0036 4] Node Count : 00000003
+[024h 0036 4] Node Count : 00000002
[028h 0040 4] Node Offset : 00000030
[02Ch 0044 4] Reserved : 00000000
-[030h 0048 1] Type : 00
-[031h 0049 2] Length : 0018
-[033h 0051 1] Revision : 01
+[030h 0048 1] Type : 04
+[031h 0049 2] Length : 0044
+[033h 0051 1] Revision : 04
[034h 0052 4] Reserved : 00000000
[038h 0056 4] Mapping Count : 00000000
[03Ch 0060 4] Mapping Offset : 00000000
-[040h 0064 4] ItsCount : 00000001
-[044h 0068 4] Identifiers : 00000000
-
-[048h 0072 1] Type : 04
-[049h 0073 2] Length : 0058
-[04Bh 0075 1] Revision : 04
-[04Ch 0076 4] Reserved : 00000001
-[050h 0080 4] Mapping Count : 00000001
-[054h 0084 4] Mapping Offset : 00000044
-
-[058h 0088 8] Base Address : 0000000009050000
-[060h 0096 4] Flags (decoded below) : 00000001
+[040h 0064 8] Base Address : 0000000009050000
+[048h 0072 4] Flags (decoded below) : 00000001
COHACC Override : 1
HTTU Override : 0
Proximity Domain Valid : 0
-[064h 0100 4] Reserved : 00000000
-[068h 0104 8] VATOS Address : 0000000000000000
-[070h 0112 4] Model : 00000000
-[074h 0116 4] Event GSIV : 0000006A
-[078h 0120 4] PRI GSIV : 0000006B
-[07Ch 0124 4] GERR GSIV : 0000006D
-[080h 0128 4] Sync GSIV : 0000006C
-[084h 0132 4] Proximity Domain : 00000000
-[088h 0136 4] Device ID Mapping Index : 00000000
-
-[08Ch 0140 4] Input base : 00000000
-[090h 0144 4] ID Count : 0000FFFF
-[094h 0148 4] Output Base : 00000000
-[098h 0152 4] Output Reference : 00000030
-[09Ch 0156 4] Flags (decoded below) : 00000000
- Single Mapping : 0
-
-[0A0h 0160 1] Type : 02
-[0A1h 0161 2] Length : 004C
-[0A3h 0163 1] Revision : 03
-[0A4h 0164 4] Reserved : 00000002
-[0A8h 0168 4] Mapping Count : 00000002
-[0ACh 0172 4] Mapping Offset : 00000024
-
-[0B0h 0176 8] Memory Properties : [IORT Memory Access Properties]
-[0B0h 0176 4] Cache Coherency : 00000001
-[0B4h 0180 1] Hints (decoded below) : 00
+[04Ch 0076 4] Reserved : 00000000
+[050h 0080 8] VATOS Address : 0000000000000000
+[058h 0088 4] Model : 00000000
+[05Ch 0092 4] Event GSIV : 0000006A
+[060h 0096 4] PRI GSIV : 0000006B
+[064h 0100 4] GERR GSIV : 0000006D
+[068h 0104 4] Sync GSIV : 0000006C
+[06Ch 0108 4] Proximity Domain : 00000000
+[070h 0112 4] Device ID Mapping Index : 00000000
+
+[074h 0116 1] Type : 02
+[075h 0117 2] Length : 0038
+[077h 0119 1] Revision : 03
+[078h 0120 4] Reserved : 00000001
+[07Ch 0124 4] Mapping Count : 00000001
+[080h 0128 4] Mapping Offset : 00000024
+
+[084h 0132 8] Memory Properties : [IORT Memory Access Properties]
+[084h 0132 4] Cache Coherency : 00000001
+[088h 0136 1] Hints (decoded below) : 00
Transient : 0
Write Allocate : 0
Read Allocate : 0
Override : 0
-[0B5h 0181 2] Reserved : 0000
-[0B7h 0183 1] Memory Flags (decoded below) : 03
+[089h 0137 2] Reserved : 0000
+[08Bh 0139 1] Memory Flags (decoded below) : 03
Coherency : 1
Device Attribute : 1
-[0B8h 0184 4] ATS Attribute : 00000000
-[0BCh 0188 4] PCI Segment Number : 00000000
-[0C0h 0192 1] Memory Size Limit : 40
-[0C1h 0193 3] Reserved : 000000
-
-[0C4h 0196 4] Input base : 00000000
-[0C8h 0200 4] ID Count : 000000FF
-[0CCh 0204 4] Output Base : 00000000
-[0D0h 0208 4] Output Reference : 00000048
-[0D4h 0212 4] Flags (decoded below) : 00000000
- Single Mapping : 0
-
-[0D8h 0216 4] Input base : 00000100
-[0DCh 0220 4] ID Count : 0000FEFF
-[0E0h 0224 4] Output Base : 00000100
-[0E4h 0228 4] Output Reference : 00000030
-[0E8h 0232 4] Flags (decoded below) : 00000000
+[08Ch 0140 4] ATS Attribute : 00000000
+[090h 0144 4] PCI Segment Number : 00000000
+[094h 0148 1] Memory Size Limit : 40
+[095h 0149 3] Reserved : 000000
+
+[098h 0152 4] Input base : 00000000
+[09Ch 0156 4] ID Count : 000000FF
+[0A0h 0160 4] Output Base : 00000000
+[0A4h 0164 4] Output Reference : 00000030
+[0A8h 0168 4] Flags (decoded below) : 00000000
Single Mapping : 0
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20250628195722.977078-10-gustavo.romero@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
9 months ago |
|
Gustavo Romero
|
50b5fd232e |
qtest/bios-tables-test: Add blobs for its=off test on aarch64
Add blobs for test_acpi_aarch64_virt_tcg_its_off(), which introduces a new variant, .its_off, that requires variations of the MADT and IORT tables. MADT (aka APIC) diff: +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 000000B8 +[008h 0008 1] Revision : 04 +[009h 0009 1] Checksum : C1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPC " +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : 00000000 +[028h 0040 4] Flags (decoded below) : 00000000 + PC-AT Compatibility : 0 + +[02Ch 0044 1] Subtable Type : 0C [Generic Interrupt Distributor] +[02Dh 0045 1] Length : 18 +[02Eh 0046 2] Reserved : 0000 +[030h 0048 4] Local GIC Hardware ID : 00000000 +[034h 0052 8] Base Address : 0000000008000000 +[03Ch 0060 4] Interrupt Base : 00000000 +[040h 0064 1] Version : 03 +[041h 0065 3] Reserved : 000000 + +[044h 0068 1] Subtable Type : 0B [Generic Interrupt Controller] +[045h 0069 1] Length : 50 +[046h 0070 2] Reserved : 0000 +[048h 0072 4] CPU Interface Number : 00000000 +[04Ch 0076 4] Processor UID : 00000000 +[050h 0080 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Performance Interrupt Trigger Mode : 0 + Virtual GIC Interrupt Trigger Mode : 0 +[054h 0084 4] Parking Protocol Version : 00000000 +[058h 0088 4] Performance Interrupt : 00000017 +[05Ch 0092 8] Parked Address : 0000000000000000 +[064h 0100 8] Base Address : 0000000000000000 +[06Ch 0108 8] Virtual GIC Base Address : 0000000000000000 +[074h 0116 8] Hypervisor GIC Base Address : 0000000000000000 +[07Ch 0124 4] Virtual GIC Interrupt : 00000000 +[080h 0128 8] Redistributor Base Address : 0000000000000000 +[088h 0136 8] ARM MPIDR : 0000000000000000 +[090h 0144 1] Efficiency Class : 00 +[091h 0145 1] Reserved : 00 +[092h 0146 2] SPE Overflow Interrupt : 0000 + +[094h 0148 1] Subtable Type : 0E [Generic Interrupt Redistributor] +[095h 0149 1] Length : 10 +[096h 0150 2] Reserved : 0000 +[098h 0152 8] Base Address : 00000000080A0000 +[0A0h 0160 4] Length : 00F60000 + +[0A4h 0164 1] Subtable Type : 0F [Generic Interrupt Translator] +[0A5h 0165 1] Length : 14 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Translation ID : 00000000 +[0ACh 0172 8] Base Address : 0000000008080000 +[0B4h 0180 4] Reserved : 00000000 IORT diff: +[000h 0000 4] Signature : "IORT" [IO Remapping Table] +[004h 0004 4] Table Length : 000000EC +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : 57 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPC " +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Node Count : 00000003 +[028h 0040 4] Node Offset : 00000030 +[02Ch 0044 4] Reserved : 00000000 + +[030h 0048 1] Type : 00 +[031h 0049 2] Length : 0018 +[033h 0051 1] Revision : 01 +[034h 0052 4] Reserved : 00000000 +[038h 0056 4] Mapping Count : 00000000 +[03Ch 0060 4] Mapping Offset : 00000000 + +[040h 0064 4] ItsCount : 00000001 +[044h 0068 4] Identifiers : 00000000 + +[048h 0072 1] Type : 04 +[049h 0073 2] Length : 0058 +[04Bh 0075 1] Revision : 04 +[04Ch 0076 4] Reserved : 00000001 +[050h 0080 4] Mapping Count : 00000001 +[054h 0084 4] Mapping Offset : 00000044 + +[058h 0088 8] Base Address : 0000000009050000 +[060h 0096 4] Flags (decoded below) : 00000001 + COHACC Override : 1 + HTTU Override : 0 + Proximity Domain Valid : 0 +[064h 0100 4] Reserved : 00000000 +[068h 0104 8] VATOS Address : 0000000000000000 +[070h 0112 4] Model : 00000000 +[074h 0116 4] Event GSIV : 0000006A +[078h 0120 4] PRI GSIV : 0000006B +[07Ch 0124 4] GERR GSIV : 0000006D +[080h 0128 4] Sync GSIV : 0000006C +[084h 0132 4] Proximity Domain : 00000000 +[088h 0136 4] Device ID Mapping Index : 00000000 + +[08Ch 0140 4] Input base : 00000000 +[090h 0144 4] ID Count : 0000FFFF +[094h 0148 4] Output Base : 00000000 +[098h 0152 4] Output Reference : 00000030 +[09Ch 0156 4] Flags (decoded below) : 00000000 + Single Mapping : 0 + +[0A0h 0160 1] Type : 02 +[0A1h 0161 2] Length : 004C +[0A3h 0163 1] Revision : 03 +[0A4h 0164 4] Reserved : 00000002 +[0A8h 0168 4] Mapping Count : 00000002 +[0ACh 0172 4] Mapping Offset : 00000024 + +[0B0h 0176 8] Memory Properties : [IORT Memory Access Properties] +[0B0h 0176 4] Cache Coherency : 00000001 +[0B4h 0180 1] Hints (decoded below) : 00 + Transient : 0 + Write Allocate : 0 + Read Allocate : 0 + Override : 0 +[0B5h 0181 2] Reserved : 0000 +[0B7h 0183 1] Memory Flags (decoded below) : 03 + Coherency : 1 + Device Attribute : 1 +[0B8h 0184 4] ATS Attribute : 00000000 +[0BCh 0188 4] PCI Segment Number : 00000000 +[0C0h 0192 1] Memory Size Limit : 40 +[0C1h 0193 3] Reserved : 000000 + +[0C4h 0196 4] Input base : 00000000 +[0C8h 0200 4] ID Count : 000000FF +[0CCh 0204 4] Output Base : 00000000 +[0D0h 0208 4] Output Reference : 00000048 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Single Mapping : 0 + +[0D8h 0216 4] Input base : 00000100 +[0DCh 0220 4] ID Count : 0000FEFF +[0E0h 0224 4] Output Base : 00000100 +[0E4h 0228 4] Output Reference : 00000030 +[0E8h 0232 4] Flags (decoded below) : 00000000 + Single Mapping : 0 Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20250628195722.977078-8-gustavo.romero@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 months ago |
|
Bibo Mao
|
0265723eba |
tests/data/uefi-boot-images: Add ISO image for LoongArch system
To test ACPI tables, edk2 needs to be booted with a disk image having EFI partition. This image is created using UefiTestToolsPkg. The image is generated with the following command: make -f tests/uefi-test-tools/Makefile Signed-off-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20250520130158.767083-3-maobibo@loongson.cn> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
11 months ago |
|
Daniel Henrique Barboza
|
e037673764 |
target/riscv: use RVB in RVA22U64
From the time we added RVA22U64 until now the spec didn't declare 'RVB' as a dependency, using zba/zbb/zbs instead. Since then the RVA22 spec [1] added the following in the 'RVA22U64 Mandatory Extensions' section: "B Bit-manipulation instructions Note: The B extension comprises the Zba, Zbb, and Zbs extensions. At the time of RVA22U64's ratification, the B extension had not yet been defined, and so RVA22U64 explicitly mandated Zba, Zbb, and Zbs instead. Mandating B is equivalent." It is also equivalent to QEMU (see riscv_cpu_validate_b() in target/riscv/tcg/tcg-cpu.c). Finally, RVA23U64 [2] directly mentions RVB as a mandatory extension, not citing zba/zbb/zbs. To make it clear that RVA23U64 will extend RVA22U64 (i.e. RVA22 is a parent of RVA23), use RVB in RVA22U64 as well. (bios-tables-test change: RVB added to riscv,isa) [1] https://github.com/riscv/riscv-profiles/blob/main/src/profiles.adoc#61-rva22u64-profile [2] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc#rva23u64-profile Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250115184316.2344583-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 year ago |
|
Daniel Henrique Barboza
|
38d0ce28df |
target/riscv: add ssu64xl
ssu64xl is defined in RVA22 as: "sstatus.UXL must be capable of holding the value 2 (i.e., UXLEN=64 must be supported)." This is always true in TCG and it's mandatory for RVA23, so claim support for it. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250115184316.2344583-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 year ago |
|
Daniel Henrique Barboza
|
2fedb6b183 |
target/riscv: add shgatpa
shgatpa is defined in RVA22 as: "For each supported virtual memory scheme SvNN supported in satp, the corresponding hgatp SvNNx4 mode must be supported. The hgatp mode Bare must also be supported." Claim support for shgatpa since this is always true for TCG. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241218114026.1652352-9-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 year ago |
|
Daniel Henrique Barboza
|
c379e6f627 |
target/riscv: add shvsatpa
shvsatpa is defined in RVA22 as: "All translation modes supported in satp must be supported in vsatp." This is always true in TCG so let's claim support for it. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241218114026.1652352-8-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 year ago |
|
Daniel Henrique Barboza
|
73afe5c2f9 |
target/riscv: add shvstvecd
shvstvecd is defined in RVA22 as: "vstvec.MODE must be capable of holding the value 0 (Direct). When vstvec.MODE=Direct, vstvec.BASE must be capable of holding any valid four-byte-aligned address." This is always true for TCG so let's claim support for it. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241218114026.1652352-7-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 year ago |
|
Daniel Henrique Barboza
|
e306fff7f8 |
target/riscv: add shtvala
shtvala is described in RVA22 as:
"htval must be written with the faulting guest physical address
in all circumstances permitted by the ISA."
This is the case since commit
|
1 year ago |
|
Daniel Henrique Barboza
|
8d6855ac7e |
target/riscv: add shvstvala
shvstvala is defined in RVA22 as: "vstval must be written in all cases described above for stval." By "cases describe above" the doc refer to the description of sstvala: "stval must be written with the faulting virtual address for load, store, and instruction page-fault, access-fault, and misaligned exceptions, and for breakpoint exceptions other than those caused by execution of the EBREAK or C.EBREAK instructions. For virtual-instruction and illegal-instruction exceptions, stval must be written with the faulting instruction." We already have sstvala, and our vstval follows the same rules as stval, so we can claim to support shvstvala too. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241218114026.1652352-5-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 year ago |
|
Daniel Henrique Barboza
|
3739732e75 |
target/riscv: add shcounterenw
shcounterenw is defined in RVA22 as: "For any hpmcounter that is not read-only zero, the corresponding bit in hcounteren must be writable." This is always true in TCG so let's claim support for it. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241218114026.1652352-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 year ago |
Igor Mammedov
|
9fb1c9a1bb |
tests: acpi: update expected blobs
_DSM function 7 AML should have followig change:
If ((Arg2 == 0x07))
{
- Local0 = Package (0x02)
- {
- Zero,
- ""
- }
Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
))
- Local0 [Zero] = Local2
+ Local0 = Package (0x02) {}
+ If (!((Local2 == Zero) || (Local2 == 0xFFFFFFFF)))
+ {
+ Local0 [Zero] = Local2
+ Local0 [One] = ""
+ }
+
Return (Local0)
}
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20250115125342.3883374-4-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
1 year ago |
Zhenzhong Duan
|
81ab964f21 |
tests/acpi: q35: Update host address width in DMAR
Differences: @@ -1,39 +1,39 @@ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20200925 (64-bit version) * Copyright (c) 2000 - 2020 Intel Corporation * - * Disassembly of tests/data/acpi/x86/q35/DMAR.dmar, Mon Nov 11 15:31:18 2024 + * Disassembly of /tmp/aml-SPJ4W2, Mon Nov 11 15:31:18 2024 * * ACPI Data Table [DMAR] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "DMAR" [DMA Remapping table] [004h 0004 4] Table Length : 00000078 [008h 0008 1] Revision : 01 -[009h 0009 1] Checksum : 15 +[009h 0009 1] Checksum : 0C [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 -[024h 0036 1] Host Address Width : 26 +[024h 0036 1] Host Address Width : 2F [025h 0037 1] Flags : 01 [026h 0038 10] Reserved : 00 00 00 00 00 00 00 00 00 00 [030h 0048 2] Subtable Type : 0000 [Hardware Unit Definition] [032h 0050 2] Length : 0040 [034h 0052 1] Flags : 00 [035h 0053 1] Reserved : 00 [036h 0054 2] PCI Segment Number : 0000 [038h 0056 8] Register Base Address : 00000000FED90000 [040h 0064 1] Device Scope Type : 03 [IOAPIC Device] [041h 0065 1] Entry Length : 08 [042h 0066 2] Reserved : 0000 [044h 0068 1] Enumeration ID : 00 [045h 0069 1] PCI Bus Number : FF Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Acked-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com> Message-Id: <20241212083757.605022-18-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
1 year ago |
|
Igor Mammedov
|
9ccb69df55 |
tests: acpi: update expected blobs
previous patch has changed cpu hotplug AML, expected diff:
@@ -2942,6 +2942,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF)
Name (CNEW, Package (0xFF) {})
+ Name (CEJL, Package (0xFF) {})
Local3 = Zero
Local4 = One
While ((Local4 == One))
@@ -2949,6 +2950,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
Local4 = Zero
Local0 = One
Local1 = Zero
+ Local5 = Zero
While (((Local0 == One) && (Local3 < One)))
{
Local0 = Zero
@@ -2959,7 +2961,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
Break
}
- If ((Local1 == 0xFF))
+ If (((Local1 == 0xFF) || (Local5 == 0xFF)))
{
Local4 = One
Break
@@ -2972,10 +2974,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
Local1++
Local0 = One
}
- ElseIf ((\_SB.PCI0.PRES.CRMV == One))
+
+ If ((\_SB.PCI0.PRES.CRMV == One))
{
- CTFY (Local3, 0x03)
- \_SB.PCI0.PRES.CRMV = One
+ CEJL [Local5] = Local3
+ Local5++
Local0 = One
}
@@ -2992,6 +2995,16 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
\_SB.PCI0.PRES.CINS = One
Local2++
}
+
+ Local2 = Zero
+ While ((Local2 < Local5))
+ {
+ Local3 = DerefOf (CEJL [Local2])
+ CTFY (Local3, 0x03)
+ \_SB.PCI0.PRES.CSEL = Local3
+ \_SB.PCI0.PRES.CRMV = One
+ Local2++
+ }
}
Release (\_SB.PCI0.PRES.CPLK)
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20241210163945.3422623-4-imammedo@redhat.com>
Tested-by: Eric Mackay <eric.mackay@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
1 year ago |
Sia Jee Heng
|
97b682e61d |
tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V
Update the virt SPCR golden reference file for RISC-V to accommodate the SPCR Table revision 4 [1], utilizing the iasl binary compiled from the latest ACPICA repository. The SPCR table has been modified to adhere to the revision 4 format [2]. [1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table [2]: https://github.com/acpica/acpica/pull/931 Diffs from iasl: /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20200925 (64-bit version) * Copyright (c) 2000 - 2020 Intel Corporation * - * Disassembly of tests/data/acpi/riscv64/virt/SPCR, Wed Aug 28 18:28:19 2024 + * Disassembly of /tmp/aml-MN0NS2, Wed Aug 28 18:28:19 2024 * * ACPI Data Table [SPCR] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table] -[004h 0004 4] Table Length : 00000050 -[008h 0008 1] Revision : 02 -[009h 0009 1] Checksum : B9 +[004h 0004 4] Table Length : 0000005A +[008h 0008 1] Revision : 04 +[009h 0009 1] Checksum : 13 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 -[024h 0036 1] Interface Type : 00 +[024h 0036 1] Interface Type : 12 [025h 0037 3] Reserved : 000000 [028h 0040 12] Serial Port Register : [Generic Address Structure] [028h 0040 1] Space ID : 00 [SystemMemory] [029h 0041 1] Bit Width : 20 [02Ah 0042 1] Bit Offset : 00 [02Bh 0043 1] Encoded Access Width : 01 [Byte Access:8] [02Ch 0044 8] Address : 0000000010000000 [034h 0052 1] Interrupt Type : 10 [035h 0053 1] PCAT-compatible IRQ : 00 [036h 0054 4] Interrupt : 0000000A [03Ah 0058 1] Baud Rate : 07 [03Bh 0059 1] Parity : 00 [03Ch 0060 1] Stop Bits : 01 [03Dh 0061 1] Flow Control : 00 [03Eh 0062 1] Terminal Type : 00 [04Ch 0076 1] Reserved : 00 [040h 0064 2] PCI Device ID : FFFF [042h 0066 2] PCI Vendor ID : FFFF [044h 0068 1] PCI Bus : 00 [045h 0069 1] PCI Device : 00 [046h 0070 1] PCI Function : 00 [047h 0071 4] PCI Flags : 00000000 [04Bh 0075 1] PCI Segment : 00 -[04Ch 0076 4] Reserved : 00000000 +[04Ch 0076 004h] Uart Clock Freq : 00000000 +[050h 0080 004h] Precise Baud rate : 00000000 +[054h 0084 002h] NameSpaceStringLength : 0002 +[056h 0086 002h] NameSpaceStringOffset : 0058 +[058h 0088 002h] NamespaceString : "." -Raw Table Data: Length 80 (0x50) +Raw Table Data: Length 90 (0x5A) - 0000: 53 50 43 52 50 00 00 00 02 B9 42 4F 43 48 53 20 // SPCRP.....BOCHS + 0000: 53 50 43 52 5A 00 00 00 04 13 42 4F 43 48 53 20 // SPCRZ.....BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC - 0020: 01 00 00 00 00 00 00 00 00 20 00 01 00 00 00 10 // ......... ...... + 0020: 01 00 00 00 12 00 00 00 00 20 00 01 00 00 00 10 // ......... ...... 0030: 00 00 00 00 10 00 0A 00 00 00 07 00 01 00 00 03 // ................ 0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 02 00 58 00 2E 00 // ......X... Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Message-ID: <20241028015744.624943-4-jeeheng.sia@starfivetech.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 year ago |
Jonathan Cameron
|
5d52529462 |
bios-tables-test: Add data for complex numa test (GI, GP etc)
Given this is a new configuration, there are affects on APIC, CEDT
and DSDT, but the key elements are in SRAT (plus related data in
HMAT). The configuration has node to exercise many different combinations.
0) CPUs + Memory
1) GI only
2) GP only
3) CPUS only
4) Memory only
5) CPUs + HP memory
GI node, GP Node, Memory only node, hotplug memory
only node, latency and bandwidth such that in Linux Access0
(any initiator) and Access1 (CPU initiators only) given different
answers. Following cropped to remove details of each entry.
[000h 0000 004h] Signature : "SRAT" [System Resource Affinity Table]
...
[030h 0048 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
...
[032h 0050 001h] Proximity Domain Low(8) : 00
[033h 0051 001h] Apic ID : 00
...
[040h 0064 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
...
[042h 0066 001h] Proximity Domain Low(8) : 03
[043h 0067 001h] Apic ID : 01
...
[050h 0080 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
...
[052h 0082 001h] Proximity Domain Low(8) : 05
[053h 0083 001h] Apic ID : 02
...
[060h 0096 001h] Subtable Type : 01 [Memory Affinity]
...
[062h 0098 004h] Proximity Domain : 00000000
...
[068h 0104 008h] Base Address : 0000000000000000
[070h 0112 008h] Address Length : 00000000000A0000
...
[088h 0136 001h] Subtable Type : 01 [Memory Affinity]
...
[08Ah 0138 004h] Proximity Domain : 00000000
...
[090h 0144 008h] Base Address : 0000000000100000
[098h 0152 008h] Address Length : 0000000003F00000
...
[0B0h 0176 001h] Subtable Type : 01 [Memory Affinity]
...
[0B2h 0178 004h] Proximity Domain : 00000004
...
[0B8h 0184 008h] Base Address : 0000000004000000
[0C0h 0192 008h] Address Length : 0000000004000000
... some zero length entries follow...
[1A0h 0416 001h] Subtable Type : 05 [Generic Initiator Affinity]
[1A1h 0417 001h] Length : 20
[1A2h 0418 001h] Reserved1 : 00
[1A3h 0419 001h] Device Handle Type : 01
[1A4h 0420 004h] Proximity Domain : 00000001
[1A8h 0424 010h] Device Handle : 00 00 01 02 00 00 00 00 00 00 00 00 00 00 00 00
[1B8h 0440 004h] Flags (decoded below) : 00000001
Enabled : 1
Architectural Transactions : 0
[1BCh 0444 004h] Reserved2 : 00000000
[1C0h 0448 001h] Subtable Type : 06 [Generic Port Affinity]
[1C1h 0449 001h] Length : 20
[1C2h 0450 001h] Reserved1 : 00
[1C3h 0451 001h] Device Handle Type : 00
[1C4h 0452 004h] Proximity Domain : 00000002
[1C8h 0456 010h] Device Handle : 41 43 50 49 30 30 31 36 40 00 00 00 00 00 00 00
[1D8h 0472 004h] Flags (decoded below) : 00000001
Enabled : 1
Architectural Transactions : 0
[1DCh 0476 004h] Reserved2 : 00000000
[1E0h 0480 001h] Subtable Type : 01 [Memory Affinity]
...
[1E2h 0482 004h] Proximity Domain : 00000005
...
[1E8h 0488 008h] Base Address : 0000000100000000
[1F0h 0496 008h] Address Length : 0000000090000000
Example block from HMAT:
[0F0h 0240 002h] Structure Type : 0001 [System Locality Latency and Bandwidth Information]
[0F2h 0242 002h] Reserved : 0000
[0F4h 0244 004h] Length : 00000078
[0F8h 0248 001h] Flags (decoded below) : 00
Memory Hierarchy : 0
Use Minimum Transfer Size : 0
Non-sequential Transfers : 0
[0F9h 0249 001h] Data Type : 03
[0FAh 0250 001h] Minimum Transfer Size : 00
[0FBh 0251 001h] Reserved1 : 00
[0FCh 0252 004h] Initiator Proximity Domains # : 00000004
[100h 0256 004h] Target Proximity Domains # : 00000006
[104h 0260 004h] Reserved2 : 00000000
[108h 0264 008h] Entry Base Unit : 0000000000000004
[110h 0272 004h] Initiator Proximity Domain List : 00000000
[114h 0276 004h] Initiator Proximity Domain List : 00000001
[118h 0280 004h] Initiator Proximity Domain List : 00000003
[11Ch 0284 004h] Initiator Proximity Domain List : 00000005
[120h 0288 004h] Target Proximity Domain List : 00000000
[124h 0292 004h] Target Proximity Domain List : 00000001
[128h 0296 004h] Target Proximity Domain List : 00000002
[12Ch 0300 004h] Target Proximity Domain List : 00000003
[130h 0304 004h] Target Proximity Domain List : 00000004
[134h 0308 004h] Target Proximity Domain List : 00000005
[138h 0312 002h] Entry : 00C8
[13Ah 0314 002h] Entry : 0000
[13Ch 0316 002h] Entry : 0032
[13Eh 0318 002h] Entry : 0000
[140h 0320 002h] Entry : 0032
[142h 0322 002h] Entry : 0064
[144h 0324 002h] Entry : 0019
[146h 0326 002h] Entry : 0000
[148h 0328 002h] Entry : 0064
[14Ah 0330 002h] Entry : 0000
[14Ch 0332 002h] Entry : 00C8
[14Eh 0334 002h] Entry : 0019
[150h 0336 002h] Entry : 0064
[152h 0338 002h] Entry : 0000
[154h 0340 002h] Entry : 0032
[156h 0342 002h] Entry : 0000
[158h 0344 002h] Entry : 0032
[15Ah 0346 002h] Entry : 0064
[15Ch 0348 002h] Entry : 0064
[15Eh 0350 002h] Entry : 0000
[160h 0352 002h] Entry : 0032
[162h 0354 002h] Entry : 0000
[164h 0356 002h] Entry : 0032
[166h 0358 002h] Entry : 00C8
Note the zeros represent entries where the target node has no
memory. These could be surpressed but it isn't 'wrong' to provide
them and it is (probably) permissible under ACPI to hotplug memory
into these nodes later.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20241107123446.902801-6-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
1 year ago |
|
Jonathan Cameron
|
2cb740932c |
bios-tables-test: Allow for new acpihmat-generic-x test data.
The test to be added exercises many corner cases of the SRAT and HMAT table generation. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
1 year ago |
|
Igor Mammedov
|
e50a24ead1 |
tests/acpi: update expected blobs
Expected AML return to the state before
|
1 year ago |
Salil Mehta
|
4d62d15b11 |
tests/qtest/bios-tables-test: Update DSDT golden masters for x86/{pc,q35}
Update DSDT golden master files for x86/pc and x86/q35 platforms to
accommodate changes made in the architecture-agnostic CPU AML. These
updates notify the guest OS of vCPU hot-plug and hot-unplug status
using the ACPI `_STA.Enabled` bit.
The following is a diff of the changes in the .dsl file generated with
IASL:
@@ -1480,6 +1480,7 @@
CRMV, 1,
CEJ0, 1,
CEJF, 1,
+ CPRS, 1,
Offset (0x05),
CCMD, 8
}
@@ -1514,9 +1515,16 @@
Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF)
\_SB.PCI0.PRES.CSEL = Arg0
Local0 = Zero
- If ((\_SB.PCI0.PRES.CPEN == One))
- {
- Local0 = 0x0F
+ If ((\_SB.PCI0.PRES.CPRS == One))
+ {
+ If ((\_SB.PCI0.PRES.CPEN == One))
+ {
+ Local0 = 0x0F
+ }
+ Else
+ {
+ Local0 = 0x0D
+ }
}
Release (\_SB.PCI0.PRES.CPLK)
Reported-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
1 year ago |
Ricardo Ribalda
|
9848a76c0b |
tests/acpi: pc: update golden masters for DSDT
Note: since all we did is replace VarPackageOp with PackageOP, and both are represented by Package() in ASL, the AML is different but ASL is the same. Signed-off-by: Ricardo Ribalda <ribalda@chromium.org> Message-Id: <20240924132417.739809-4-ribalda@chromium.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> |
2 years ago |
|
Michael S. Tsirkin
|
feb58e3b26 |
acpi/disassemle-aml.sh: fix up after dir reorg
We moved expected files around, fix up the disassembler script. Fixes: |
1 year ago |
Haibo Xu
|
f91bb8baaa |
tests/acpi: Add expected ACPI SRAT AML file for RISC-V
As per the step 5 in the process documented in bios-tables-test.c, generate the expected ACPI SRAT AML data file for RISC-V using the rebuild-expected-aml.sh script and update the bios-tables-test-allowed-diff.h. This is a new file being added for the first time. Hence, iASL diff output is not added. Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <a667480203b35508038176c8ce4722370294cc57.1723172696.git.haibo1.xu@intel.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
2 years ago |
|
Haibo Xu
|
761a9c5820 |
tests/acpi: Add empty ACPI SRAT data file for RISC-V
As per process documented (steps 1-3) in bios-tables-test.c, add empty AML data file for RISC-V ACPI SRAT table and add the entry in bios-tables-test-allowed-diff.h. Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <0e30216273f2f59916bc651350578d8e8bc3a75f.1723172696.git.haibo1.xu@intel.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
2 years ago |
Gerd Hoffmann
|
e53c136f79 |
tests/acpi: update aarch64/virt/SSDT.memhp
Address (and checksum) change due to firmware image size change.
DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
[ ... ]
- Name (MEMA, 0x43C80000)
+ Name (MEMA, 0x43DA0000)
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
|
2 years ago |