riscv/qemu - qemu - Gitea: Git with a cup of tea

Commit Graph

Author	SHA1	Message	Date
Peter Maydell	9881d3d168	tests/qtest: Use qtest_system_reset() instead of open-coded versions Use the qtest_system_reset() function in various tests that were previously open-coding the system-reset. Note that in several cases this fixes a bug where the test did not wait for the RESET QMP event before continuing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Fabiano Rosas <farosas@suse.de>	1 year ago
Peter Maydell	6b76264ed0	tests/qtest: Add qtest_system_reset() utility function We have several qtest tests which want to reset the QEMU under test during the course of testing something. They currently generally have their own functions to do this, which work by sending a "system_reset" QMP command. However, "system_reset" only requests a reset, and many of the tests which send the QMP command forget the "and then wait for the QMP RESET event" part which is needed to ensure that the reset has completed. Provide a qtest_system_reset() function in libqtest so that we don't need to reimplement this in multiple different tests. A few tests (for example device hotplug related tests) want to perform the reset command and then wait for some other event that is produced during the reset sequence. For them we provide qtest_system_reset_nowait() so they can clearly indicate that they are deliberately not waiting for the RESET event. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Fabiano Rosas <farosas@suse.de>	1 year ago
Dmitry Frolov	94aa1a0e30	tests/qtest: add TIMEOUT_MULTIPLIER Some tests need more time when qemu is built with "--enable-asan --enable-ubsan" As was discussed here: https://patchew.org/QEMU/20241112120100.176492-2-frolov@swemel.ru/ TIMEOUT_MULTIPLIER enviroment variable will be a useful option, allowing non-invasive timeouts increasing for a specific build. Signed-off-by: Dmitry Frolov <frolov@swemel.ru> Tested-by: Fabiano Rosas <farosas@suse.de> [changed from ifndef to ?=] Signed-off-by: Fabiano Rosas <farosas@suse.de>	1 year ago
Peter Maydell	a5ba0a7e4e	aspeed queue: * Removed tacoma-bmc machine * Added support for SDHCI on AST2700 SoC * Improved functional tests * Extended SMC qtest to all Aspeed SoCs -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmdZMTQACgkQUaNDx8/7 7KE9dhAAw9xNULQ7KG9udSNqYPRGP2w8teO4b9YOfRlJlSJuCInbeLjg1Hw3b/bZ rEtnwjl18f+mpmHzvasQthN4vUtcR1UwrW6SvmAjAQV8iNw059ugxWdxV9VR72hc 1AlzsW/Hea8s448INTEUvEjosYeLRRxZQyiJt9Lf5IkU/6yLj98YssKKvRqPpkxP Ens7PapgGPqA7cPnPYofRn2WINtHNnvX2FGlWTnCoPVp85VJzjJVFcK14kBych2U fmNZAY7pPTBkwwqR/qoPOyqBBCLeu3Jimk7hR8VbBbfwMT/Zg3RO7TJfwJex9TEs PIViRuM8krEppL6fmJlpDTatU2t0ffQY1SSVRWCDxJDDRpQN7iDei3vuzXOfLVAe lLSXS5Q1f+sO6JzbqkYSufh5V7zR5De8rk4j5WszC3cko2godTZm3qyqUxEaQGcx kjG58R+a7qLLeNMcPed5qgGjYeCPmhHay80E3faXKOezktSIM5z5b822ZPZfw3oG gTddZ4hdTg0BxtEjSv19qqnJW0Hs+NZJQuyu34QS82dZqPeZ22dmfULtf9uQ/3oV A/jKfTncl3sW1otfLABj6/RPVH/Sr7IM70XBjlc1+p9Ci7Es17er8umFOAyek9WL pE/Lq23MnAPBUsPKOJRdDFClTGwdnemXJoymwY/NZS4SgV3GcD8= =BiCq -----END PGP SIGNATURE----- Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging aspeed queue: * Removed tacoma-bmc machine * Added support for SDHCI on AST2700 SoC * Improved functional tests * Extended SMC qtest to all Aspeed SoCs # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmdZMTQACgkQUaNDx8/7 # 7KE9dhAAw9xNULQ7KG9udSNqYPRGP2w8teO4b9YOfRlJlSJuCInbeLjg1Hw3b/bZ # rEtnwjl18f+mpmHzvasQthN4vUtcR1UwrW6SvmAjAQV8iNw059ugxWdxV9VR72hc # 1AlzsW/Hea8s448INTEUvEjosYeLRRxZQyiJt9Lf5IkU/6yLj98YssKKvRqPpkxP # Ens7PapgGPqA7cPnPYofRn2WINtHNnvX2FGlWTnCoPVp85VJzjJVFcK14kBych2U # fmNZAY7pPTBkwwqR/qoPOyqBBCLeu3Jimk7hR8VbBbfwMT/Zg3RO7TJfwJex9TEs # PIViRuM8krEppL6fmJlpDTatU2t0ffQY1SSVRWCDxJDDRpQN7iDei3vuzXOfLVAe # lLSXS5Q1f+sO6JzbqkYSufh5V7zR5De8rk4j5WszC3cko2godTZm3qyqUxEaQGcx # kjG58R+a7qLLeNMcPed5qgGjYeCPmhHay80E3faXKOezktSIM5z5b822ZPZfw3oG # gTddZ4hdTg0BxtEjSv19qqnJW0Hs+NZJQuyu34QS82dZqPeZ22dmfULtf9uQ/3oV # A/jKfTncl3sW1otfLABj6/RPVH/Sr7IM70XBjlc1+p9Ci7Es17er8umFOAyek9WL # pE/Lq23MnAPBUsPKOJRdDFClTGwdnemXJoymwY/NZS4SgV3GcD8= # =BiCq # -----END PGP SIGNATURE----- # gpg: Signature made Wed 11 Dec 2024 06:29:08 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu: (24 commits) test/qtest/ast2700-smc-test: Support to test AST2700 test/qtest: Introduce a new aspeed-smc-utils.c to place common testcases test/qtest/aspeed_smc-test: Support write page command with QPI mode test/qtest/aspeed_smc-test: Support to test AST1030 test/qtest/aspeed_smc-test: Support to test AST2600 test/qtest/aspeed_smc-test: Support to test AST2500 test/qtest/aspeed_smc-test: Introducing a "page_addr" data field test/qtest/aspeed_smc-test: Support to test all CE pins test/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs test/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function tests/functional: Move debian boot test from avocado tests/functional: Introduce a specific test for rainier-bmc machine tests/functional: Introduce a specific test for ast2600 SoC tests/functional: Introduce a specific test for ast2500 SoC tests/functional: Introduce a specific test for romulus-bmc machine tests/functional: Introduce a specific test for palmetto-bmc machine tests/functional: Introduce a specific test for ast1030 SoC aspeed/soc: Support eMMC for AST2700 aspeed/soc: Support SDHCI for AST2700 hw/sd/aspeed_sdhci: Add AST2700 Support ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Peter Maydell	b5e3f63a4a	* Fix a regression regarding CVE-2023-2861 with security_model=passthrough which caused certain sockets on guest to fail. -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEltjREM96+AhPiFkBNMK1h2Wkc5UFAmdYErEXHHFlbXVfb3Nz QGNydWRlYnl0ZS5jb20ACgkQNMK1h2Wkc5UaYRAAiyQ/o1Ex7u2SpKzVs5VWSS9j AgtF9FD4S9m6XMY+7VvX2KrUK/r5zUzjDiZyKTBT+TqczFIWvV6N2bb9II+PS1if LwRCPk4jwl7ptk9r2/+jSLeQ9a1D58p8VsSaJCJWOwKuupy45L4iWQsyIhscdKve 13Zjc0SZOOcN3A5Q9HdMjDLuW1WXlxf+UzRnca1CpDLfx0ubMIL4YGYB7Rm0JG+A OaJT2Sd71JH7TU88j0sVhVFMy/TUY+zSrU2GJ/Y1ESK2w8MxYH2VyDvNnXd5tlqV RcBCY86cZfeDdxf1xu/WOGAhDbi++tlQtu+bSYZiMdlYDB7C4yZgtdMTVhSPstlK 1jndtbh4zUNeWpMA5LIwQ14JmjSUG/ea6EXN1i6xy6rCsFrhhEmG+MOxPm+SsnSv OtL9RwKfx3nuCuVhurjc/1JNxCSthYJPivzBN52B3Gh2zBvUCmHz5DL2YLI1fYYd YTxbSkMOBTxIL5tf7e2Zyfu1HezSNEMjJAX9wxu/GY7T+bWJBjIinMVBHEzBiAdB aHuScq37uxZH1B8NmddZvgitCP7m18K2jVutNE0GFy4VQkogKIUEh+2b5N2y0nUi eKS7iue/6CJyfQCrucN1hR60xPJXMtApi/7sNW9+b5H7fbIcdPzL93Xo58CfYZPt kdlqod3W+ivvKqjeGvY= =7A03 -----END PGP SIGNATURE----- Merge tag 'pull-9p-20241210' of https://github.com/cschoenebeck/qemu into staging * Fix a regression regarding CVE-2023-2861 with security_model=passthrough which caused certain sockets on guest to fail. # -----BEGIN PGP SIGNATURE----- # # iQJLBAABCgA1FiEEltjREM96+AhPiFkBNMK1h2Wkc5UFAmdYErEXHHFlbXVfb3Nz # QGNydWRlYnl0ZS5jb20ACgkQNMK1h2Wkc5UaYRAAiyQ/o1Ex7u2SpKzVs5VWSS9j # AgtF9FD4S9m6XMY+7VvX2KrUK/r5zUzjDiZyKTBT+TqczFIWvV6N2bb9II+PS1if # LwRCPk4jwl7ptk9r2/+jSLeQ9a1D58p8VsSaJCJWOwKuupy45L4iWQsyIhscdKve # 13Zjc0SZOOcN3A5Q9HdMjDLuW1WXlxf+UzRnca1CpDLfx0ubMIL4YGYB7Rm0JG+A # OaJT2Sd71JH7TU88j0sVhVFMy/TUY+zSrU2GJ/Y1ESK2w8MxYH2VyDvNnXd5tlqV # RcBCY86cZfeDdxf1xu/WOGAhDbi++tlQtu+bSYZiMdlYDB7C4yZgtdMTVhSPstlK # 1jndtbh4zUNeWpMA5LIwQ14JmjSUG/ea6EXN1i6xy6rCsFrhhEmG+MOxPm+SsnSv # OtL9RwKfx3nuCuVhurjc/1JNxCSthYJPivzBN52B3Gh2zBvUCmHz5DL2YLI1fYYd # YTxbSkMOBTxIL5tf7e2Zyfu1HezSNEMjJAX9wxu/GY7T+bWJBjIinMVBHEzBiAdB # aHuScq37uxZH1B8NmddZvgitCP7m18K2jVutNE0GFy4VQkogKIUEh+2b5N2y0nUi # eKS7iue/6CJyfQCrucN1hR60xPJXMtApi/7sNW9+b5H7fbIcdPzL93Xo58CfYZPt # kdlqod3W+ivvKqjeGvY= # =7A03 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 10 Dec 2024 10:06:41 GMT # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck <qemu_oss@crudebyte.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * tag 'pull-9p-20241210' of https://github.com/cschoenebeck/qemu: 9pfs: fix regression regarding CVE-2023-2861 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Jamin Lin	124f4dc0d8	test/qtest/ast2700-smc-test: Support to test AST2700 Add test_ast2700_evb function and reused testcases which are from aspeed_smc-test.c for AST2700 testing. The base address, flash base address and ce index of fmc_cs0 are 0x14000000, 0x100000000 and 0, respectively. The default flash model of fmc_cs0 is "w25q01jvq" whose size is 128MB, so set jedec_id 0xef4021. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-11-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	3e62a32ddb	test/qtest: Introduce a new aspeed-smc-utils.c to place common testcases The testcases for ASPEED SMC model were placed in aspeed_smc-test.c. However, this test file only supports for ARM32. To support all ASPEED SOCs such as AST2700 whose CPU architecture is aarch64, introduces a new aspeed-smc-utils source file and move all common APIs and testcases from aspeed_smc-test.c to aspeed-smc-utils.c. Finally, users are able to re-used these testcase for AST2700 and future ASPEED SOCs testing. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-10-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	08479f0ca0	test/qtest/aspeed_smc-test: Support write page command with QPI mode Add a new testcase for write page command with QPI mode testing. Currently, only run this testcase for AST2500, AST2600 and AST1030. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-9-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	0f6e8aa4fc	test/qtest/aspeed_smc-test: Support to test AST1030 Add test_ast1030_evb function and reused testcases for AST1030 testing. The base address, flash base address and ce index of fmc_cs0 are 0x7E620000, 0x80000000 and 0, respectively. The default flash model of fmc_cs0 is "w25q80bl" whose size is 1MB, so set jedec_id 0xef4014. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-8-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	84f7ea6db7	test/qtest/aspeed_smc-test: Support to test AST2600 Add test_ast2600_evb function and reused testcases for AST2600 testing. The spi base address, flash base address and ce index of fmc_cs0 are 0x1E620000, 0x20000000 and 0, respectively. The default flash model of fmc_cs0 is "mx66u51235f" whose size is 64MB, so set jedec_id 0xc2253a. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-7-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	658ebe1368	test/qtest/aspeed_smc-test: Support to test AST2500 Add test_ast2500_evb function and reused testcases for AST2500 testing. The spi base address, flash base address and ce index of fmc_cs0 are 0x1E620000, 0x20000000 and 0, respectively. The default flash model of fmc_cs0 is "mx25l25635e" whose size is 32MB, so set jedec_id 0xc22019. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-6-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	369a47ae4b	test/qtest/aspeed_smc-test: Introducing a "page_addr" data field Currently, these test cases used the hardcode offset 0x1400000 (0x14000 * 256) which was beyond the 16MB flash size for flash page read/write command testing. However, the default fmc flash model of ast1030-a1 EVB is "w25q80bl" whose size is 1MB. To test SoC flash models, introduces a new page_addr member in TestData structure, so users can set the offset for flash page read/write command testing. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-5-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	dc32f5baf9	test/qtest/aspeed_smc-test: Support to test all CE pins Currently, these test cases only support to test CE0. To test all CE pins, introduces new ce and node members in TestData structure. The ce member is used for saving the ce index and node member is used for saving the node path, respectively. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-4-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	975d4baf68	test/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs Currently, these test cases are only used for testing fmc_cs0 for AST2400. To test others BMC SOCs, introduces a new TestData structure. Users can set the spi base address, flash base address, jedesc id and so on for different BMC SOCs and flash model testing. Introduce new helper functions to make the test case more readable. Set spi base address 0x1E620000, flash_base address 0x20000000 and jedec id 0x20ba19 for fmc_cs0 with n25q256a flash for AST2400 SMC model testing. To pass the TestData into the test case, replace qtest_add_func with qtest_add_data_func. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	755e984aa4	test/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function So far, the test cases are used for testing SMC model with AST2400 BMC. However, AST2400 is end off live and ASPEED is no longer support this SOC. To test SMC model for AST2500, AST2600 and AST1030, move the test cases from main to test_palmetto_bmc function. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241127091543.1243114-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Cédric Le Goater	3cbbd9cb93	tests/functional: Move debian boot test from avocado This simply moves the debian boot test from the avocado testsuite to the new functional testsuite. No changes in the test. Reviewed-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/r/20241206131132.520911-8-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Cédric Le Goater	38cd5c5235	tests/functional: Introduce a specific test for rainier-bmc machine This simply moves the rainier-bmc test to a new test file. No changes in the test. The test_arm_aspeed.py is deleted. Reviewed-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/r/20241206131132.520911-7-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Cédric Le Goater	c7bc9cab3f	tests/functional: Introduce a specific test for ast2600 SoC This moves the ast2600-evb tests to a new test file. No changes in the test. The routines used to run the buildroot and sdk tests are removed from the test_arm_aspeed.py file because now unused. Reviewed-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/r/20241206131132.520911-6-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Cédric Le Goater	08743dbaa1	tests/functional: Introduce a specific test for ast2500 SoC This moves the ast2500-evb tests to a new test file and extends the aspeed module with routines used to run the buildroot and sdk tests. No changes in the test. Reviewed-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/r/20241206131132.520911-5-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Cédric Le Goater	5f2b9738b2	tests/functional: Introduce a specific test for romulus-bmc machine This simply moves the romulus-bmc test to a new test file. No changes in the test. The do_test_arm_aspeed routine is removed from the test_arm_aspeed.py file because it is now unused. Reviewed-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/r/20241206131132.520911-4-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Cédric Le Goater	e517cff706	tests/functional: Introduce a specific test for palmetto-bmc machine This introduces a new aspeed module for sharing code between tests and moves the palmetto test to a new test file. No changes in the test. Reviewed-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/r/20241206131132.520911-3-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Cédric Le Goater	e50c72858d	tests/functional: Introduce a specific test for ast1030 SoC This simply moves the ast1030 tests to a new test file. No changes. Reviewed-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/r/20241206131132.520911-2-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	c38c53f22c	aspeed/soc: Support eMMC for AST2700 Add SDHCI model for AST2700 eMMC support. The eMMC controller only support 1 slot and registers base address is start at 0x1209_0000 and its interrupt is connected to GICINT 15. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241204084453.610660-7-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	0696e9b00e	aspeed/soc: Support SDHCI for AST2700 Add SDHCI model for AST2700 SDHCI support. The SDHCI controller only support 1 slot and registers base address is start at 0x1408_0000 and its interrupt is connected to GICINT133_INTC at bit 1. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241204084453.610660-6-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	83991b9104	hw/sd/aspeed_sdhci: Add AST2700 Support Introduce a new ast2700 class to support AST2700. Add a new ast2700 SDHCI class init function and set the value of capability register to "0x0000000719f80080". Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241204084453.610660-5-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	6a0238a473	hw:sdhci: Introduce a new "capareg" class member to set the different Capability Registers Currently, it set the hardcode value of capability registers to all ASPEED SOCs However, the value of capability registers should be different for all ASPEED SOCs. For example: the bit 28 of the Capability Register 1 should be 1 for 64-bits System Bus support for AST2700. Introduce a new "capareg" class member whose data type is uint_64 to set the different Capability Registers to all ASPEED SOCs. The value of Capability Register is "0x0000000001e80080" for AST2400 and AST2500. The value of Capability Register is "0x0000000701f80080" for AST2600. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241204084453.610660-4-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	0178d1198f	hw/arm/aspeed: Fix coding style Fix coding style issues from checkpatch.pl. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241204084453.610660-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Jamin Lin	b00ca20440	hw/sd/aspeed_sdhci: Fix coding style Fix coding style issues from checkpatch.pl. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20241204084453.610660-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Cédric Le Goater	2b1b66e01f	arm: Remove tacoma-bmc machine Removal was scheduled for 10.0. Use the rainier-bmc machine or the ast2600-evb as a replacement. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/r/20241119071352.515790-1-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	1 year ago
Peter Maydell	97f2796a37	Open 10.0 development tree Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Peter Maydell	ae35f033b8	Update version for v9.2.0 release Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Christian Schoenebeck	d06a9d843f	9pfs: fix regression regarding CVE-2023-2861 The released fix for this CVE: `f6b0de53fb` ("9pfs: prevent opening special files (CVE-2023-2861)") caused a regression with security_model=passthrough. When handling a 'Tmknod' request there was a side effect that 'Tmknod' request could fail as 9p server was trying to adjust permissions: #6 close_if_special_file (fd=30) at ../hw/9pfs/9p-util.h:140 #7 openat_file (mode=<optimized out>, flags=2228224, name=<optimized out>, dirfd=<optimized out>) at ../hw/9pfs/9p-util.h:181 #8 fchmodat_nofollow (dirfd=dirfd@entry=31, name=name@entry=0x5555577ea6e0 "mysocket", mode=493) at ../hw/9pfs/9p-local.c:360 #9 local_set_cred_passthrough (credp=0x7ffbbc4ace10, name=0x5555577ea6e0 "mysocket", dirfd=31, fs_ctx=0x55555811f528) at ../hw/9pfs/9p-local.c:457 #10 local_mknod (fs_ctx=0x55555811f528, dir_path=<optimized out>, name=0x5555577ea6e0 "mysocket", credp=0x7ffbbc4ace10) at ../hw/9pfs/9p-local.c:702 #11 v9fs_co_mknod (pdu=pdu@entry=0x555558121140, fidp=fidp@entry=0x5555574c46c0, name=name@entry=0x7ffbbc4aced0, uid=1000, gid=1000, dev=<optimized out>, mode=49645, stbuf=0x7ffbbc4acef0) at ../hw/9pfs/cofs.c:205 #12 v9fs_mknod (opaque=0x555558121140) at ../hw/9pfs/9p.c:3711 That's because server was opening the special file to adjust permissions, however it was using O_PATH and it would have not returned the file descriptor to guest. So the call to close_if_special_file() on that branch was incorrect. Let's lift the restriction introduced by `f6b0de53fb` such that it would allow to open special files on host if O_PATH flag is supplied, not only for 9p server's own operations as described above, but also for any client 'Topen' request. It is safe to allow opening special files with O_PATH on host, because O_PATH only allows path based operations on the resulting file descriptor and prevents I/O such as read() and write() on that file descriptor. Fixes: `f6b0de53fb` ("9pfs: prevent opening special files (CVE-2023-2861)") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2337 Reported-by: Dirk Herrendorfer <d.herrendoerfer@de.ibm.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Tested-by: Dirk Herrendorfer <d.herrendoerfer@de.ibm.com> Message-Id: <E1tJWbk-007BH4-OB@kylie.crudebyte.com>	1 year ago
Peter Maydell	1cf9bc6eba	Update version for v9.2.0-rc3 release Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Peter Maydell	f07e0ad599	chardev patch queue -----BEGIN PGP SIGNATURE----- iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmdPCg4cHG1hcmNhbmRy ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5dmTD/4pNcJ7fJzzxtfBDBvy +NWlq7nFDOX471g1B+4V91dOT0TbQLRK0hTmPUGc7FF8sCCDgfZOyHN6GA7TdwXG 8+oHqFjxaZcrtrSN67wv8n5tyFNm/1hr1IgqhieKjeVt6eT8PJ8rgFESm4zvDOej i2jjhDNN2piu9Lr9smhX3I/kJX70cPXRRX2qBlLEPcMKW280RoTRSEIL1jFdilan QyPugQm9R0cSayNg27At2HakFZ5HKgu8EyAvvMFvv1gdoGVdq9D+Gk5xruvBnF/P 4g7EnCe/YKWfg887LSjIA2Qcp1xEpUPeumUbCm152ikZ7KnwE9Tn/hPt693GjvMn WhyOOuxZmvL4AtJbYheskH7N0b/NB2vUT4N4ONkMeubjzfDu8UHw/rL+WpjAZfXW YwzcpVHKXXKazTzzKRLUgsoqfllWLTAQDwU5s46UyVmaBBf5qUSbSnr4ZX2nP0X6 dP1jM2KcDyaKKowmpYGyQzTVqPwTXfyEdmSNnjirbS2Qyh77snd7rqrxXPz2jKm9 jfb0yN7BWSEuFguyXL0izeCQsBb/rsrZB/tOYWkUeOzAgpm4GlAQuJ+3uAssgmnu aq/bYxGEjC1a+fzg8KUj6S+X+Jfp6+4/Y60M4HAMtMGuy6X1UaCBtH+cntS3JjUj 7ZBpTXirstW7KxKZ2mJMa2lkHQ== =34fm -----END PGP SIGNATURE----- Merge tag 'chr-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging chardev patch queue # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmdPCg4cHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5dmTD/4pNcJ7fJzzxtfBDBvy # +NWlq7nFDOX471g1B+4V91dOT0TbQLRK0hTmPUGc7FF8sCCDgfZOyHN6GA7TdwXG # 8+oHqFjxaZcrtrSN67wv8n5tyFNm/1hr1IgqhieKjeVt6eT8PJ8rgFESm4zvDOej # i2jjhDNN2piu9Lr9smhX3I/kJX70cPXRRX2qBlLEPcMKW280RoTRSEIL1jFdilan # QyPugQm9R0cSayNg27At2HakFZ5HKgu8EyAvvMFvv1gdoGVdq9D+Gk5xruvBnF/P # 4g7EnCe/YKWfg887LSjIA2Qcp1xEpUPeumUbCm152ikZ7KnwE9Tn/hPt693GjvMn # WhyOOuxZmvL4AtJbYheskH7N0b/NB2vUT4N4ONkMeubjzfDu8UHw/rL+WpjAZfXW # YwzcpVHKXXKazTzzKRLUgsoqfllWLTAQDwU5s46UyVmaBBf5qUSbSnr4ZX2nP0X6 # dP1jM2KcDyaKKowmpYGyQzTVqPwTXfyEdmSNnjirbS2Qyh77snd7rqrxXPz2jKm9 # jfb0yN7BWSEuFguyXL0izeCQsBb/rsrZB/tOYWkUeOzAgpm4GlAQuJ+3uAssgmnu # aq/bYxGEjC1a+fzg8KUj6S+X+Jfp6+4/Y60M4HAMtMGuy6X1UaCBtH+cntS3JjUj # 7ZBpTXirstW7KxKZ2mJMa2lkHQ== # =34fm # -----END PGP SIGNATURE----- # gpg: Signature made Tue 03 Dec 2024 13:39:26 GMT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'chr-pull-request' of https://gitlab.com/marcandre.lureau/qemu: chardev: Remove __-prefixed names chardev: Fix record/replay error path NULL deref in device creation Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Peter Maydell	712f7150a8	Misc fixes for QEMU v9.2.0 -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdO66kACgkQ4+MsLN6t wN4dGw//ZSVZO/cdOc1izC44mCPjnHkhSjX5i12E09QnDfNQ9cef2pG50lsndm3N xJwunST+Hqfoh07YT4zuGSO+60BiiPsPse+ytnuHK0E4wLbIfrWzPcf1CMRDk3wf O4IniCv8O7BRYccK1iPkFI8ZVqK84m3Bn1tQ51LOy09b6om7jIqNwlxWxGYqkWCR l+9RxW/IKWD3OrveBATEhD1lwoUBIYPPzdm6NayEdOJXGOgnvbNbtmuRCR8dCxCS RUH3GZu0vvRTpOYjFzeR9Xy+CE1vcOeKsZf35QwV4eX8+UKv30HgF6J8fInkS60m EqPA+AU7fi+DN3Ua1Jx38wXHPr8mPTQoVGV6q0UB8b3B22kPQn+Mu8jHLyMOp4rK 6JEX5cAOZuwBEk0I8VjwqeDGVYgFwnMHhVuss0N4kCvP0qQcC2JMGMW0Rk4Lxw16 q0kwbQ0c56+qET57EOf9VW40Yb1q3Zu9t39XfNO/m3KGLkVSPfFZEu5voWD14mZW RutPlG/ww3n878Xz06YsqYF0ED/0SiW8U1tmEzg+X9vA/7Z7/0MH0rleNb36a0Fs 0aDq/mZBcnFLKy+9rlpy18OolY/N6LZnebCpdQe5wSRn/ioWDc4/GyIaLO9lSE5o TFHmGtIIQ2FoeRgtwCSfVNwaA6ILgPRsgXFDOqxCUplgKv6GX2Q= =GZ/H -----END PGP SIGNATURE----- Merge tag 'hw-misc-20241203' of https://github.com/philmd/qemu into staging Misc fixes for QEMU v9.2.0 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdO66kACgkQ4+MsLN6t # wN4dGw//ZSVZO/cdOc1izC44mCPjnHkhSjX5i12E09QnDfNQ9cef2pG50lsndm3N # xJwunST+Hqfoh07YT4zuGSO+60BiiPsPse+ytnuHK0E4wLbIfrWzPcf1CMRDk3wf # O4IniCv8O7BRYccK1iPkFI8ZVqK84m3Bn1tQ51LOy09b6om7jIqNwlxWxGYqkWCR # l+9RxW/IKWD3OrveBATEhD1lwoUBIYPPzdm6NayEdOJXGOgnvbNbtmuRCR8dCxCS # RUH3GZu0vvRTpOYjFzeR9Xy+CE1vcOeKsZf35QwV4eX8+UKv30HgF6J8fInkS60m # EqPA+AU7fi+DN3Ua1Jx38wXHPr8mPTQoVGV6q0UB8b3B22kPQn+Mu8jHLyMOp4rK # 6JEX5cAOZuwBEk0I8VjwqeDGVYgFwnMHhVuss0N4kCvP0qQcC2JMGMW0Rk4Lxw16 # q0kwbQ0c56+qET57EOf9VW40Yb1q3Zu9t39XfNO/m3KGLkVSPfFZEu5voWD14mZW # RutPlG/ww3n878Xz06YsqYF0ED/0SiW8U1tmEzg+X9vA/7Z7/0MH0rleNb36a0Fs # 0aDq/mZBcnFLKy+9rlpy18OolY/N6LZnebCpdQe5wSRn/ioWDc4/GyIaLO9lSE5o # TFHmGtIIQ2FoeRgtwCSfVNwaA6ILgPRsgXFDOqxCUplgKv6GX2Q= # =GZ/H # -----END PGP SIGNATURE----- # gpg: Signature made Tue 03 Dec 2024 11:29:45 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20241203' of https://github.com/philmd/qemu: system: Select HVF by default when no other accelerator is available tests/qtest: add test for querying balloon guest stats tests/qtest: drop 'fuzz-' prefix from virtio-balloon test hw/virtio: fix crash in processing balloon stats hw/display/vga: Do not reset 'big_endian_fb' in vga_common_reset() target/riscv: Avoid bad shift in riscv_cpu_do_interrupt() hw/core/machine: diagnose wrapping of maxmem MAINTAINERS: update email addr for Brian Cain meson: Add missing SDL dependency to system/main.c MAINTAINERS: add myself as the maintainer for LoongArch VirtMachine ui/cocoa: Temporarily ignore annoying deprecated declaration warnings hw/openrisc/openrisc_sim: keep serial@90000000 as default hw/openrisc: Fixed undercounting of TTCR in continuous mode Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Peter Maydell	b733701533	OpenRISC updates for 9.2.0 This series has 2 fixes: - Fix to keep serial@90000000 as default - Fixed undercounting of TTCR in continuous mode -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmdO56EACgkQw7McLV5m J+T8BRAAxZMH4ykdRJBmYiFVOsYKagcdT6GGBHL44FGeQSr1lNyoU0Rn5r6v5GHe Nwq7DTeZlKoVji5GXki53mGrwENXr00m+xfc9ACMoWr5IM6McQUPXlQAQ/50fIGs lzXMZH/4EdPIVkkpCi+y8FLYw02oQg61U9G0HW02lQJy4Y4mudtvQFGzJ7f3SIZ3 EkKn5YLG0bqszq/amFNLQXlbnq3yI5zfcMHhHx0KuDsm2yNhrNA+AJP8tLI3JlxL +0YIA+fWuxQzz8Zu9+ckc8VAV83HIgQpXVzI6rQxdSwbmRgUu9ITO09ZmxaDHZF6 sDI6K3VouyaHJVkvu4coDajpYTjHLE26c9LAlaVBpgdnmnYy4vlndEqbfaBqOouX n0N2wJ3IGouIw7AnB9dTaZhM/Uo09hZKDr6kCm3hLfPn2+vi3yxsbwVwLaOpH3G3 kQ5ZFKjoA7XWOaXGOUMcmhByXkSxja+pSBppB58vJAFyVp73HYIpea3/q1Zd8S4S noJoqxDtD2zf26bDBIe83pUEnSnL8fAcsh3rlQP8HrWYhU7ZulVSE1ZvPkPgDpkY LVCPautTElsMp2Mg4a2oODGvSDN4/5h2dp6TaK4Qep92HHFOwPZQBQW607VwWR5N II8dB/l8PluKkgZ3ymhP1p9JAAZFe9a2cMmegRIiM74PkPty0kk= =guIi -----END PGP SIGNATURE----- Merge tag 'pull-or1k-20241203' of https://github.com/stffrdhrn/qemu into staging OpenRISC updates for 9.2.0 This series has 2 fixes: - Fix to keep serial@90000000 as default - Fixed undercounting of TTCR in continuous mode # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmdO56EACgkQw7McLV5m # J+T8BRAAxZMH4ykdRJBmYiFVOsYKagcdT6GGBHL44FGeQSr1lNyoU0Rn5r6v5GHe # Nwq7DTeZlKoVji5GXki53mGrwENXr00m+xfc9ACMoWr5IM6McQUPXlQAQ/50fIGs # lzXMZH/4EdPIVkkpCi+y8FLYw02oQg61U9G0HW02lQJy4Y4mudtvQFGzJ7f3SIZ3 # EkKn5YLG0bqszq/amFNLQXlbnq3yI5zfcMHhHx0KuDsm2yNhrNA+AJP8tLI3JlxL # +0YIA+fWuxQzz8Zu9+ckc8VAV83HIgQpXVzI6rQxdSwbmRgUu9ITO09ZmxaDHZF6 # sDI6K3VouyaHJVkvu4coDajpYTjHLE26c9LAlaVBpgdnmnYy4vlndEqbfaBqOouX # n0N2wJ3IGouIw7AnB9dTaZhM/Uo09hZKDr6kCm3hLfPn2+vi3yxsbwVwLaOpH3G3 # kQ5ZFKjoA7XWOaXGOUMcmhByXkSxja+pSBppB58vJAFyVp73HYIpea3/q1Zd8S4S # noJoqxDtD2zf26bDBIe83pUEnSnL8fAcsh3rlQP8HrWYhU7ZulVSE1ZvPkPgDpkY # LVCPautTElsMp2Mg4a2oODGvSDN4/5h2dp6TaK4Qep92HHFOwPZQBQW607VwWR5N # II8dB/l8PluKkgZ3ymhP1p9JAAZFe9a2cMmegRIiM74PkPty0kk= # =guIi # -----END PGP SIGNATURE----- # gpg: Signature made Tue 03 Dec 2024 11:12:33 GMT # gpg: using RSA key D9C47354AEF86C103A25EFF1C3B31C2D5E6627E4 # gpg: Good signature from "Stafford Horne <shorne@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: D9C4 7354 AEF8 6C10 3A25 EFF1 C3B3 1C2D 5E66 27E4 * tag 'pull-or1k-20241203' of https://github.com/stffrdhrn/qemu: hw/openrisc: Fixed undercounting of TTCR in continuous mode hw/openrisc/openrisc_sim: keep serial@90000000 as default Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Nicholas Piggin	3c8ab23fb3	chardev: Remove __-prefixed names Peter points out double underscore prefix names tend to be reserved for the system. Clean these up. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20240828043337.14587-3-npiggin@gmail.com>	2 years ago
Nicholas Piggin	651b386205	chardev: Fix record/replay error path NULL deref in device creation qemu_chardev_set_replay() was being called in chardev creation to set up replay parameters even if the chardev is NULL. A segfault can be reproduced by specifying '-serial chardev:bad' with an rr=record mode. Fix this with a NULL pointer check. Reported-by: Peter Maydell <peter.maydell@linaro.org> Resolves: Coverity CID 1559470 Fixes: `4c193bb129` ("chardev: set record/replay on the base device of a muxed device") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20240828043337.14587-2-npiggin@gmail.com>	2 years ago
Philippe Mathieu-Daudé	964d2a0cf8	system: Select HVF by default when no other accelerator is available When testing with a HVF-only binary, we get: 3/12 qemu:func-quick+func-aarch64 / func-aarch64-version ERROR 0.29s exit status 1 stderr: Traceback (most recent call last): File "tests/functional/test_version.py", line 22, in test_qmp_human_info_version self.vm.launch() File "machine/machine.py", line 461, in launch raise VMLaunchFailure( qemu.machine.machine.VMLaunchFailure: ConnectError: Failed to establish session: EOFError Exit code: 1 Command: build/qemu-system-aarch64 -display none -vga none -chardev socket,id=mon,fd=5 -mon chardev=mon,mode=control -machine none -nodefaults Output: qemu-system-aarch64: No accelerator selected and no default accelerator available Fix by checking for HVF in configure_accelerators() and using it by default when no other accelerator is available. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20241203094232.62232-1-philmd@linaro.org>	1 year ago
Daniel P. Berrangé	d65c890a58	tests/qtest: add test for querying balloon guest stats This test would have identified the crash caused by the addition of new balloon stats fields. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20241129135507.699030-4-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	1 year ago
Daniel P. Berrangé	8460459529	tests/qtest: drop 'fuzz-' prefix from virtio-balloon test This test file is expected to be extended for arbitrary virtio-balloon related tests, not merely those discovered by fuzzing. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20241129135507.699030-3-berrange@redhat.com> [PMD: Update MAINTAINERS] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com>	1 year ago
Daniel P. Berrangé	bff1050a56	hw/virtio: fix crash in processing balloon stats balloon_stats_get_all will iterate over guest stats upto the max VIRTIO_BALLOON_S_NR value, calling visit_type_uint64 to populate the QObject dict. The dict keys are obtained from the static array balloon_stat_names which is VIRTIO_BALLOON_S_NR in size. Unfortunately the way that array is declared results in any unassigned stats getting a NULL name, which will then cause visit_type_uint64 to trigger an assert in qobject_output_add_obj. The balloon_stat_names array was fortunately fully populated with names until recently: commit `0d2eeef77a` Author: Bibo Mao <maobibo@loongson.cn> Date: Mon Oct 28 10:38:09 2024 +0800 linux-headers: Update to Linux v6.12-rc5 pulled a change to include/standard-headers/linux/virtio_balloon.h which increased VIRTIO_BALLOON_S_NR by 6, and failed to add the new names to balloon_stat_names. This commit fills in the missing names, and uses a static assert to guarantee that any future changes to VIRTIO_BALLOON_S_NR will cause a build failure until balloon_stat_names is updated. This problem was detected by the Cockpit Project's automated integration tests on QEMU 9.2.0-rc1. Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2329448 Fixes: `0d2eeef77a` ("linux-headers: Update to Linux v6.12-rc5") Reported-by: Martin Pitt <mpitt@redhat.com> Reviewed-by: Richard W.M. Jones <rjones@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20241129135507.699030-2-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	1 year ago
Philippe Mathieu-Daudé	302075f85e	hw/display/vga: Do not reset 'big_endian_fb' in vga_common_reset() The 'pci-vga' device allow setting a 'big-endian-framebuffer' property since commit `3c2784fc86` ("vga: Expose framebuffer byteorder as a QOM property"). Similarly, the 'virtio-vga' device since commit `8be61ce2ce` ("virtio-vga: implement big-endian-framebuffer property"). Both call vga_common_reset() in their reset handler, respectively pci_secondary_vga_reset() and virtio_vga_base_reset_hold(), which reset 'big_endian_fb', overwritting the property. This is not correct: the hardware is expected to keep its configured endianness during resets. Move 'big_endian_fb' assignment from vga_common_reset() to vga_common_init() which is called once when the common VGA state is initialized. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Message-Id: <20241129101721.17836-2-philmd@linaro.org>	1 year ago
Peter Maydell	5311599cdc	target/riscv: Avoid bad shift in riscv_cpu_do_interrupt() In riscv_cpu_do_interrupt() we use the 'cause' value we got out of cs->exception as a shift value. However this value can be larger than 31, which means that "1 << cause" is undefined behaviour, because we do the shift on an 'int' type. This causes the undefined behaviour sanitizer to complain on one of the check-tcg tests: $ UBSAN_OPTIONS=print_stacktrace=1:abort_on_error=1:halt_on_error=1 ./build/clang/qemu-system-riscv64 -M virt -semihosting -display none -device loader,file=build/clang/tests/tcg/riscv64-softmmu/issue1060 ../../target/riscv/cpu_helper.c:1805:38: runtime error: shift exponent 63 is too large for 32-bit type 'int' #0 0x55f2dc026703 in riscv_cpu_do_interrupt /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/clang/../../target/riscv/cpu_helper.c:1805:38 #1 0x55f2dc3d170e in cpu_handle_exception /mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/clang/../../accel/tcg/cpu-exec.c:752:9 In this case cause is RISCV_EXCP_SEMIHOST, which is 0x3f. Use 1ULL instead to ensure that the shift is in range. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Fixes: `1697837ed9` ("target/riscv: Add M-mode virtual interrupt and IRQ filtering support.") Fixes: `40336d5b1d` ("target/riscv: Add HS-mode virtual interrupt and IRQ filtering support.") Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241128103831.3452572-1-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	1 year ago
Daniel P. Berrangé	235560b3a7	hw/core/machine: diagnose wrapping of maxmem The 'maxmem' parameter parsed on the command line is held in uint64_t and then assigned to the MachineState field that is 'ram_addr_t'. This assignment will wrap on 32-bit hosts, silently changing the user's config request if it were over-sized. Improve the existing diagnositics for validating 'size', and add the same diagnostics for 'maxmem' Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Tested-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Ani Sinha <anisinha@redhat.com> Message-ID: <20241127114057.255995-1-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	1 year ago
Brian Cain	2dfe93699c	MAINTAINERS: update email addr for Brian Cain Also: add mapping for "quic_bcain@quicinc.com" which was ~briefly used for some replies to mailing list traffic. Signed-off-by: Brian Cain <bcain@quicinc.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20241123164641.364748-2-bcain@quicinc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	1 year ago
Philippe Mathieu-Daudé	5162557574	meson: Add missing SDL dependency to system/main.c When building QEMU configure with --disable-gtk --disable-cocoa on macOS we get: User interface Cocoa support : NO SDL support : YES 2.30.5 SDL image support : NO GTK support : NO pixman : YES 0.42.2 VTE support : NO PNG support : YES 1.6.43 VNC support : YES VNC SASL support : YES VNC JPEG support : YES 3.0.3 spice protocol support : YES 0.14.4 spice server support : NO curses support : YES brlapi support : NO User defined options cocoa : disabled docs : disabled gtk : disabled ../system/main.c:30:10: fatal error: 'SDL.h' file not found 30 \| #include <SDL.h> \| ^~~~~~~ 1 error generated. Fix by adding the SDL dependency to main.c it's CFLAGS contains the SDL include directory. Fixes: `64ed6f92ff` ("meson: link emulators without Makefile.target") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20241120114943.85080-1-philmd@linaro.org>	1 year ago
Bibo Mao	9c3934b33c	MAINTAINERS: add myself as the maintainer for LoongArch VirtMachine Song Gao is will be sick leave for a long time, I apply for maintainer for LoongArch Virt Machine during this period, LoongArch TCG keeps unchanged since I am not familiar with it. The maintainer duty will transfer to him after he comes back to work. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20241112073714.1953481-1-maobibo@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	1 year ago
Philippe Mathieu-Daudé	9cf6e41fe2	ui/cocoa: Temporarily ignore annoying deprecated declaration warnings These warnings are breaking some build configurations since 2 months now (https://gitlab.com/qemu-project/qemu/-/issues/2575): ui/cocoa.m:662:14: error: 'CVDisplayLinkCreateWithCGDisplay' is deprecated: first deprecated in macOS 15.0 - use NSView.displayLink(target:selector:), NSWindow.displayLink(target:selector:), or NSScreen.displayLink(target:selector:) [-Werror,-Wdeprecated-declarations] 662 \| if (!CVDisplayLinkCreateWithCGDisplay(display, &displayLink)) { \| ^ /Library/Developer/CommandLineTools/SDKs/MacOSX.sdk/System/Library/Frameworks/CoreVideo.framework/Headers/CVDisplayLink.h:89:20: note: 'CVDisplayLinkCreateWithCGDisplay' has been explicitly marked deprecated here 89 \| CV_EXPORT CVReturn CVDisplayLinkCreateWithCGDisplay( \| ^ ui/cocoa.m:663:29: error: 'CVDisplayLinkGetNominalOutputVideoRefreshPeriod' is deprecated: first deprecated in macOS 15.0 - use NSView.displayLink(target:selector:), NSWindow.displayLink(target:selector:), or NSScreen.displayLink(target:selector:) [-Werror,-Wdeprecated-declarations] 663 \| CVTime period = CVDisplayLinkGetNominalOutputVideoRefreshPeriod(displayLink); \| ^ /Library/Developer/CommandLineTools/SDKs/MacOSX.sdk/System/Library/Frameworks/CoreVideo.framework/Headers/CVDisplayLink.h:182:18: note: 'CVDisplayLinkGetNominalOutputVideoRefreshPeriod' has been explicitly marked deprecated here 182 \| CV_EXPORT CVTime CVDisplayLinkGetNominalOutputVideoRefreshPeriod( CVDisplayLinkRef CV_NONNULL displayLink ); \| ^ ui/cocoa.m:664:13: error: 'CVDisplayLinkRelease' is deprecated: first deprecated in macOS 15.0 - use NSView.displayLink(target:selector:), NSWindow.displayLink(target:selector:), or NSScreen.displayLink(target:selector:) [-Werror,-Wdeprecated-declarations] 664 \| CVDisplayLinkRelease(displayLink); \| ^ /Library/Developer/CommandLineTools/SDKs/MacOSX.sdk/System/Library/Frameworks/CoreVideo.framework/Headers/CVDisplayLink.h:249:16: note: 'CVDisplayLinkRelease' has been explicitly marked deprecated here 249 \| CV_EXPORT void CVDisplayLinkRelease( CV_RELEASES_ARGUMENT CVDisplayLinkRef CV_NULLABLE displayLink ); \| ^ 3 errors generated. For the next release, ignore the warnings using #pragma directives. At least until we figure the correct new API usage. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Phil Dennis-Jordan <phil@philjordan.eu> Tested-by: Phil Dennis-Jordan <phil@philjordan.eu> Message-Id: <20241121131954.98949-1-philmd@linaro.org>	2 years ago
Ahmad Fatoum	5d8a250f90	hw/openrisc/openrisc_sim: keep serial@90000000 as default We used to only have a single UART on the platform and it was located at address 0x90000000. When the number of UARTs was increased to 4, the first UART remained at it's location, but instead of being the first one to be registered, it became the last. This caused QEMU to pick 0x90000300 as the default UART, which broke software that hardcoded the address of 0x90000000 and expected it's output to be visible when the user configured only a single console. This caused regressions[1] in the barebox test suite when updating to a newer QEMU. As there seems to be no good reason to register the UARTs in inverse order, let's register them by ascending address, so existing software can remain oblivious to the additional UART ports. Changing the order of uart registration alone breaks Linux which was choosing the UART at 0x90000300 as the default for ttyS0. To fix Linux we fix three things in the device tree: 1. Define stdout-path only one time for the first registered UART instead of incorrectly defining for each UART. 2. Change the UART alias name from 'uart0' to 'serial0' as almost all Linux tty drivers look for an alias starting with "serial". 3. Add the UART nodes so they appear in the final DTB in the order starting with the lowest address and working upwards. In summary these changes mean that the QEMU default UART (serial_hd(0)) is now setup where: * serial_hd(0) is the lowest-address UART * serial_hd(0) is listed first in the DTB * serial_hd(0) is the /chosen/stdout-path one * the /aliases/serial0 alias points at serial_hd(0) [1]: https://lore.barebox.org/barebox/707e7c50-aad1-4459-8796-0cc54bab32e2@pengutronix.de/T/#m5da26e8a799033301489a938b5d5667b81cef6ad [stafford: Change to serial0 alias and update change message, reverse uart registration order] Fixes: `777784bda4` ("hw/openrisc: support 4 serial ports in or1ksim") Cc: qemu-stable@nongnu.org Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Stafford Horne <shorne@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20241203110536.402131-2-shorne@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	2 years ago

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