riscv/qemu - qemu - Gitea: Git with a cup of tea

126195 Commits

68 Branches

448 Tags

581 MiB

Tree: 9535803a9e

Commit Graph

Author	SHA1	Message	Date
Richard Henderson	c3bef3b4de	target/microblaze: Add gdbstub xml Mirroring the upstream gdb xml files, the two stack boundary registers are separated out. Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>	4 years ago
Jonathan Behrens	ab9056ff9b	target/riscv: Expose "priv" register for GDB for reads This patch enables a debugger to read the current privilege level via a virtual "priv" register. When compiled with CONFIG_USER_ONLY the register is still visible but always reports the value zero. Signed-off-by: Jonathan Behrens <jonathan@fintelia.io> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	7 years ago

Author

SHA1

Message

Date

Richard Henderson

c3bef3b4de

target/microblaze: Add gdbstub xml

Mirroring the upstream gdb xml files, the two stack boundary
registers are separated out.

Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

4 years ago

Jonathan Behrens

ab9056ff9b

target/riscv: Expose "priv" register for GDB for reads

This patch enables a debugger to read the current privilege level via a virtual
"priv" register. When compiled with CONFIG_USER_ONLY the register is still
visible but always reports the value zero.

Signed-off-by: Jonathan Behrens <jonathan@fintelia.io>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

7 years ago

1 Commits (9535803a9eaed26f58c9327e46fc58c54edc80f2)