Tree:
896a9ee967
10.1-testing
99888-virtio-zero-init-c9s
block
coverity
master
stable-0.10
stable-0.11
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stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
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stable-1.6
stable-1.7
stable-10.0
stable-10.1
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stable-2.7
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stable-3.0
stable-3.1
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stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.0-staging
stable-6.1
stable-7.2
stable-7.2-staging
stable-8.0
stable-8.0-staging
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-0.0
staging-10.0
staging-10.1
staging-10.2
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
staging-mjt-test
stsquad-hotfix
tracing
initial
release_0_10_0
release_0_10_1
release_0_10_2
release_0_5_1
release_0_6_0
release_0_6_1
release_0_7_0
release_0_7_1
release_0_8_1
release_0_8_2
release_0_9_0
release_0_9_1
staging-mjt-test
trivial-patches-pull-request
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${ noResults }
12 Commits (896a9ee96720c5cc7e00e63943435ccccec54d23)
| Author | SHA1 | Message | Date |
|---|---|---|---|
|
|
1438eff302 |
target-ppc: gdbstub: Add VSX support
Add the XML and functions to get and set VSX registers. Signed-off-by: Anton Blanchard <anton@samba.org> (fixed little-endian guests) Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
10 years ago |
|
|
8a641ff60f |
s390x/gdb: expose virtualization specific registers
Let's expose some virtual/fake registers as virtualization specific registers. Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Message-Id: <1443689387-34473-3-git-send-email-jfrei@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> |
11 years ago |
|
|
5b9f6345a6 |
s390x/gdb: support reading/writing of control registers
Let's support reading and writing of control registers for kvm and tcg. We have to take care of flushing the tlb (tcg) and pushing the changed registers into kvm. Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> |
11 years ago |
|
|
773d4ebc9a |
gdb-xml: Include XML for s390 vector registers
Include the vector registers XML file that is provided by gdb, and can be used by the qemu gdbserver interface. Signed-off-by: Eric Farman <farman@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> |
12 years ago |
|
|
6117afac34 |
s390x/gdb: add the feature xml files for s390x
This patch adds the relevant s390x feature xml files taken from gdb. Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> |
12 years ago |
|
|
6a66942735 |
target-arm: Support fp registers in gdb stub
Register the aarch64-fpu XML and implement the necessary read/write handlers so we can support reading and writing of FP registers in the gdb stub. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> |
12 years ago |
|
|
96c04212ba |
target-arm: Add AArch64 gdbstub support
We want to be able to debug AArch64 guests. So let's add the respective gdb stub functions and xml descriptions that allow us to do so. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-12-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-6-git-send-email-john.rigby@linaro.org [PMM: dropped unused fp regs XML for now; moved 64 bit only functions to new gdbstub64.c; these are hooked up in AArch64CPU, not via ifdefs in ARMCPU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
13 years ago |
|
|
22555301ad |
gdb-xml: fix hacks in powerpc register numbering
The powerpc xml files contained a hack--an empty, non-existent register--for getting the register numbers to line up for newer (XML-aware) and older (non-XML-aware) GDB. While this hack worked in some cases, it didn't work in all cases, notably when the user used `finish' or `continue': GDB would attempt to read the non-existent register and QEMU would complain. This patch fixes things up properly. Instead of inserting a fake register, we explicitly declare the floating-point and SPE registers to start at 71. This action accomplishes the same thing as the nasty hack, except that now GDB never tries to fetch the non-existant register 70. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> |
17 years ago |
|
|
d2c753454e |
Work around QEMU GDB stub suboptimality
The current XML files claim, on floating point-supporting Power chips, that $f0 is register 70. This would be fine, except that register 70 for non-XML-aware GDB is FPSCR. More importantly, 70 is less than NUM_CORE_REGS (71) for Power, so a request for register 70 goes to the "core" register reading routines, rather than the floating-point register read routine we registered with gdb_register_coprocessor. Therefore, when we are talking to an XML-aware GDB, we claim that register has zero width, which causes the rest of QEMU's GDB stub to send an error back to GDB, which causes GDB to be unable to read the floating-point registers. (The problem is also present for SPE registers and occurs in a slightly different way for Altivec registers.) The best way to fix this is to have the "core register" XML files for PPC32 and PPC64 claim that there is a 4-byte register 70, which causes $f0 to be register 71, and everything works just fine from that point forward. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6770 c046a42c-6fe2-441c-8c8c-71466251a162 |
17 years ago |
|
|
e53bd70384 |
The different VFP variants will never occur at the same time, and giving them
different names confuses GDB, so use org.gnu.gdb.arm.vfp for all of them. Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6682 c046a42c-6fe2-441c-8c8c-71466251a162 |
17 years ago |
|
|
c8b3532d8a |
target-ppc: Add XML files for PowerPC registers
These files are nearly identical to the XML files provided with GDB.
The only difference is that power-{fpu,spe}.xml do not assign register
numbers; the internal QEMU machinery takes care of that.
Define gdb_xml_files for ppc targets in configure as well.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6420 c046a42c-6fe2-441c-8c8c-71466251a162
|
17 years ago |
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56aebc8916 |
Add GDB XML register description support.
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5459 c046a42c-6fe2-441c-8c8c-71466251a162 |
18 years ago |