riscv/qemu - qemu - Gitea: Git with a cup of tea

Commit Graph

Author	SHA1	Message	Date
John Snow	b08e111b1e	scripts: nudge users to use 'run' script for scripts that import qemu.qmp Now that qmp has to be installed and isn't local, we can no longer offer a simple forwarder for these scripts (nor path hacks) and hope that it works. Encourage users to use the 'run' script to use these scripts instead. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20260218213416.674483-18-jsnow@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>	1 month ago
John Snow	5abfe61b40	tests: replace check-venv with vm-venv target With the qemu.qmp and qemu.machine dependencies now installed by default at configure time and additional dependencies required by functional testing installed on demand, we do not need the explicit "check-venv" target. ...However, to facilitate running VM tests without running configure, we move some of the former logic into tests/vm/Makefile.include to create a new venv (vm-venv) on-demand when running VM tests from the source tree. Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20260218213416.674483-17-jsnow@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>	1 month ago
John Snow	b5a21249cb	meson, mkvenv: make functional tests depend on functests group Note that only the thorough group requires the extra testing dependencies; the quick group will run with just the "tooling" group, which we intend to install by default at configure time in a forthcoming commit. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20260218213416.674483-14-jsnow@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>	1 month ago
John Snow	047fa5b4d7	tests/lcitool: add python3 wheel and setuptools deps for qemu Installing local dependencies while offline, without PyPI access, requires the python3-setuptools and python3-wheel packages. Most distributions have these available anyway for one reason or another, but not all of them. If you are asking yourself "Wait, aren't these packages guaranteed via installation of pip, via the ensurepip module, which mkvenv takes immense pains to provide for us?" - Well... since Python 3.13, "pip" does not actually come with "setuptools" or "wheel" anymore, and so if we want to build and install a python package, we actually need these available in the host environment. (Note that you don't need these packages just to install a pre-built package, you only need them to build a package. With cutting edge setuptools and pip, all locally installed packages, even in editable mode, must be "built" first before being installed. Thus, these dependencies are being added specifically to facilitate installing qemu.git/python/qemu to the configure-time venv.) Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20260218213416.674483-12-jsnow@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>	1 month ago
John Snow	4510ff3a43	tests/lcitool: update lcitool to latest version Update to latest lcitool master and refresh tests. Fedora is upgraded to Fedora 43 and Alpine from 3.21 to 3.23 as a result. This is being done in this series primarily to ensure that MacOS installs python-setuptools, which is now separate from the core python package, and which is needed for this series to work correctly. Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20260218213416.674483-11-jsnow@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>	1 month ago
John Snow	0e0bf74cdd	iotests: tolerate being run outside of pyvenv Modify the iotests environment preparation so that it can detect when it is being run outside of the configure-time virtual environment and give a warning to the user, suggesting the use of the meson run script instead. As a bonus, since the test executor itself does not actually rely on anything in the configure-time venv in and of itself, it is possible to just modify the python executable it uses for launching tests to be the correct, configured venv that has access to qemu.qmp and other test dependencies. Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-ID: <20260218213416.674483-9-jsnow@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>	1 month ago
John Snow	5b798e6da6	python/mkvenv: add 'tooling' and 'functests' dependency groups 'tooling' contains depedencies required to run various tools (like qmp-shell) as well as dependencies required to run "make check", and as such, we promise that these dependencies can be sourced from the user's distribution repository or from vendored packages so that "make check" can be executed offline in an isolated build environment. In contrast, pygdbmi is only needed for functional tests and not tests in general; we do not make the same offline/isolated guarantees for functional tests, and this dependency group is allowed to fetch dependencies from PyPI at runtime. For the time being, amend the "check-venv" target to install both dependency groups, to avoid a duplicate dependency between them. By the end of this series, however, "check-venv" will be eliminated in favor of always installing "tooling" at configure time and allowing "functests" to be installed on-demand as needed by meson/ninja. Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20260218213416.674483-5-jsnow@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>	1 month ago
Marc-André Lureau	ac8d4cf5f5	tests/audio: add an invalid settings test As we are going to change the related code next. Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>	2 months ago
Marc-André Lureau	eebba32fe5	audio: replace int endianness with bool big_endian in audsettings The endianness field used an int to represent a boolean concept, with 0 meaning little-endian and 1 meaning big-endian. This required runtime validation to reject invalid values and made the code less readable. Replace with a bool big_endian field that is self-documenting and type-safe. The compiler now enforces valid values, eliminating the need for the validation check in audio_validate_settings(). Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>	2 months ago
Marc-André Lureau	74bb6fb293	audio-be: add common pre-conditions assert() on valid values, and handle acceptable NULL arguments gracefully. Note audio_driver_write() and audio_driver_read() used to return size (with a "XXX: Consider options") when sw was NULL. Imho, it is more correct to not pretend to have read/written anything by default in the AudioBackend base abstract class. Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>	4 months ago
Marc-André Lureau	c70d79776b	audio: AUD_ -> audio_be_ Use the associate AudioBackend prefix for readability. Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>	5 months ago
Marc-André Lureau	61e95a0c60	audio: make all the backend-specific APIs take the be This will allow to dispatch to different implementations next. Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>	5 months ago
Marc-André Lureau	5ca6c931a7	replay: remove dependency on audio/ The replay infrastructure shouldn't depend on internals of audio/. (st_sample is an internal implementation detail and could be different) Let audio drive the audio samples recording/replaying. Notice also we don't need to save & restore the internal ring "wpos", all replay should care about is the number of samples and the samples. Bump the replay version. Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>	5 months ago
Marc-André Lureau	1618bea984	audio: introduce AudioMixengBackend Introduce a sub-class for current "audio_driver" based implementations. Future AudioBackend implementations can do without it. Next cleanup will actually remove "audio_driver" struct altogether and make the subclass proper QOM objects. Public APIs still rely on backend being an AudioMixeng. They will assert() if not. This will be addressed later to allow other backends. Note that the initial naming proposed for this object was AudioDriver, however the semantics for "driver" is already overloaded and leads to confusion, in particular with the QAPI AudiodevDriver. The defining characteristic is of using QEMU's software mixing engine, so AudioMixengBackend. Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>	5 months ago
Marc-André Lureau	3220b38a8d	tests: start manual audio backend test Start a simple test program that will exercise the QEMU audio APIs. It is meant to run manually for now, as it accesses the sound system and produces sound by default, and also runs for a few seconds. We may want to make it silent or use the "none" (noaudio) backend by default though, so it can run as part of the automated test suite. Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>	2 months ago
Jonathan Cameron	26cd3f8d96	tests/acpi/cxl: Update CEDT.cxl to allow BI in CFWMS With the addition of back invalidate support in the CXL emulation relax the restriction on the CXL Fixed Memory Window Structures so all advertised ranges continue to support being used with all features that QEMU emulates. [064h 0100 001h] Subtable Type : 01 [CXL Fixed Memory Window Structure] [065h 0101 001h] Reserved : 00 [066h 0102 002h] Length : 0028 [068h 0104 004h] Reserved : 00000000 [06Ch 0108 008h] Window base address : 0000000110000000 [074h 0116 008h] Window size : 0000000100000000 [07Ch 0124 001h] Interleave Members : 00 [07Dh 0125 001h] Interleave Arithmetic : 00 [07Eh 0126 002h] Reserved : 0000 [080h 0128 004h] Granularity : 00000005 [084h 0132 002h] Restrictions : 002F # Changed from 000F [086h 0134 002h] QtgId : 0000 [088h 0136 004h] First Target : 0000000C Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20260204170936.43959-6-Jonathan.Cameron@huawei.com>	2 months ago
Jonathan Cameron	de6eb44095	tests/bios-tables-test: Excluded CEDT.cxl for BI restriction relaxation. The next patch will relax restrictions on the fixed memory window to allow use with back invalidate capable devices. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20260204170936.43959-4-Jonathan.Cameron@huawei.com>	2 months ago
Mohamed Mediouni	4d0830ea34	tests/data/acpi: disassemble-aml: rename and change interpreter line /usr/bin/bash isn't guaranteed to be present. Switch to /usr/bin/env bash. Specifically, on Darwin/macOS: $ which bash /opt/homebrew/bin/bash Rename disassemle to disassemble in the same commit (typo fix). Adapt the correponding message in rebuild-expected-aml. Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20260210041248.14701-1-mohamed@unpredictable.fr>	2 months ago
Yodel Eldar	051364b36b	tests/functional/x86_64: Add vhost-user-bridge test Introduce a functional test of vhost-user-bridge and enter it into MAINTAINERS under the vhost section. The test runs vhost-user-bridge as a subprocess, then launches a guest with four backends: a unix domain socket for vhost-user, a UDP socket, a user-mode net, and a hubport to hub the UDP and user backends; only the vhost-user backend is exposed, the rest are deviceless. This configuration mimics the testing setup described in the initial commit of vhost-user-bridge in `3595e2eb0a`. The test creates a scratch file containing a hardcoded UUID on the host and exposes it to the the guest via the tftp parameter of the user netdev. After the guest invokes tftp to request the file, the test verifies the transfer by hashsum. Similarly, the test creates a file with another hardcoded UUID in the guest. A call to check_http_download() serves the file to the host via http, whereupon a check of the file hashsum occurs on the host. Lastly, add the test to the thorough tests suite in meson.build. Suggested-by: Cédric Le Goater <clg@redhat.com> Suggested-by: Marc-André Lureau <marcandre.lureau@gmail.com> Suggested-by: Michael S. Tsirkin <mst@redhat.com> Suggested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Yodel Eldar <yodel.eldar@yodel.dev> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20260129133049.119829-3-yodel.eldar@yodel.dev>	2 months ago
Yodel Eldar	42d2c1cc9e	tests/vhost-user-bridge: Move to contrib/vhost-user-bridge/ After the introduction of vhost-user-bridge and libvhost-user, we formed the convention of placing vhost-user daemons in eponymous subdirs of contrib/. Follow this convention. Create a contrib/vhost-user-bridge/ directory and move vhost-user-bridge into it. Extract its build target definition from tests/meson.build into the new directory, and include its subdir in the root-level meson.build. Add a section about it in the "vhost-user daemons in contrib" document. Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Yodel Eldar <yodel.eldar@yodel.dev> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20260129133049.119829-2-yodel.eldar@yodel.dev>	2 months ago
Peter Maydell	fd5ecd187b	tests/qtest/migration/tls-tests.c: Don't use tls_psk end hook for no_tls tests If you run the TLS tests under a clang undefined-behaviour sanitizer build it will fall over like this: ../../tests/unit/crypto-tls-psk-helpers.c:53:12: runtime error: null pointer passed as argument 1, which is declared to never be null /usr/include/unistd.h:858:48: note: nonnull attribute specified here #0 0x62bd810762ee in test_tls_psk_cleanup /home/pm215/qemu/build/clang/../../tests/unit/crypto-tls-psk-helpers.c:53:5 #1 0x62bd81073f89 in migrate_hook_end_tls_psk /home/pm215/qemu/build/clang/../../tests/qtest/migration/tls-tests.c:101:5 #2 0x62bd81062ef0 in test_precopy_common /home/pm215/qemu/build/clang/../../tests/qtest/migration/framework.c:947:9 This happens because test_precopy_tcp_no_tls() uses a custom start_hook that only sets a couple of parameters, but reuses the tsk_psk end_hook. However, the end_hook runs cleanup that assumes that the data was set up by migrate_hook_start_tls_psk_common(). In particular, it will unconditionally call test_tls_psk_cleanup(data->pskfile), and test_tls_psk_cleanup() will unconditionally unlink() the filename it is passed, which is undefined behaviour if you pass it a NULL pointer. Instead of creating a TestMigrateTLSPSKData struct which we never set any fields in and requiring the migrate_hook_end_tls_psk() hook to cope with that, don't allocate the struct in the start_hook. Then there is nothing we need to clean up, and we can set the end_hook to NULL (which the test framework will interpret as "don't call any end_hook"). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260212114747.1103466-1-peter.maydell@linaro.org [no need to copy stable] Signed-off-by: Fabiano Rosas <farosas@suse.de>	2 months ago
Chao Liu	a8f98ffd7b	tests/qtest: Add RISC-V IOMMU bare-metal test Add a qtest suite for the RISC-V IOMMU PCI device on the virt machine. The test exercises bare, S-stage, G-stage, and nested translation paths using iommu-testdev and the qos-riscv-iommu helpers. The test validates: - Device context (DC) configuration - SV39 page table walks for S-stage translation - SV39x4 page table walks for G-stage translation - Nested translation combining both stages - FCTL register constraints This provides regression coverage for the RISC-V IOMMU implementation without requiring a full guest OS boot. Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com> Reviewed-by: Tao Tang <tangtao1634@phytium.com.cn> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Link: https://lore.kernel.org/qemu-devel/35f046c8d21aa6d5f9a531258762e01be198d8cf.1770127918.git.chao.liu.zevorn@gmail.com Signed-off-by: Fabiano Rosas <farosas@suse.de>	2 months ago
Chao Liu	9d8ffbfc1d	tests/qtest/libqos: Add RISC-V IOMMU helper library Introduce a libqos helper module for RISC-V IOMMU testing with iommu-testdev. The helper provides routines to: - Build device contexts (DC) and 3-level page tables for SV39/SV39x4 - Program command queue (CQ), fault queue (FQ), and DDTP registers following the RISC-V IOMMU specification - Execute DMA translations and verify results The current implementation supports SV39 for S-stage and SV39x4 for G-stage translation. Support for SV48/SV48x4/SV57/SV57x4 can be added in future patches. Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com> Reviewed-by: Tao Tang <tangtao1634@phytium.com.cn> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Link: https://lore.kernel.org/qemu-devel/a2edf8c44f0bce26dccb91a7d13edb58be50c1a3.1770127918.git.chao.liu.zevorn@gmail.com Signed-off-by: Fabiano Rosas <farosas@suse.de>	2 months ago
Marc-André Lureau	69345f948a	tests: add /qdev/free-properties test Add a simple qdev test to check that allocated properties get freed with the object. This test exhibited array leaks before the fixes. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Link: https://lore.kernel.org/r/20250429140306.190384-6-marcandre.lureau@redhat.com Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Link: https://lore.kernel.org/r/20260108230311.584141-6-csomani@redhat.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>	3 months ago
Eric K	45a6256830	char-udp: Fix initial backend open status This patch removes the `*be_opened = false` override for the UDP chardev backend. Since UDP is connectionless it never sends a `CHR_EVENT_OPENED` so it is never marked open. This causes some frontends (e.g. virtio-serial) to never perform any operations on the socket. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2993 Signed-off-by: Eric K <erickra@cs.utexas.edu> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20251208225849.705554-1-erickra@cs.utexas.edu>	4 months ago
Brian Cain	20df4ef1c9	target/hexagon: Detect register write conflicts A conflict exists when any GPR is written by multiple instructions and at least one write is unconditional. This catches (1) two unconditional writes to the same GPR and (2) an unconditional write combined with a predicated write. Add HEX_CAUSE_REG_WRITE_CONFLICT and map it to SIGILL. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2696 Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>	2 months ago
Brian Cain	8772ff0085	tests/tcg/hexagon: Handle SIGILL internally in invalid-slots test Rewrite invalid-slots.c to catch and verify SIGILL using a sigaction handler that modifies the ucontext, matching the pattern used by invalid-encoding.c. Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>	2 months ago
Brian Cain	b0129a14a4	target/hexagon: Return decode failure for invalid non-duplex encodings When a non-duplex encoding (parse_bits != 0) fails both decode_normal() and decode_hvx(), the decoder hit an unreachable. Instead, handle the decode failure and raise an exception. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>	2 months ago
Brian Cain	f87873a134	target/hexagon: Fix invalid duplex decoding When decoding a duplex instruction, if the slot0 sub-instruction fails to decode after slot1 succeeds, QEMU was leaving the packet in a partially-decoded state. This allowed invalid duplex encodings (where one sub-instruction doesn't match any valid pattern) to be executed incorrectly. Fix by resetting the decoder state when slot0 fails, returning an empty instruction that triggers an exception. Add gen_exception_decode_fail() for raising exceptions when decode fails before ctx->next_PC is initialized. This keeps gen_exception_end_tb() semantics unchanged (it continues to use ctx->next_PC for the exception PC after successful decode). Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3291 Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>	2 months ago
Jamin Lin	1b66287951	tests/functional/aarch64/test_aspeed_ast2700fc: Use AST2700 A2 SDK image for FC tests Update AST2700 FC functional tests to use the AST2700 A2 SDK v11.00 image. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260211021527.119674-12-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	2 months ago
Jamin Lin	70ae73ac3f	tests/functional/aarch64/test_aspeed_ast2700a2: Add AST2700 A2 EVB functional tests Add functional coverage for the AST2700 A2 EVB machine by introducing test cases that boot and validate an OpenBMC SDK v11.00 image on "ast2700a2-evb". Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260211021527.119674-9-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	2 months ago
Jamin Lin	37a631db70	tests/functional/aarch64/test_aspeed_ast2700: Rename AST2700 A1 test to reduce test runtime Adding additional test cases to test_aspeed_ast2700.py makes the test suite significantly larger and increases the overall test runtime. To keep testing efficient and better scoped, rename the existing test to test_aspeed_ast2700a1.py and dedicate it to AST2700 A1 specific tests. A new test_aspeed_ast2700.py will be introduced later to always cover the latest revision of the AST2700 SoC. No functional change. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260211021527.119674-8-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	2 months ago
Jamin Lin	7c79c954aa	tests/qtest/ast2700-hace-test: Use ast2700-evb alias for AST2700 HACE tests Update AST2700 HACE qtests to use the "ast2700-evb" machine alias instead of a specific silicon revision. The AST2700 A1 and A2 revisions are compatible for the HACE model, so the tests do not depend on a particular EVB revision. Using the "ast2700-evb" alias ensures the tests always run the latest supported AST2700 silicon revision. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260211021527.119674-7-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	2 months ago
Kane Chen	2451fca14a	tests/functional/arm/aspeed_ast2600: Enhance OTP test with functional validation Improve the OTP test script by adding functional verification of OTP strap registers. The test now validates that OTP modifications made in U-Boot persist through the Linux boot process and survive a subsequent reboot. Key changes: - Added interactive console commands for U-Boot and Linux. - Implemented verification for OTP register 0x30 across reboots. Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260211052326.430475-2-kane_chen@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	2 months ago
Cédric Le Goater	308eef22d9	tests/functional: Add SDK tests with Linux 5.15 Add functional tests for AST2500 and AST2600 machines using the OpenBMC SDK v11.00 with Linux kernel 5.15. These tests complement the existing SDK tests and verify that QEMU correctly boots older kernel versions on these platforms. Link: https://lore.kernel.org/qemu-devel/20260209065044.239378-3-clg@redhat.com Reviewed-by: Kane Chen <kane_chen@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@redhat.com>	2 months ago
Cédric Le Goater	6b1a1fc1d1	tests/functional: Split Aspeed ARM tests into separate files Reorganize the monolithic Aspeed functional test files into separate files based on firmware type (Buildroot vs SDK) and specific test scenarios. This allows the test suite to run tests in parallel more effectively and makes it easier to identify and run specific test scenarios independently. Link: https://lore.kernel.org/qemu-devel/20260209065044.239378-2-clg@redhat.com Reviewed-by: Kane Chen <kane_chen@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@redhat.com>	2 months ago
Choon Keong	76959197dd	tests/Makefile.include: add run-tcg-tests-TARGET to check-help User can execute TCG tests for a specific TARGET using the command: $ make run-tcg-tests-TARGET-softmmu However, this command is not showing in 'make check-help' documentation, making it hard for new contributors to discover. This commit help to resolve this by adding the description for the command, to the "check-tcg" section, as suggested by Thomas, in tests/Makefile.include. Additionally, reformat the alignment to accommodate the length of the new command, ensuring the consistency of the output. Suggested-by: Thomas Huth <thuth@redhat.com> Reported-by: Philippe Mathieu-Daudé <philmd@linaro.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/228 Signed-off-by: ck <ckeong.teo17@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20260206170059.4913-1-ckeong.teo17@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 months ago
Ilya Leoshkevich	a6364b292f	tests/tcg/s390x: Test DIVIDE TO INTEGER Add a test to prevent regressions. Data is generated using a libFuzzer-based fuzzer and hopefully covers all the important corner cases. Acked-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20260210214044.1174699-6-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 months ago
Fiona Ebner	267d7ae99a	iotests: test active mirror with unaligned, small write zeroes op This tests the scenario fixed by "block/mirror: check range when setting zero bitmap for sync write" [0]. [0] https://lore.kernel.org/qemu-devel/20260112152544.261923-1-f.ebner@proxmox.com/ Signed-off-by: Fiona Ebner <f.ebner@proxmox.com> Message-ID: <20260120113859.251743-1-f.ebner@proxmox.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Tested-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>	2 months ago
Mohamed Mediouni	72a231af4c	qtest: hw/arm: virt: add new test case for GICv3 + GICv2m Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 months ago
Mohamed Mediouni	5f52ba1f34	qtest: hw/arm: virt: add ACPI tables for new GICv3 + GICv2m test case Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 months ago
Mohamed Mediouni	2e1bb23b44	tests: data: update AArch64 ACPI tables After the previous commit introducing GICv3 + GICv2m configurations, update the AArch64 ACPI tables for the GICv2 case. Changes to the ACPI tables: tests/data/acpi/aarch64/virt/IORT.dsl: @@ -11,68 +11,49 @@ / [000h 0000 004h] Signature : "IORT" [IO Remapping Table] -[004h 0004 004h] Table Length : 00000080 +[004h 0004 004h] Table Length : 00000054 [008h 0008 001h] Revision : 05 -[009h 0009 001h] Checksum : B1 +[009h 0009 001h] Checksum : 3C [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 -[024h 0036 004h] Node Count : 00000002 +[024h 0036 004h] Node Count : 00000001 [028h 0040 004h] Node Offset : 00000030 [02Ch 0044 004h] Reserved : 00000000 -[030h 0048 001h] Type : 00 -[031h 0049 002h] Length : 0018 -[033h 0051 001h] Revision : 01 +[030h 0048 001h] Type : 02 +[031h 0049 002h] Length : 0024 +[033h 0051 001h] Revision : 03 [034h 0052 004h] Identifier : 00000000 [038h 0056 004h] Mapping Count : 00000000 -[03Ch 0060 004h] Mapping Offset : 00000000 +[03Ch 0060 004h] Mapping Offset : 00000024 -[040h 0064 004h] ItsCount : 00000001 -[044h 0068 004h] Identifiers : 00000000 - -[048h 0072 001h] Type : 02 -[049h 0073 002h] Length : 0038 -[04Bh 0075 001h] Revision : 03 -[04Ch 0076 004h] Identifier : 00000001 -[050h 0080 004h] Mapping Count : 00000001 -[054h 0084 004h] Mapping Offset : 00000024 - -[058h 0088 008h] Memory Properties : [IORT Memory Access Properties] -[058h 0088 004h] Cache Coherency : 00000001 -[05Ch 0092 001h] Hints (decoded below) : 00 +[040h 0064 008h] Memory Properties : [IORT Memory Access Properties] +[040h 0064 004h] Cache Coherency : 00000001 +[044h 0068 001h] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 -[05Dh 0093 002h] Reserved : 0000 -[05Fh 0095 001h] Memory Flags (decoded below) : 03 +[045h 0069 002h] Reserved : 0000 +[047h 0071 001h] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 Ensured Coherency of Accesses : 0 -[060h 0096 004h] ATS Attribute : 00000000 -[064h 0100 004h] PCI Segment Number : 00000000 -[068h 0104 001h] Memory Size Limit : 40 -[069h 0105 002h] PASID Capabilities : 0000 -[06Bh 0107 001h] Reserved : 00 +[048h 0072 004h] ATS Attribute : 00000000 +[04Ch 0076 004h] PCI Segment Number : 00000000 +[050h 0080 001h] Memory Size Limit : 40 +[051h 0081 002h] PASID Capabilities : 0000 +[053h 0083 001h] Reserved : 00 -[06Ch 0108 004h] Input base : 00000000 -[070h 0112 004h] ID Count : 0000FFFF -[074h 0116 004h] Output Base : 00000000 -[078h 0120 004h] Output Reference : 00000030 -[07Ch 0124 004h] Flags (decoded below) : 00000000 - Single Mapping : 0 +Raw Table Data: Length 84 (0x54) -Raw Table Data: Length 128 (0x80) - - 0000: 49 4F 52 54 80 00 00 00 05 B1 42 4F 43 48 53 20 // IORT......BOCHS + 0000: 49 4F 52 54 54 00 00 00 05 3C 42 4F 43 48 53 20 // IORTT....<BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC - 0020: 01 00 00 00 02 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0040: 01 00 00 00 00 00 00 00 02 38 00 03 01 00 00 00 // .........8...... - 0050: 01 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$........... - 0060: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@....... - 0070: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0....... + 0020: 01 00 00 00 01 00 00 00 30 00 00 00 00 00 00 00 // ........0....... + 0030: 02 24 00 03 00 00 00 00 00 00 00 00 24 00 00 00 // .$..........$... + 0040: 01 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 // ................ + 0050: 40 00 00 00 // @... tests/data/acpi/aarch64/virt/IORT.smmuv3-dev.dsl: @@ -11,164 +11,120 @@ / [000h 0000 004h] Signature : "IORT" [IO Remapping Table] -[004h 0004 004h] Table Length : 0000016C +[004h 0004 004h] Table Length : 00000104 [008h 0008 001h] Revision : 05 -[009h 0009 001h] Checksum : C8 +[009h 0009 001h] Checksum : 49 [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 -[024h 0036 004h] Node Count : 00000004 +[024h 0036 004h] Node Count : 00000003 [028h 0040 004h] Node Offset : 00000030 [02Ch 0044 004h] Reserved : 00000000 -[030h 0048 001h] Type : 00 -[031h 0049 002h] Length : 0018 -[033h 0051 001h] Revision : 01 +[030h 0048 001h] Type : 04 +[031h 0049 002h] Length : 0044 +[033h 0051 001h] Revision : 04 [034h 0052 004h] Identifier : 00000000 [038h 0056 004h] Mapping Count : 00000000 [03Ch 0060 004h] Mapping Offset : 00000000 -[040h 0064 004h] ItsCount : 00000001 -[044h 0068 004h] Identifiers : 00000000 - -[048h 0072 001h] Type : 04 -[049h 0073 002h] Length : 0058 -[04Bh 0075 001h] Revision : 04 -[04Ch 0076 004h] Identifier : 00000001 -[050h 0080 004h] Mapping Count : 00000001 -[054h 0084 004h] Mapping Offset : 00000044 - -[058h 0088 008h] Base Address : 000000000C000000 -[060h 0096 004h] Flags (decoded below) : 00000001 +[040h 0064 008h] Base Address : 000000000C000000 +[048h 0072 004h] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 DeviceID Valid : 0 -[064h 0100 004h] Reserved : 00000000 -[068h 0104 008h] VATOS Address : 0000000000000000 -[070h 0112 004h] Model : 00000000 -[074h 0116 004h] Event GSIV : 00000090 -[078h 0120 004h] PRI GSIV : 00000091 -[07Ch 0124 004h] GERR GSIV : 00000093 -[080h 0128 004h] Sync GSIV : 00000092 -[084h 0132 004h] Proximity Domain : 00000000 -[088h 0136 004h] Device ID Mapping Index : 00000000 +[04Ch 0076 004h] Reserved : 00000000 +[050h 0080 008h] VATOS Address : 0000000000000000 +[058h 0088 004h] Model : 00000000 +[05Ch 0092 004h] Event GSIV : 00000090 +[060h 0096 004h] PRI GSIV : 00000091 +[064h 0100 004h] GERR GSIV : 00000093 +[068h 0104 004h] Sync GSIV : 00000092 +[06Ch 0108 004h] Proximity Domain : 00000000 +[070h 0112 004h] Device ID Mapping Index : 00000000 -[08Ch 0140 004h] Input base : 00000000 -[090h 0144 004h] ID Count : 0000FFFF -[094h 0148 004h] Output Base : 00000000 -[098h 0152 004h] Output Reference : 00000030 -[09Ch 0156 004h] Flags (decoded below) : 00000000 - Single Mapping : 0 +[074h 0116 001h] Type : 04 +[075h 0117 002h] Length : 0044 +[077h 0119 001h] Revision : 04 +[078h 0120 004h] Identifier : 00000001 +[07Ch 0124 004h] Mapping Count : 00000000 +[080h 0128 004h] Mapping Offset : 00000000 -[0A0h 0160 001h] Type : 04 -[0A1h 0161 002h] Length : 0058 -[0A3h 0163 001h] Revision : 04 -[0A4h 0164 004h] Identifier : 00000002 -[0A8h 0168 004h] Mapping Count : 00000001 -[0ACh 0172 004h] Mapping Offset : 00000044 - -[0B0h 0176 008h] Base Address : 000000000C020000 -[0B8h 0184 004h] Flags (decoded below) : 00000001 +[084h 0132 008h] Base Address : 000000000C020000 +[08Ch 0140 004h] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 DeviceID Valid : 0 -[0BCh 0188 004h] Reserved : 00000000 -[0C0h 0192 008h] VATOS Address : 0000000000000000 -[0C8h 0200 004h] Model : 00000000 -[0CCh 0204 004h] Event GSIV : 00000094 -[0D0h 0208 004h] PRI GSIV : 00000095 -[0D4h 0212 004h] GERR GSIV : 00000097 -[0D8h 0216 004h] Sync GSIV : 00000096 -[0DCh 0220 004h] Proximity Domain : 00000000 -[0E0h 0224 004h] Device ID Mapping Index : 00000000 +[090h 0144 004h] Reserved : 00000000 +[094h 0148 008h] VATOS Address : 0000000000000000 +[09Ch 0156 004h] Model : 00000000 +[0A0h 0160 004h] Event GSIV : 00000094 +[0A4h 0164 004h] PRI GSIV : 00000095 +[0A8h 0168 004h] GERR GSIV : 00000097 +[0ACh 0172 004h] Sync GSIV : 00000096 +[0B0h 0176 004h] Proximity Domain : 00000000 +[0B4h 0180 004h] Device ID Mapping Index : 00000000 -[0E4h 0228 004h] Input base : 00000000 -[0E8h 0232 004h] ID Count : 0000FFFF -[0ECh 0236 004h] Output Base : 00000000 -[0F0h 0240 004h] Output Reference : 00000030 -[0F4h 0244 004h] Flags (decoded below) : 00000000 - Single Mapping : 0 +[0B8h 0184 001h] Type : 02 +[0B9h 0185 002h] Length : 004C +[0BBh 0187 001h] Revision : 03 +[0BCh 0188 004h] Identifier : 00000002 +[0C0h 0192 004h] Mapping Count : 00000002 +[0C4h 0196 004h] Mapping Offset : 00000024 -[0F8h 0248 001h] Type : 02 -[0F9h 0249 002h] Length : 0074 -[0FBh 0251 001h] Revision : 03 -[0FCh 0252 004h] Identifier : 00000003 -[100h 0256 004h] Mapping Count : 00000004 -[104h 0260 004h] Mapping Offset : 00000024 - -[108h 0264 008h] Memory Properties : [IORT Memory Access Properties] -[108h 0264 004h] Cache Coherency : 00000001 -[10Ch 0268 001h] Hints (decoded below) : 00 +[0C8h 0200 008h] Memory Properties : [IORT Memory Access Properties] +[0C8h 0200 004h] Cache Coherency : 00000001 +[0CCh 0204 001h] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 -[10Dh 0269 002h] Reserved : 0000 -[10Fh 0271 001h] Memory Flags (decoded below) : 03 +[0CDh 0205 002h] Reserved : 0000 +[0CFh 0207 001h] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 Ensured Coherency of Accesses : 0 -[110h 0272 004h] ATS Attribute : 00000000 -[114h 0276 004h] PCI Segment Number : 00000000 -[118h 0280 001h] Memory Size Limit : 40 -[119h 0281 002h] PASID Capabilities : 0000 -[11Bh 0283 001h] Reserved : 00 +[0D0h 0208 004h] ATS Attribute : 00000000 +[0D4h 0212 004h] PCI Segment Number : 00000000 +[0D8h 0216 001h] Memory Size Limit : 40 +[0D9h 0217 002h] PASID Capabilities : 0000 +[0DBh 0219 001h] Reserved : 00 -[11Ch 0284 004h] Input base : 00000000 -[120h 0288 004h] ID Count : 000001FF -[124h 0292 004h] Output Base : 00000000 -[128h 0296 004h] Output Reference : 00000048 -[12Ch 0300 004h] Flags (decoded below) : 00000000 +[0DCh 0220 004h] Input base : 00000000 +[0E0h 0224 004h] ID Count : 000001FF +[0E4h 0228 004h] Output Base : 00000000 +[0E8h 0232 004h] Output Reference : 00000030 +[0ECh 0236 004h] Flags (decoded below) : 00000000 Single Mapping : 0 -[130h 0304 004h] Input base : 00001000 -[134h 0308 004h] ID Count : 000000FF -[138h 0312 004h] Output Base : 00001000 -[13Ch 0316 004h] Output Reference : 000000A0 -[140h 0320 004h] Flags (decoded below) : 00000000 +[0F0h 0240 004h] Input base : 00001000 +[0F4h 0244 004h] ID Count : 000000FF +[0F8h 0248 004h] Output Base : 00001000 +[0FCh 0252 004h] Output Reference : 00000074 +[100h 0256 004h] Flags (decoded below) : 00000000 Single Mapping : 0 -[144h 0324 004h] Input base : 00000200 -[148h 0328 004h] ID Count : 00000DFF -[14Ch 0332 004h] Output Base : 00000200 -[150h 0336 004h] Output Reference : 00000030 -[154h 0340 004h] Flags (decoded below) : 00000000 - Single Mapping : 0 +Raw Table Data: Length 260 (0x104) -[158h 0344 004h] Input base : 00001100 -[15Ch 0348 004h] ID Count : 0000EEFF -[160h 0352 004h] Output Base : 00001100 -[164h 0356 004h] Output Reference : 00000030 -[168h 0360 004h] Flags (decoded below) : 00000000 - Single Mapping : 0 - -Raw Table Data: Length 364 (0x16C) - - 0000: 49 4F 52 54 6C 01 00 00 05 C8 42 4F 43 48 53 20 // IORTl.....BOCHS + 0000: 49 4F 52 54 04 01 00 00 05 49 42 4F 43 48 53 20 // IORT.....IBOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC - 0020: 01 00 00 00 04 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0040: 01 00 00 00 00 00 00 00 04 58 00 04 01 00 00 00 // .........X...... - 0050: 01 00 00 00 44 00 00 00 00 00 00 0C 00 00 00 00 // ....D........... - 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0070: 00 00 00 00 90 00 00 00 91 00 00 00 93 00 00 00 // ................ - 0080: 92 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0090: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 00A0: 04 58 00 04 02 00 00 00 01 00 00 00 44 00 00 00 // .X..........D... - 00B0: 00 00 02 0C 00 00 00 00 01 00 00 00 00 00 00 00 // ................ - 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 94 00 00 00 // ................ - 00D0: 95 00 00 00 97 00 00 00 96 00 00 00 00 00 00 00 // ................ - 00E0: 00 00 00 00 00 00 00 00 FF FF 00 00 00 00 00 00 // ................ - 00F0: 30 00 00 00 00 00 00 00 02 74 00 03 03 00 00 00 // 0........t...... - 0100: 04 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$........... - 0110: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@....... - 0120: FF 01 00 00 00 00 00 00 48 00 00 00 00 00 00 00 // ........H....... - 0130: 00 10 00 00 FF 00 00 00 00 10 00 00 A0 00 00 00 // ................ - 0140: 00 00 00 00 00 02 00 00 FF 0D 00 00 00 02 00 00 // ................ - 0150: 30 00 00 00 00 00 00 00 00 11 00 00 FF EE 00 00 // 0............... - 0160: 00 11 00 00 30 00 00 00 00 00 00 00 // ....0....... + 0020: 01 00 00 00 03 00 00 00 30 00 00 00 00 00 00 00 // ........0....... + 0030: 04 44 00 04 00 00 00 00 00 00 00 00 00 00 00 00 // .D.............. + 0040: 00 00 00 0C 00 00 00 00 01 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 90 00 00 00 // ................ + 0060: 91 00 00 00 93 00 00 00 92 00 00 00 00 00 00 00 // ................ + 0070: 00 00 00 00 04 44 00 04 01 00 00 00 00 00 00 00 // .....D.......... + 0080: 00 00 00 00 00 00 02 0C 00 00 00 00 01 00 00 00 // ................ + 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 94 00 00 00 95 00 00 00 97 00 00 00 96 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 02 4C 00 03 02 00 00 00 // .........L...... + 00C0: 02 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$........... + 00D0: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@....... + 00E0: FF 01 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0....... + 00F0: 00 10 00 00 FF 00 00 00 00 10 00 00 74 00 00 00 // ............t... + 0100: 00 00 00 00 // .... tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy.dsl: @@ -11,129 +11,92 @@ */ [000h 0000 004h] Signature : "IORT" [IO Remapping Table] -[004h 0004 004h] Table Length : 00000114 +[004h 0004 004h] Table Length : 000000C0 [008h 0008 001h] Revision : 05 -[009h 0009 001h] Checksum : 4A +[009h 0009 001h] Checksum : 1C [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 -[024h 0036 004h] Node Count : 00000003 +[024h 0036 004h] Node Count : 00000002 [028h 0040 004h] Node Offset : 00000030 [02Ch 0044 004h] Reserved : 00000000 -[030h 0048 001h] Type : 00 -[031h 0049 002h] Length : 0018 -[033h 0051 001h] Revision : 01 +[030h 0048 001h] Type : 04 +[031h 0049 002h] Length : 0044 +[033h 0051 001h] Revision : 04 [034h 0052 004h] Identifier : 00000000 [038h 0056 004h] Mapping Count : 00000000 [03Ch 0060 004h] Mapping Offset : 00000000 -[040h 0064 004h] ItsCount : 00000001 -[044h 0068 004h] Identifiers : 00000000 - -[048h 0072 001h] Type : 04 -[049h 0073 002h] Length : 0058 -[04Bh 0075 001h] Revision : 04 -[04Ch 0076 004h] Identifier : 00000001 -[050h 0080 004h] Mapping Count : 00000001 -[054h 0084 004h] Mapping Offset : 00000044 - -[058h 0088 008h] Base Address : 0000000009050000 -[060h 0096 004h] Flags (decoded below) : 00000001 +[040h 0064 008h] Base Address : 0000000009050000 +[048h 0072 004h] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 DeviceID Valid : 0 -[064h 0100 004h] Reserved : 00000000 -[068h 0104 008h] VATOS Address : 0000000000000000 -[070h 0112 004h] Model : 00000000 -[074h 0116 004h] Event GSIV : 0000006A -[078h 0120 004h] PRI GSIV : 0000006B -[07Ch 0124 004h] GERR GSIV : 0000006D -[080h 0128 004h] Sync GSIV : 0000006C -[084h 0132 004h] Proximity Domain : 00000000 -[088h 0136 004h] Device ID Mapping Index : 00000000 +[04Ch 0076 004h] Reserved : 00000000 +[050h 0080 008h] VATOS Address : 0000000000000000 +[058h 0088 004h] Model : 00000000 +[05Ch 0092 004h] Event GSIV : 0000006A +[060h 0096 004h] PRI GSIV : 0000006B +[064h 0100 004h] GERR GSIV : 0000006D +[068h 0104 004h] Sync GSIV : 0000006C +[06Ch 0108 004h] Proximity Domain : 00000000 +[070h 0112 004h] Device ID Mapping Index : 00000000 -[08Ch 0140 004h] Input base : 00000000 -[090h 0144 004h] ID Count : 0000FFFF -[094h 0148 004h] Output Base : 00000000 -[098h 0152 004h] Output Reference : 00000030 -[09Ch 0156 004h] Flags (decoded below) : 00000000 - Single Mapping : 0 +[074h 0116 001h] Type : 02 +[075h 0117 002h] Length : 004C +[077h 0119 001h] Revision : 03 +[078h 0120 004h] Identifier : 00000001 +[07Ch 0124 004h] Mapping Count : 00000002 +[080h 0128 004h] Mapping Offset : 00000024 -[0A0h 0160 001h] Type : 02 -[0A1h 0161 002h] Length : 0074 -[0A3h 0163 001h] Revision : 03 -[0A4h 0164 004h] Identifier : 00000002 -[0A8h 0168 004h] Mapping Count : 00000004 -[0ACh 0172 004h] Mapping Offset : 00000024 - -[0B0h 0176 008h] Memory Properties : [IORT Memory Access Properties] -[0B0h 0176 004h] Cache Coherency : 00000001 -[0B4h 0180 001h] Hints (decoded below) : 00 +[084h 0132 008h] Memory Properties : [IORT Memory Access Properties] +[084h 0132 004h] Cache Coherency : 00000001 +[088h 0136 001h] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 -[0B5h 0181 002h] Reserved : 0000 -[0B7h 0183 001h] Memory Flags (decoded below) : 03 +[089h 0137 002h] Reserved : 0000 +[08Bh 0139 001h] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 Ensured Coherency of Accesses : 0 -[0B8h 0184 004h] ATS Attribute : 00000000 -[0BCh 0188 004h] PCI Segment Number : 00000000 -[0C0h 0192 001h] Memory Size Limit : 40 -[0C1h 0193 002h] PASID Capabilities : 0000 -[0C3h 0195 001h] Reserved : 00 +[08Ch 0140 004h] ATS Attribute : 00000000 +[090h 0144 004h] PCI Segment Number : 00000000 +[094h 0148 001h] Memory Size Limit : 40 +[095h 0149 002h] PASID Capabilities : 0000 +[097h 0151 001h] Reserved : 00 -[0C4h 0196 004h] Input base : 00000000 -[0C8h 0200 004h] ID Count : 000001FF -[0CCh 0204 004h] Output Base : 00000000 -[0D0h 0208 004h] Output Reference : 00000048 -[0D4h 0212 004h] Flags (decoded below) : 00000000 +[098h 0152 004h] Input base : 00000000 +[09Ch 0156 004h] ID Count : 000001FF +[0A0h 0160 004h] Output Base : 00000000 +[0A4h 0164 004h] Output Reference : 00000030 +[0A8h 0168 004h] Flags (decoded below) : 00000000 Single Mapping : 0 -[0D8h 0216 004h] Input base : 00001000 -[0DCh 0220 004h] ID Count : 000000FF -[0E0h 0224 004h] Output Base : 00001000 -[0E4h 0228 004h] Output Reference : 00000048 -[0E8h 0232 004h] Flags (decoded below) : 00000000 +[0ACh 0172 004h] Input base : 00001000 +[0B0h 0176 004h] ID Count : 000000FF +[0B4h 0180 004h] Output Base : 00001000 +[0B8h 0184 004h] Output Reference : 00000030 +[0BCh 0188 004h] Flags (decoded below) : 00000000 Single Mapping : 0 -[0ECh 0236 004h] Input base : 00000200 -[0F0h 0240 004h] ID Count : 00000DFF -[0F4h 0244 004h] Output Base : 00000200 -[0F8h 0248 004h] Output Reference : 00000030 -[0FCh 0252 004h] Flags (decoded below) : 00000000 - Single Mapping : 0 +Raw Table Data: Length 192 (0xC0) -[100h 0256 004h] Input base : 00001100 -[104h 0260 004h] ID Count : 0000EEFF -[108h 0264 004h] Output Base : 00001100 -[10Ch 0268 004h] Output Reference : 00000030 -[110h 0272 004h] Flags (decoded below) : 00000000 - Single Mapping : 0 - -Raw Table Data: Length 276 (0x114) - - 0000: 49 4F 52 54 14 01 00 00 05 4A 42 4F 43 48 53 20 // IORT.....JBOCHS + 0000: 49 4F 52 54 C0 00 00 00 05 1C 42 4F 43 48 53 20 // IORT......BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC - 0020: 01 00 00 00 03 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0040: 01 00 00 00 00 00 00 00 04 58 00 04 01 00 00 00 // .........X...... - 0050: 01 00 00 00 44 00 00 00 00 00 05 09 00 00 00 00 // ....D........... - 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0070: 00 00 00 00 6A 00 00 00 6B 00 00 00 6D 00 00 00 // ....j...k...m... - 0080: 6C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // l............... - 0090: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 00A0: 02 74 00 03 02 00 00 00 04 00 00 00 24 00 00 00 // .t..........$... - 00B0: 01 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 // ................ - 00C0: 40 00 00 00 00 00 00 00 FF 01 00 00 00 00 00 00 // @............... - 00D0: 48 00 00 00 00 00 00 00 00 10 00 00 FF 00 00 00 // H............... - 00E0: 00 10 00 00 48 00 00 00 00 00 00 00 00 02 00 00 // ....H........... - 00F0: FF 0D 00 00 00 02 00 00 30 00 00 00 00 00 00 00 // ........0....... - 0100: 00 11 00 00 FF EE 00 00 00 11 00 00 30 00 00 00 // ............0... - 0110: 00 00 00 00 // .... + 0020: 01 00 00 00 02 00 00 00 30 00 00 00 00 00 00 00 // ........0....... + 0030: 04 44 00 04 00 00 00 00 00 00 00 00 00 00 00 00 // .D.............. + 0040: 00 00 05 09 00 00 00 00 01 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 6A 00 00 00 // ............j... + 0060: 6B 00 00 00 6D 00 00 00 6C 00 00 00 00 00 00 00 // k...m...l....... + 0070: 00 00 00 00 02 4C 00 03 01 00 00 00 02 00 00 00 // .....L.......... + 0080: 24 00 00 00 01 00 00 00 00 00 00 03 00 00 00 00 // $............... + 0090: 00 00 00 00 40 00 00 00 00 00 00 00 FF 01 00 00 // ....@........... + 00A0: 00 00 00 00 30 00 00 00 00 00 00 00 00 10 00 00 // ....0........... + 00B0: FF 00 00 00 00 10 00 00 30 00 00 00 00 00 00 00 // ........0....... Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 months ago
Mohamed Mediouni	eb1c60997c	qtest: hw/arm: virt: skip ACPI test for IORT with GICv2 Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2 months ago
Yodel Eldar	a3e0783a87	tests/.../reverse_debugging: Remove unsatisfiable condition get_qemu_img() already skips the test if qemu-img is not found and does not return None. Eliminate the check for None on its result, and the unreachable skipTest() gated by it. Signed-off-by: Yodel Eldar <yodel.eldar@yodel.dev> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20260203182153.75276-1-yodel.eldar@yodel.dev> Signed-off-by: Thomas Huth <thuth@redhat.com>	2 months ago
Richard Henderson	e4dad5f55f	tests/tcg/or1k: Rename from openrisc Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Stafford Horne <shorne@gmail.com> Message-ID: <20260205030244.266447-5-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	2 months ago
Daniel Henrique Barboza	03f1049bc5	riscv64/test_boston.py: fix intermitent test timeout The recently added Boston MIPS board selftest times out consistently in a machine running 'make check-functional' with -j 16: 18/18 func-thorough+func-riscv64-thorough+thorough - qemu:func-riscv64-boston TIMEOUT 120.09s killed by signal 15 SIGTERM The reason is quite boring: it is testing too much stuff. Note that functional tests aren't supposed to be used as stress tests, e.g. it doesn't have to test every single corner case that might hit the board. It is supposed to catch most common user ooopsies. A timeout, in this context, is most likely to be considered something abnormal slowing down the emulation, not a lack of CPU horsepower to run all the tests before timeout. Some of the tests claim to test odd CPU SMP numbers to either "ensures proper core distribution across clusters" or "validating proper handling of larger asymmetric SMP configurations". But there's no SMP/NUMA check made anywhere after boot, so in the end we're just testing whether the board is able to boot with 7/35 CPUs. As far as these tests are concerned we could have a completely broken, but bootable, SMP topology with 7/35 CPUS, and we're oblivious about it. Remove the 7 and 35 SMP tests, keeping the minimal CPUs (2) and maximum (64) tests. With these changes we're now able to run the test with a good TIMEOUT margin: 17/18 func-thorough+func-riscv64-thorough+thorough - qemu:func-riscv64-boston OK 61.28s 3 subtests passed Fixes: `e71111e26b` ("test/functional: Add test for boston-aia board") Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Djordje Todorovic <Djordje.Todorovic@htecgroup.com> Message-ID: <20260126174534.9860-1-daniel.barboza@oss.qualcomm.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>	2 months ago
Philippe Mathieu-Daudé	6fcfe360dc	hw/i386/pc: Remove deprecated pc-q35-2.7 and pc-i440fx-2.7 machines These machines has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit `ce80c4fa6f` "docs: document special exception for machine type deprecation & removal") they can now be removed. Remove the qtest in test-x86-cpuid-compat.c file. Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20260108033051.777361-21-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>	3 months ago
Zhao Liu	9b65a1dbc1	tests/acpi: Update DSDT tables for pc & q35 machines Now the legacy cpu hotplug way has gone away, and there's no _INIT method in DSDT table for modern cpu hotplug support. Update DSDT tables for pc machine, and_INIT methods are removed from DSDT tables: - Method (_INI, 0, Serialized) // _INI: Initialize - { - CSEL = Zero - } Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Link: https://lore.kernel.org/r/20260108033051.777361-8-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>	3 months ago
Igor Mammedov	0a07b71f20	tests/acpi: Allow DSDT table change for x86 machines Before dropping legacy CPU hotplug code, mark and allow the affected ACPI tables, to avoid breaking ACPI table testing. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20260108033051.777361-3-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>	3 months ago
Igor Mammedov	66cf169e29	q35: Fix migration of SMRAM state When migrating, dst QEMU by default has SMRAM unlocked, and since wmask is not migrated, the migrated value of MCH_HOST_BRIDGE_F_SMBASE in config space fall to prey of mch_update_smbase_smram() ... if (pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] == 0xff) { *reg = 0x00; and is getting cleared and leads to unlocked smram on dst even if on source it's been locked. As Andrey has pointed out [1], we should derive wmask from config and not other way around. Drop offending chunk and resync wmask based on MCH_HOST_BRIDGE_F_SMBASE register value. That would preserve the register during migration and set smram regions into corresponding state. What that changes is: that it would let guest write junk values in register (with no apparent effect) until it's stumbles upon reserved 0x1 [\|] 0x2 values, at which point it would be only possible to lock register and trigger switch to SMRAM blackhole in CPU AS. While at it, fix up test by removing junk discard before negotiation hunk. PS2: Instead of adding a dedicated post_load handler for it, reuse mch_update->mch_update_smbase_smram call chain that is called on write/reset/post_load to be consistent with how we handle mch registers. PS3: for prosterity here is erro message Andrey got due to this bug: qemu: vfio_container_dma_map(0x..., 0x0, 0xa0000, 0x....) = -22 (Invalid argument) qemu: hardware error: vfio: DMA mapping failed, unable to continue 1) https://patchew.org/QEMU/20251203180851.6390-1-arbn@yandex-team.com/ Fixes: `f404220e27` ("q35: implement 128K SMRAM at default SMBASE address") Reported-by: Andrey Ryabinin <arbn@yandex-team.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Andrey Ryabinin <arbn@yandex-team.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20251211165454.288476-1-imammedo@redhat.com>	4 months ago

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12200 Commits (7ddd3aca5f2efcf6aae10f836011e445ee77a6e1)