riscv/qemu - qemu - Gitea: Git with a cup of tea

Commit Graph

Author	SHA1	Message	Date
Markus Armbruster	d27340ff8a	qga: Remove trivial "Returns:" sections The QAPI doc generator recently started to auto-generate return documentation when there is no "Returns:" section (commit `636c96cd77` "qapi: Fix undocumented return values by generating something"). Remove "Returns:" sections where the auto-generated text is obviously no worse. For instance, guest-info's documentation changes from Return: GuestAgentInfo -- GuestAgentInfo to Return: GuestAgentInfo The auto-generated returns all are in the exact same spot. We did this for qapi/ in commit `0462da9d6b` (qapi: remove trivial "Returns:" sections). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250717115246.3830007-3-armbru@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>	9 months ago
Markus Armbruster	bb743978f0	qga: Fix guest-network-get-route return value documentation Tagged sections are only recognized at the beginning of a paragraph. guest-network-get-route's Returns: isn't, and therefore gets rendered as ordinary text within its paragraph: Retrieve information about route of network. Returns: List of route info of guest. Since there is no (recognized) Returns: section, the doc generator adds Return: [GuestNetworkRoute] Note: only since recent commit `636c96cd77` (qapi: Fix undocumented return values by generating something). Insert the required blank line so that Returns: is recognized. Result: Retrieve information about route of network. Return: [GuestNetworkRoute] -- List of route info of guest. Fixes: commit `8e326d36dd` (qga/linux: Add new api 'guest-network-get-route') Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250717115246.3830007-2-armbru@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>	9 months ago
Alex Bennée	cac08383f0	tests/functional: expose sys.argv to unittest.main With this we can call the supported we can take advantage of the argument the module supports: env PYTHONPATH=/home/alex/lsrc/qemu.git/python:/home/alex/lsrc/qemu.git/tests/functional ./pyvenv/bin/python /home/alex/lsrc/qemu.git/tests/functional/test_aarch64_kvm.py --help usage: test_aarch64_kvm.py [-h] [-v] [-q] [--locals] [--durations N] [-f] [-c] [-b] [-k TESTNAMEPATTERNS] [tests ...] positional arguments: tests a list of any number of test modules, classes and test methods. options: -h, --help show this help message and exit -v, --verbose Verbose output -q, --quiet Quiet output --locals Show local variables in tracebacks --durations N Show the N slowest test cases (N=0 for all) -f, --failfast Stop on first fail or error -c, --catch Catch Ctrl-C and display results so far -b, --buffer Buffer stdout and stderr during tests -k TESTNAMEPATTERNS Only run tests which match the given substring Examples: test_aarch64_kvm.py test_module - run tests from test_module test_aarch64_kvm.py module.TestClass - run tests from module.TestClass test_aarch64_kvm.py module.Class.test_method - run specified test method test_aarch64_kvm.py path/to/test_file.py - run tests from test_file.py usage: test_aarch64_kvm.py discover [-h] [-v] [-q] [--locals] [--durations N] [-f] [-c] [-b] [-k TESTNAMEPATTERNS] [-s START] [-p PATTERN] [-t TOP] options: -h, --help show this help message and exit -v, --verbose Verbose output -q, --quiet Quiet output --locals Show local variables in tracebacks --durations N Show the N slowest test cases (N=0 for all) -f, --failfast Stop on first fail or error -c, --catch Catch Ctrl-C and display results so far -b, --buffer Buffer stdout and stderr during tests -k TESTNAMEPATTERNS Only run tests which match the given substring -s, --start-directory START Directory to start discovery ('.' default) -p, --pattern PATTERN Pattern to match tests ('test*.py' default) -t, --top-level-directory TOP Top level directory of project (defaults to start directory) For test discovery all test modules must be importable from the top level directory of the project. Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-15-alex.bennee@linaro.org>	8 months ago
Alex Bennée	6da616bb17	tests/docker: handle host-arch selection for all-test-cross When building on non-x86 we get a bunch but not all of the compilers. Handle this in the Dockerfile by probing the arch and expanding the list available. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-14-alex.bennee@linaro.org>	8 months ago
Alex Bennée	408c862910	tests/docker: add --arch-only to qemu deps for all-test-cross If we want to build this container on non-x86 systems we might not have all the cross-compilers needed for the ROM blobs we don't actually build. Use --arch-only to avoid stalling on these missing bits. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-13-alex.bennee@linaro.org>	8 months ago
Alex Bennée	25aaf0cb7f	tests/tcg: reduce the number of plugin tests combinations As our set of multiarch tests has grown the practice of running every plugin with every test is becoming unsustainable. If we switch to ensuring every test gets run with at least one plugin we can speed things up. Some plugins do need to be run with specific tests (for example the memory instrumentation test). We can handle this by manually adding them to EXTRA_RUNS. We also need to wrap rules in a CONFIG_PLUGIN test so we don't enable the runs when plugins are not enabled. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-12-alex.bennee@linaro.org>	8 months ago
Alex Bennée	d0aa5df775	configure: expose PYTHON to test/tcg/config-host.mak This will be useful for making $shell calls to something more flexible than the shell builtins. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-11-alex.bennee@linaro.org>	8 months ago
Alex Bennée	ab8bf8f6e4	tests/tcg: don't include multiarch tests if not supported We are about to change the way the plugin runs are done and having this included by default will complicate things. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-10-alex.bennee@linaro.org>	8 months ago
Alex Bennée	a80e2c26f1	tests/tcg: remove ADDITIONAL_PLUGINS_TESTS We never actually used this is the end. Remove it to enable re-factoring. Fixes: `7cefff22d5` (tests/tcg: add mechanism to run specific tests with plugins) Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-9-alex.bennee@linaro.org>	8 months ago
Alex Bennée	78029e9283	tests/tcg: skip libsyscall.so on softmmu tests It isn't testing anything and just expanding the runtime of testing. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-8-alex.bennee@linaro.org>	8 months ago
Alex Bennée	ebbc04adbb	tests/functional: add hypervisor test for aarch64 This is a simple test case that runs an image with kvmtool and kvm-unit-tests which can validate virtualisation works. This is useful for exercising TCG but can also be applied to any nested virt setup which is why it doesn't specify an accelerator. Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-7-alex.bennee@linaro.org>	8 months ago
Alex Bennée	f1f25eed03	docs/user: expand section on threading Potentially too many weasel words when describing atomic and memory order issues. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-6-alex.bennee@linaro.org>	8 months ago
Alex Bennée	bd0eb9b0cd	docs/user: slightly reword section on system calls Expand the description slightly and quote ioctl(). I did ponder mentioning something about why DRM ioctls are often missing but I see we have the I915 ones so I guess its just no one has done them. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-5-alex.bennee@linaro.org>	8 months ago
Alex Bennée	1ab41da6bb	docs/user: clean up headings This was a slightly duff format for rst, make it use proper headings. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-4-alex.bennee@linaro.org>	8 months ago
Alex Bennée	9b6656668f	docs/system: reword the TAP notes to remove tarball ref We don't ship the tarball and users should generally look to the distribution specific packaging. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/560 Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-3-alex.bennee@linaro.org>	8 months ago
Alex Bennée	8d6c7de1cc	docs/user: clarify user-mode expects the same OS While we somewhat cover this later when we talk about supported operating systems make it clear in the front matter. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-2-alex.bennee@linaro.org>	8 months ago
Peter Maydell	e35215db40	linux-user/aarch64: Support ZT_MAGIC signal frame record FEAT_SME2 adds the ZT0 register, whose contents may need to be preserved and restored on signal handler entry and exit. This is done with a new ZT_MAGIC record. We forgot to implement support for this in our linux-user code before enabling the SME2p1 emulation, which meant that a signal handler using SME would corrupt the ZT0 register value, and code that attempted to unwind an exception from inside a signal handler would not work. Add the missing record handling. Fixes: `7b1613a102` ("target/arm: Enable FEAT_SME2p1 on -cpu max") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250725175510.3864231-4-peter.maydell@linaro.org>	8 months ago
Peter Maydell	99870aff90	linux-user/aarch64: Support TPIDR2_MAGIC signal frame record FEAT_SME adds the TPIDR2 userspace-accessible system register, which is used as part of the procedure calling standard's lazy saving scheme for the ZA registers: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#66the-za-lazy-saving-scheme The Linux kernel has a signal frame record for saving and restoring this value when calling signal handlers, but we forgot to implement this. The result is that code which tries to unwind an exception out of a signal handler will not work correctly. Add support for the missing record. Cc: qemu-stable@nongnu.org Fixes: `78011586b9` ("target/arm: Enable SME for user-only") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250725175510.3864231-3-peter.maydell@linaro.org>	8 months ago
Peter Maydell	3cdd990aa9	linux-user/aarch64: Clear TPIDR2_EL0 when delivering signals A recent change to the kernel (Linux commit b376108e1f88 "arm64/fpsimd: signal: Clear TPIDR2 when delivering signals") updated the signal-handler entry code to always clear TPIDR2_EL0. This is necessary for the userspace ZA lazy saving scheme to work correctly when unwinding exceptions across a signal boundary. (For the essay-length description of the incorrect behaviour and why this is the correct fix, see the commit message for the kernel commit.) Make QEMU also clear TPIDR2_EL0 on signal entry, applying the equivalent bugfix to our implementation. Note that getting this unwinding to work correctly also requires changes to the userspace code, e.g. as implemented in gcc in https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b5ffc8e75a8 This change is technically an ABI change; from the kernel's point of view SME was never enabled (it was hidden behind CONFIG_BROKEN) before the change. From QEMU's point of view our SME-related signal handling was broken anyway as we weren't saving and restoring TPIDR2_EL0. Cc: qemu-stable@nongnu.org Fixes: `78011586b9` ("target/arm: Enable SME for user-only") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250725175510.3864231-2-peter.maydell@linaro.org>	8 months ago
Paolo Bonzini	feea87cd6b	target/i386: fix width of third operand of VINSERTx128 Table A-5 of the Intel manual incorrectly lists the third operand of VINSERTx128 as Wqq, but it is actually a 128-bit value. This is visible when W is a memory operand close to the end of the page. Fixes the recently-added poly1305_kunit test in linux-next. (No testcase yet, but I plan to modify test-avx2 to use memory close to the end of the page. This would work because the test vectors correctly have the memory operand as xmm2/m128). Reported-by: Eric Biggers <ebiggers@kernel.org> Tested-by: Eric Biggers <ebiggers@kernel.org> Cc: Ard Biesheuvel <ardb@kernel.org> Cc: "Jason A. Donenfeld" <Jason@zx2c4.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: qemu-stable@nongnu.org Fixes: `7906847768` ("target/i386: reimplement 0x0f 0x3a, add AVX", 2022-10-18) Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>	8 months ago
Paolo Bonzini	fbc8fb36e3	scripts: add script to help distros use global Rust packages Some distros prefer to avoid vendored crate sources, and instead use local sources from e.g. ``/usr/share/cargo/registry``. Add a script, inspired by the Mesa spec file(), that automatically performs this task. The script is meant to be invoked after unpacking the QEMU tarball. () This is the hack that Mesa uses: export MESON_PACKAGE_CACHE_DIR="%{cargo_registry}/" %define inst_crate_nameversion() %(basename %{cargo_registry}/%{1}-) %define rewrite_wrap_file() sed -e "/source./d" -e "s/%{1}-.*/%{inst_crate_nameversion %{1}}/" -i subprojects/%{1}.wrap %rewrite_wrap_file proc-macro2 ... more %rewrite_wrap_file invocations follow ... Reviewed-by: Neal Gompa <ngompa@fedoraproject.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>	8 months ago
Stefan Hajnoczi	c017386f28	target-arm queue: * Fix various bugs in SMEp/SVE2p1 load/store handling * hw/arm/smmu-common: Avoid using inlined functions with external linkage * target/arm: hvf: stubbing reads to LORC_EL1 -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmiDbRIZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3sifD/9uJRrZ0o/PQfRVIYl7vIFE MjUl6sncznX1zk/B7xNuiJ5KDoziQm/L3KPcb0JPoqhO3nLeqvLIvfmB6W85cV/w OD0PFnL1inuxWf1rKdeheGtyZ0R9Ep3BFzB6NJMDxVJC9aP0eqfGxVo2BCdydv/9 m3v7gCkp/lj5LcpJ+8w0bEzuqT3xzcbibFdFi4eKBiG5P3OvwGv3Kt+FhOISXcBe cU+RpXEkd0MBusOWq1OXLgWS+IPx/e67l1ehxAfVztxFUI3gwej7JgLCnIIoxRsw EWGQYhSSg6QE8h2TknxDKj9jmMcqnjluRjaefPQS8BxbYc6s6dsSBCxbeZJ/zNyJ gD/ymK/nayTBfoP+S7eWGDaldNv/AnKSWa28GEpi3dmDDfKlwRB77arGU2zXirjo dG/0tcg+G7mmkSH5BbPJfFJgjUqEu+D2wq1wm53SSb/AqK8BL4ODF3LE6r6+65ft fg5nalDbn2uTa90M7BHfaGEJj0hdP8xM9wmRHCoJ1LEDieSsjInZWwIbSwQBL6Rc Rr2PmnTWdMKuyr9WgOBzFfCAzmFDwJmqlIqRIRHPKo21xAiGYh8oTp31MhgZWdaj yK+V9t5Mznp1PVfL5xYwe/xG1CmKE6FKOwuvF3RkTF5lBU88x9fIcPOjaWZymW4n iqkUZmp+nS9K3V4WWjGxnQ== =quq9 -----END PGP SIGNATURE----- Merge tag 'pull-target-arm-20250725' of https://gitlab.com/pm215/qemu into staging target-arm queue: * Fix various bugs in SMEp/SVE2p1 load/store handling * hw/arm/smmu-common: Avoid using inlined functions with external linkage * target/arm: hvf: stubbing reads to LORC_EL1 # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmiDbRIZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3sifD/9uJRrZ0o/PQfRVIYl7vIFE # MjUl6sncznX1zk/B7xNuiJ5KDoziQm/L3KPcb0JPoqhO3nLeqvLIvfmB6W85cV/w # OD0PFnL1inuxWf1rKdeheGtyZ0R9Ep3BFzB6NJMDxVJC9aP0eqfGxVo2BCdydv/9 # m3v7gCkp/lj5LcpJ+8w0bEzuqT3xzcbibFdFi4eKBiG5P3OvwGv3Kt+FhOISXcBe # cU+RpXEkd0MBusOWq1OXLgWS+IPx/e67l1ehxAfVztxFUI3gwej7JgLCnIIoxRsw # EWGQYhSSg6QE8h2TknxDKj9jmMcqnjluRjaefPQS8BxbYc6s6dsSBCxbeZJ/zNyJ # gD/ymK/nayTBfoP+S7eWGDaldNv/AnKSWa28GEpi3dmDDfKlwRB77arGU2zXirjo # dG/0tcg+G7mmkSH5BbPJfFJgjUqEu+D2wq1wm53SSb/AqK8BL4ODF3LE6r6+65ft # fg5nalDbn2uTa90M7BHfaGEJj0hdP8xM9wmRHCoJ1LEDieSsjInZWwIbSwQBL6Rc # Rr2PmnTWdMKuyr9WgOBzFfCAzmFDwJmqlIqRIRHPKo21xAiGYh8oTp31MhgZWdaj # yK+V9t5Mznp1PVfL5xYwe/xG1CmKE6FKOwuvF3RkTF5lBU88x9fIcPOjaWZymW4n # iqkUZmp+nS9K3V4WWjGxnQ== # =quq9 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Jul 2025 07:40:02 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250725' of https://gitlab.com/pm215/qemu: target/arm: hvf: stubbing reads to LORC_EL1 hw/arm/smmu-common: Avoid using inlined functions with external linkage target/arm: Fix LD1W, LD1D to 128-bit elements target/arm: Pass correct esize to sve_st1_z() for LD1Q, ST1Q target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector decodetree: Infer argument set before inferring format target/arm: Pack mtedesc into upper 32 bits of descriptor target/arm: Expand the descriptor for SME/SVE memory ops to i64 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>	8 months ago
Stefan Hajnoczi	d3c9de45b2	Pull request This commit is still worth having in QEMU 10.1 for the all-round improvements made (consistent timestamping, binary size reduction, header pollution cleanup) even if it's debatable whether this is a bug fix. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAmiCR0UACgkQnKSrs4Gr c8g4AggAyBo1oNAVSMQIC6JRRcLrVBCWGPWVyU1/3AaayKLy8egs1pImmT09DcdQ D2CHCjEp0xbTzFlN3YiBymAOeq/a73G7NPzWdCi/PY1qBmB4td8Eli/tBoQUYvmE k0a0r6DrOo6vGddCqv6fAKnvamcs/IB2ogzpqLVLCC4oAP6TVG0LeHsaqTAtO8bv yZb+1YQxFZtum2yp9I4+mk8c1R04cCdDL17TRCrv4hTkpGRYfaDs8LRy5yJ4Nw6V AID3fkLTaxOcQpb2EItfcoGalF/JcCdZoOlJ/91clJ1MWFAnV9Y9gBZtlSF4dx+k c2rTlcBw9j402imuotLOP7Cl8mLNeg== =lXaI -----END PGP SIGNATURE----- Merge tag 'tracing-pull-request' of https://gitlab.com/stefanha/qemu into staging Pull request This commit is still worth having in QEMU 10.1 for the all-round improvements made (consistent timestamping, binary size reduction, header pollution cleanup) even if it's debatable whether this is a bug fix. # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAmiCR0UACgkQnKSrs4Gr # c8g4AggAyBo1oNAVSMQIC6JRRcLrVBCWGPWVyU1/3AaayKLy8egs1pImmT09DcdQ # D2CHCjEp0xbTzFlN3YiBymAOeq/a73G7NPzWdCi/PY1qBmB4td8Eli/tBoQUYvmE # k0a0r6DrOo6vGddCqv6fAKnvamcs/IB2ogzpqLVLCC4oAP6TVG0LeHsaqTAtO8bv # yZb+1YQxFZtum2yp9I4+mk8c1R04cCdDL17TRCrv4hTkpGRYfaDs8LRy5yJ4Nw6V # AID3fkLTaxOcQpb2EItfcoGalF/JcCdZoOlJ/91clJ1MWFAnV9Y9gBZtlSF4dx+k # c2rTlcBw9j402imuotLOP7Cl8mLNeg== # =lXaI # -----END PGP SIGNATURE----- # gpg: Signature made Thu 24 Jul 2025 10:46:29 EDT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [ultimate] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [ultimate] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * tag 'tracing-pull-request' of https://gitlab.com/stefanha/qemu: log: make '-msg timestamp=on' apply to all qemu_log usage Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>	8 months ago
Stefan Hajnoczi	92ac518223	ppc queue: * Update maintainers -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmiCMyUACgkQUaNDx8/7 7KEfqhAAvyOcR8r2bFfbLcOXWnHLgh+zjO5WlJpofMdktKK+AkzDK3oRZJHi8KtH Xu+F68F2Qt2AFZC7K4ddI/6hT+ki78yTUCSCVr73YTa+R94iHlOIWn/8CaQJjNjU FZPRIGQuGg5kNw0IJQj4qqo0qk77v2mkLhi0nuQ69mjuiCnydr2UWDrkaNCP9qtx WwhcneTK5UIwelowWVBpV3E6aH8jo1psj9PyIn11nBaLmriFtcu4Uz1X3WG6ydxW AKDDD5hBom9SwRMlKPNJjRqZ5ydDdMkgmRSrCCMWSv0m5wdvzbA3pqTPkl5Cc/o5 IH8m/YAlF5mGAHbIBryys0OnCqMd7AiYjCdVrP14qc/Ccrar61v8rBMQo24qUDcB NF6+4MlbgYMqns79VJftu7s/DI4p4R9cJmkInKNFGlpVIaDHYhENz3KTTszlntp2 aV8fILK9oFpoQllgtFuSx89Ay2DG8kqU/D8OKR6haHXwdaFaKGMSyB+hoZ9+Iv3R LNne5hGKr6p0j6k0kyIAXi11KS1i0mOg+Eha+v0fLqRqsIPt1Nt7ysRbxV+Yf6zc zsxK4CR98FERKSlBbNtMU2sb3AJRamdX35+cGG8/lWq+RK5RbweCMBgHktLFW5/8 BXPF2Ju0fZk5kvhxoJ0qg9SRU6t4C6kApSa/buKj22Ix/41KpWI= =bWN6 -----END PGP SIGNATURE----- Merge tag 'pull-ppc-20250724' of https://github.com/legoater/qemu into staging ppc queue: * Update maintainers # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmiCMyUACgkQUaNDx8/7 # 7KEfqhAAvyOcR8r2bFfbLcOXWnHLgh+zjO5WlJpofMdktKK+AkzDK3oRZJHi8KtH # Xu+F68F2Qt2AFZC7K4ddI/6hT+ki78yTUCSCVr73YTa+R94iHlOIWn/8CaQJjNjU # FZPRIGQuGg5kNw0IJQj4qqo0qk77v2mkLhi0nuQ69mjuiCnydr2UWDrkaNCP9qtx # WwhcneTK5UIwelowWVBpV3E6aH8jo1psj9PyIn11nBaLmriFtcu4Uz1X3WG6ydxW # AKDDD5hBom9SwRMlKPNJjRqZ5ydDdMkgmRSrCCMWSv0m5wdvzbA3pqTPkl5Cc/o5 # IH8m/YAlF5mGAHbIBryys0OnCqMd7AiYjCdVrP14qc/Ccrar61v8rBMQo24qUDcB # NF6+4MlbgYMqns79VJftu7s/DI4p4R9cJmkInKNFGlpVIaDHYhENz3KTTszlntp2 # aV8fILK9oFpoQllgtFuSx89Ay2DG8kqU/D8OKR6haHXwdaFaKGMSyB+hoZ9+Iv3R # LNne5hGKr6p0j6k0kyIAXi11KS1i0mOg+Eha+v0fLqRqsIPt1Nt7ysRbxV+Yf6zc # zsxK4CR98FERKSlBbNtMU2sb3AJRamdX35+cGG8/lWq+RK5RbweCMBgHktLFW5/8 # BXPF2Ju0fZk5kvhxoJ0qg9SRU6t4C6kApSa/buKj22Ix/41KpWI= # =bWN6 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 24 Jul 2025 09:20:37 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20250724' of https://github.com/legoater/qemu: MAINTAINERS: remove myself as ppc maintainer/reviewer MAINTAINERS: Remove Frédéric as reviewer MAINTAINERS: Add myself as a reviewer for XIVE MAINTAINERS: Add myself as a reviewer of PowerNV emulation MAINTAINERS: Add myself as reviewer for PowerPC TCG CPUs MAINTAINERS: Adding myself as reviewer for PPC KVM cpus. MAINTAINERS: Adding myself as a co-maintainer for ppc/spapr Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>	8 months ago
Stefan Hajnoczi	919c486c40	Migration pull request - Fixes to postcopy blocktime latency display code - Fix to QMP error message (not)shown when postcopy fails - Workaround to a GNUTLS bug that crashes QEMU -----BEGIN PGP SIGNATURE----- iQJEBAABCAAuFiEEqhtIsKIjJqWkw2TPx5jcdBvsMZ0FAmiAG1wQHGZhcm9zYXNA c3VzZS5kZQAKCRDHmNx0G+wxnR0xEACZMIqnVIFUu57V5gJ8v/4IJv70n6jrjtzJ 5/TzdAAY9bKJE5y84axovZy4iHijbZnGz+kVKr5Wai9KKb41tW0liWAe5RART2TE VuRBgxXODCmg3US6w0niy9cR3NH7WXbEQ5gyexC7D3/1R1ahpqOragZQxzvtA+3e aKe2pqRyQODHU9D1tnKexeFNJM6dGBVd9FVsYAHDfhx0Bk1vcpVXVrAJcfaSY2Y5 +4/g7CXOJCUFBrFbVxYFU9muU8JrMvWv8lU4nG2ztDhmSH7Uy/DVCfEUa9/jEjDa 1BwZbOIIFMJy0P/G3toK6Z9lJEVfiUXaboNtqgSK5ZM8ZL1L1yHKQi631Qny/Wuf pzJWR1nOSL2f/bsueWj2OmZKl3FpXcaDWisZuDeS3wXWrtPRuJEXi6f//6JcYd2i Zm0kVRNf3CbXGnJxwDrsbh0hr5sN+bonaI+N4hHGxDCqUHhND4p0JMaPMte+PF4u pOooaRKq2a6KRZFyDPjyBgESXfDJ0Tdw5IeOKbFPskOEIpBVxyc3mpwu8Kz45qoV 8b2GYCKBjWLpqfTPwUcJd5MNVDO1ZUyqOPuarHNADth6pJglnWyFI/TIBoARzAKB EzS4dQ+DKM/Jz5cM++0dMPL75/1i2q2x7BBhCBBm9yeZDqDIKeT07yl8JGL/OCq9 7gNGfyze5w== =DGn2 -----END PGP SIGNATURE----- Merge tag 'migration-20250722-pull-request' of https://gitlab.com/farosas/qemu into staging Migration pull request - Fixes to postcopy blocktime latency display code - Fix to QMP error message (not)shown when postcopy fails - Workaround to a GNUTLS bug that crashes QEMU # -----BEGIN PGP SIGNATURE----- # # iQJEBAABCAAuFiEEqhtIsKIjJqWkw2TPx5jcdBvsMZ0FAmiAG1wQHGZhcm9zYXNA # c3VzZS5kZQAKCRDHmNx0G+wxnR0xEACZMIqnVIFUu57V5gJ8v/4IJv70n6jrjtzJ # 5/TzdAAY9bKJE5y84axovZy4iHijbZnGz+kVKr5Wai9KKb41tW0liWAe5RART2TE # VuRBgxXODCmg3US6w0niy9cR3NH7WXbEQ5gyexC7D3/1R1ahpqOragZQxzvtA+3e # aKe2pqRyQODHU9D1tnKexeFNJM6dGBVd9FVsYAHDfhx0Bk1vcpVXVrAJcfaSY2Y5 # +4/g7CXOJCUFBrFbVxYFU9muU8JrMvWv8lU4nG2ztDhmSH7Uy/DVCfEUa9/jEjDa # 1BwZbOIIFMJy0P/G3toK6Z9lJEVfiUXaboNtqgSK5ZM8ZL1L1yHKQi631Qny/Wuf # pzJWR1nOSL2f/bsueWj2OmZKl3FpXcaDWisZuDeS3wXWrtPRuJEXi6f//6JcYd2i # Zm0kVRNf3CbXGnJxwDrsbh0hr5sN+bonaI+N4hHGxDCqUHhND4p0JMaPMte+PF4u # pOooaRKq2a6KRZFyDPjyBgESXfDJ0Tdw5IeOKbFPskOEIpBVxyc3mpwu8Kz45qoV # 8b2GYCKBjWLpqfTPwUcJd5MNVDO1ZUyqOPuarHNADth6pJglnWyFI/TIBoARzAKB # EzS4dQ+DKM/Jz5cM++0dMPL75/1i2q2x7BBhCBBm9yeZDqDIKeT07yl8JGL/OCq9 # 7gNGfyze5w== # =DGn2 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 22 Jul 2025 19:14:36 EDT # gpg: using RSA key AA1B48B0A22326A5A4C364CFC798DC741BEC319D # gpg: issuer "farosas@suse.de" # gpg: Good signature from "Fabiano Rosas <farosas@suse.de>" [unknown] # gpg: aka "Fabiano Almeida Rosas <fabiano.rosas@suse.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: AA1B 48B0 A223 26A5 A4C3 64CF C798 DC74 1BEC 319D * tag 'migration-20250722-pull-request' of https://gitlab.com/farosas/qemu: crypto: add tracing & warning about GNUTLS countermeasures migration: activate TLS thread safety workaround io: add support for activating TLS thread safety workaround crypto: implement workaround for GNUTLS thread safety problems migration: show error message when postcopy fails migration: HMP: Fix postcopy latency distribution label migration: HMP: Fix possible out-of-bounds access Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>	8 months ago
Mohamed Mediouni	a7aa2af13e	target/arm: hvf: stubbing reads to LORC_EL1 Linux zeroes LORC_EL1 on boot at EL2, without further interaction with FEAT_LOR afterwards. Stub out LORC_EL1 accesses as FEAT_LOR is a mandatory extension on Armv8.1+. Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	8 months ago
JianChunfu	bd52d8bc9e	hw/arm/smmu-common: Avoid using inlined functions with external linkage Similarly to commit `9de9fa5c` ("hw/arm/smmu-common: Avoid using inlined functions with external linkage"): None of our code base require / use inlined functions with external linkage. Some places use internal inlining in the hot path. These two functions are certainly not in any hot path and don't justify any inlining, so these are likely oversights rather than intentional. Fixes: `b8fa4c23` (hw/arm/smmu: Support nesting in the rest of commands) Signed-off-by: JianChunfu <jansef.jian@hj-micro.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	1 year ago
Peter Maydell	7428c46c06	target/arm: Fix LD1W, LD1D to 128-bit elements In our implementation of the SVE2p1 contiguous load to 128-bit element insns such as LD1D (scalar plus scalar, single register), we got the order of the arguments to the DO_LD1_2() macro wrong. Here the first argument is the element size and the second is the memory size, and the element size is always the same size or larger than the memory size. For the 128-bit versions, we want to load either 32-bit or 64-bit values from memory and extend them to the 128-bit vector element, but were trying to load 128 bit values and then stuff them into 32-bit or 64-bit vector elements. Correct the macro ordering. Fixes: `fc5f060bcb` ("target/arm: Implement {LD1, ST1}{W, D} (128-bit element) for SVE2p1") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250723165458.3509150-7-peter.maydell@linaro.org	8 months ago
Peter Maydell	4726be1c69	target/arm: Pass correct esize to sve_st1_z() for LD1Q, ST1Q Our implementation of the helper functions for the LD1Q and ST1Q insns reused the existing DO_LD1_ZPZ_D and DO_ST1_ZPZ_D macros. This passes the wrong esize (8, not 16) to sve_ldl_z(). Create new macros DO_LD1_ZPZ_Q and DO_ST1_ZPZ_Q which pass the correct esize, and use them for the LD1Q and ST1Q helpers. Fixes: `d2aa9a804e` ("target/arm: Implement LD1Q, ST1Q for SVE2p1") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250723165458.3509150-6-peter.maydell@linaro.org	8 months ago
Peter Maydell	1c6aae5efb	target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector Unlike the "LD1D (scalar + vector)" etc instructions, LD1Q is vector + scalar. This means that: * the vector and the scalar register are in opposite fields in the encoding * 31 in the scalar register field is XZR, not XSP The same applies for ST1Q. This means we can't reuse the trans_LD1_zprz() and trans_ST1_zprz() functions for LD1Q and ST1Q. Split them out to use their own trans functions. Note that the change made here to sve.decode requires the decodetree bugfix "decodetree: Infer argument set before inferring format" to avoid a spurious compile-time error about "dtype". Fixes: `d2aa9a804e` ("target/arm: Implement LD1Q, ST1Q for SVE2p1") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250723165458.3509150-5-peter.maydell@linaro.org	8 months ago
Richard Henderson	b79f944e09	decodetree: Infer argument set before inferring format Failure to confirm an argument set first may result in the selection of a format which leaves extra arguments to be filled in by the pattern. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250723165458.3509150-4-peter.maydell@linaro.org Message-id: 20250722183343.273533-1-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	8 months ago
Richard Henderson	aba39946ba	target/arm: Pack mtedesc into upper 32 bits of descriptor Instead of trying to pack mtedesc into the upper 17 bits of a 32-bit gvec descriptor, pass the gvec descriptor in the lower 32 bits and the mte descriptor in the upper 32 bits of a 64-bit operand. This fixes two bugs: (1) in gen_sve_ldr() and gen_sve_str() call gen_mte_checkN() with a length value which is the SVE vector length and can be up to 256 bytes. We don't assert there that it fits in the descriptor, so we would just fail to do the MTE checks on the right length of memory if the VL is more than 32 bytes (2) the new-in-SVE2p1 insns LD3Q, LD4Q, ST3Q, ST4Q also involve transfers of more than 32 bytes of memory. In this case we would assert at translate time. (Note for potential backporting: this commit depends on the previous "target/arm: Expand the descriptor for SME/SVE memory ops to i64".) Fixes: `7b1613a102` ("target/arm: Enable FEAT_SME2p1 on -cpu max") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250723165458.3509150-3-peter.maydell@linaro.org [PMM: expand commit message to clarify that we are fixing bugs here] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	8 months ago
Richard Henderson	0e171b427b	target/arm: Expand the descriptor for SME/SVE memory ops to i64 We have run out of room attempting to pack both the gvec descriptor and the mte descriptor into 32 bits. Here, change nothing except the parameter type, which affects all declarations, the function typedefs, and the type used with tcg expansion. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250723165458.3509150-2-peter.maydell@linaro.org	8 months ago
Michael Tokarev	b8882becd5	hw/display/qxl-render.c: fix qxl_unpack_chunks() chunk size calculation In case of multiple chunks, code in qxl_unpack_chunks() takes size of the wrong (next in the chain) chunk, instead of using current chunk size. This leads to wrong number of bytes being copied, and to crashes if next chunk size is larger than the current one. Based on the code by Gao Yong. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1628 Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Thomas Huth <thuth@redhat.com>	1 year ago
Daniel P. Berrangé	012842c075	log: make '-msg timestamp=on' apply to all qemu_log usage Currently the tracing 'log' back emits special code to add timestamps to trace points sent via qemu_log(). This current impl is a bad design for a number of reasons. * It changes the QEMU headers, such that 'error-report.h' content is visible to all files using tracing, but only when the 'log' backend is enabled. This has led to build failure bugs as devs rarely test without the (default) 'log' backend enabled, and CI can't cover every scenario for every trace backend. * It bloats the trace points definitions which are inlined into every probe location due to repeated inlining of timestamp formatting code, adding MBs of overhead to QEMU. * The tracing subsystem should not be treated any differently from other users of qemu_log. They all would benefit from having timestamps present. * The timestamp emitted with the tracepoints is in a needlessly different format to that used by error_report() in response to '-msg timestamp=on'. This fixes all these issues simply by moving timestamp formatting into qemu_log, using the same approach as for error_report. The code before: static inline void _nocheck__trace_qcrypto_tls_creds_get_path(void * creds, const char * filename, const char * path) { if (trace_event_get_state(TRACE_QCRYPTO_TLS_CREDS_GET_PATH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); qemu_log("%d@%zu.%06zu:qcrypto_tls_creds_get_path " "TLS creds path creds=%p filename=%s path=%s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , creds, filename, path); } else { qemu_log("qcrypto_tls_creds_get_path " "TLS creds path creds=%p filename=%s path=%s" "\n", creds, filename, path); } } } and after: static inline void _nocheck__trace_qcrypto_tls_creds_get_path(void * creds, const char * filename, const char * path) { if (trace_event_get_state(TRACE_QCRYPTO_TLS_CREDS_GET_PATH) && qemu_loglevel_mask(LOG_TRACE)) { qemu_log("qcrypto_tls_creds_get_path " "TLS creds path creds=%p filename=%s path=%s" "\n", creds, filename, path); } } The log and error messages before: $ qemu-system-x86_64 -trace qcrypto* -object tls-creds-x509,id=tls0,dir=$HOME/tls -msg timestamp=on 2986097@1753122905.917608:qcrypto_tls_creds_x509_load TLS creds x509 load creds=0x55d925bd9490 dir=/var/home/berrange/tls 2986097@1753122905.917621:qcrypto_tls_creds_get_path TLS creds path creds=0x55d925bd9490 filename=ca-cert.pem path=<none> 2025-07-21T18:35:05.917626Z qemu-system-x86_64: Unable to access credentials /var/home/berrange/tls/ca-cert.pem: No such file or directory and after: $ qemu-system-x86_64 -trace qcrypto* -object tls-creds-x509,id=tls0,dir=$HOME/tls -msg timestamp=on 2025-07-21T18:43:28.089797Z qcrypto_tls_creds_x509_load TLS creds x509 load creds=0x55bf5bf12380 dir=/var/home/berrange/tls 2025-07-21T18:43:28.089815Z qcrypto_tls_creds_get_path TLS creds path creds=0x55bf5bf12380 filename=ca-cert.pem path=<none> 2025-07-21T18:43:28.089819Z qemu-system-x86_64: Unable to access credentials /var/home/berrange/tls/ca-cert.pem: No such file or directory The binary size before: $ ls -alh qemu-system-x86_64 -rwxr-xr-x. 1 berrange berrange 87M Jul 21 19:39 qemu-system-x86_64 $ strip qemu-system-x86_64 $ ls -alh qemu-system-x86_64 -rwxr-xr-x. 1 berrange berrange 30M Jul 21 19:39 qemu-system-x86_64 and after: $ ls -alh qemu-system-x86_64 -rwxr-xr-x. 1 berrange berrange 85M Jul 21 19:41 qemu-system-x86_64 $ strip qemu-system-x86_64 $ ls -alh qemu-system-x86_64 -rwxr-xr-x. 1 berrange berrange 29M Jul 21 19:41 qemu-system-x86_64 Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Message-id: 20250721185452.3016488-1-berrange@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>	8 months ago
Daniel Henrique Barboza	0fb961e392	MAINTAINERS: remove myself as ppc maintainer/reviewer It has been awhile since I actively did anything for qemu-ppc aside from reading the qemu-ppc inbox a couple of times each month. It's not enough to justify a reviewer role, let alone being a maintainer. Given that we're doing qemu-ppc maintainership changes across the board I'll take the opportunity and remove myself from the premises too. Feel free to reach out with questions about code I did in the past, but at this moment I'm no longer able to keep up with qemu-ppc activities. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250724123416.3115941-1-danielhb413@gmail.com [ clg: Adjusted context ] Signed-off-by: Cédric Le Goater <clg@redhat.com>	8 months ago
Cédric Le Goater	cf8f0f006d	MAINTAINERS: Remove Frédéric as reviewer Frédéric has moved to other tasks within IBM and no longer does QEMU development. Cc: Frédéric Barrat <fbarrat@linux.ibm.com> Acked-by: Frédéric Barrat <fbarrat@linux.ibm.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Link: https://lore.kernel.org/qemu-devel/20250724075916.1593420-1-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	8 months ago
Gautam Menghani	076b4306f9	MAINTAINERS: Add myself as a reviewer for XIVE Proposing myself as a reviewer for XIVE on PPC. I have been looking at XIVE in context of KVM internally at IBM for some time in addition to testing a few XIVE upstream patches; and I'll be closely looking at XIVE going forward. Signed-off-by: Gautam Menghani <gautam@linux.ibm.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250724100623.3071131-6-harshpb@linux.ibm.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	8 months ago
Aditya Gupta	01286ee41e	MAINTAINERS: Add myself as a reviewer of PowerNV emulation Proposing myself as a reviewer in the PowerNV emulation in QEMU Have been working on PowerNV QEMU for sometime, with contributions in Power11, MPIPL and minor fixes and things such as dtb support Cc: Cédric Le Goater <clg@kaod.org> Cc: Frédéric Barrat <fbarrat@linux.ibm.com> Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250724100623.3071131-5-harshpb@linux.ibm.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	8 months ago
Chinmay Rath	884216cf41	MAINTAINERS: Add myself as reviewer for PowerPC TCG CPUs I have been working on Power ISA for a long time now and have mostly contributed in TCG instruction translation area (moved 300+ instructions to decodetree as of yet) and would like to continue contributing to PPC TCG in best possible ways I can. I think it's time to step up and assist in reviewing related patches to enable myself contribute more effectively in this direction. Signed-off-by: Chinmay Rath <rathc@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20250724100623.3071131-4-harshpb@linux.ibm.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	8 months ago
Harsh Prateek Bora	1da3e7f863	MAINTAINERS: Adding myself as reviewer for PPC KVM cpus. Have been contributing in ppc/spapr from tcg/kvm perspective, stepping up to help with patch reviews and get notified of incoming changes. Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250724100623.3071131-3-harshpb@linux.ibm.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	8 months ago
Harsh Prateek Bora	c4103b2797	MAINTAINERS: Adding myself as a co-maintainer for ppc/spapr Have been contributing in ppc/spapr and related areas for quite some time as a contributor and reviewer. I think its time to step up as a co-maintainer to help with maintainer activities. Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250724100623.3071131-2-harshpb@linux.ibm.com Signed-off-by: Cédric Le Goater <clg@redhat.com>	8 months ago
Daniel P. Berrangé	0db6f79802	crypto: add tracing & warning about GNUTLS countermeasures We want some visibility on stderr when the GNUTLS thread safety countermeasures are activated, to encourage people to get the real fix deployed (once it exists). Some trace points will also help if we see any further wierd crash scenario we've not anticipated. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250718150514.2635338-5-berrange@redhat.com [add missing include] Signed-off-by: Fabiano Rosas <farosas@suse.de>	9 months ago
Daniel P. Berrangé	eb3618e9e2	migration: activate TLS thread safety workaround When either the postcopy or return path capabilities are enabled, the migration code will use the primary channel for bidirectional I/O. If either of those capabilities are enabled, the migration code needs to mark the channel as expecting concurrent I/O in order to activate the thread safety workarounds for GNUTLS bug 1717 Closes: https://gitlab.com/qemu-project/qemu/-/issues/1937 Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250718150514.2635338-4-berrange@redhat.com Signed-off-by: Fabiano Rosas <farosas@suse.de>	9 months ago
Daniel P. Berrangé	edea818371	io: add support for activating TLS thread safety workaround Add a QIO_CHANNEL_FEATURE_CONCURRENT_IO feature flag. If this is set on a QIOChannelTLS session object, the TLS session will be marked as requiring thread safety, which will activate the workaround for GNUTLS bug 1717 if needed. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250718150514.2635338-3-berrange@redhat.com Signed-off-by: Fabiano Rosas <farosas@suse.de>	9 months ago
Daniel P. Berrangé	24ad5e1995	crypto: implement workaround for GNUTLS thread safety problems When TLS 1.3 is negotiated on a TLS session, GNUTLS will perform automatic rekeying of the session after 16 million records. This is done for all algorithms except CHACHA20_POLY1305 which does not require rekeying. Unfortunately the rekeying breaks GNUTLS' promise that it is safe to use a gnutls_session_t object concurrently from multiple threads if they are exclusively calling gnutls_record_send/recv. This patch implements a workaround for QEMU that adds a mutex lock around any gnutls_record_send/recv call to serialize execution within GNUTLS code. When GNUTLS calls into the push/pull functions we can release the lock so the OS level I/O calls can at least have some parallelism. The big downside of this is that the actual encryption/decryption code is fully serialized, which will halve performance of that cipher operations if two threads are contending. The workaround is not enabled by default, since most use of GNUTLS in QEMU does not tickle the problem, only non-multifd migration with a return path open is affected. Fortunately the migration code also won't trigger the halving of performance, since only the outbound channel diretion needs to sustain high data rates, the inbound direction is low volume. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250718150514.2635338-2-berrange@redhat.com [add stub for qcrypto_tls_session_require_thread_safety; fix unused var] Signed-off-by: Fabiano Rosas <farosas@suse.de>	9 months ago
Daniel P. Berrangé	eaec556bc8	migration: show error message when postcopy fails The 'info migrate' command only shows the error message when the migration state is 'failed'. When postcopy is used, however, the 'postcopy-paused' state is used instead of 'failed', so we must show the error message there too. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250721133913.2914669-1-berrange@redhat.com [line break to satisfy checkpatch] Signed-off-by: Fabiano Rosas <farosas@suse.de>	8 months ago
Fabiano Rosas	fd1514cbd9	migration: HMP: Fix postcopy latency distribution label Fix the loop condition to avoid having a label with "1000 us" instead of "1 ms". Reported-by: Prasad Pandit <ppandit@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/qemu-devel/20250716182648.30202-3-farosas@suse.de Signed-off-by: Fabiano Rosas <farosas@suse.de>	9 months ago
Fabiano Rosas	2251f9ac92	migration: HMP: Fix possible out-of-bounds access Coverity has caught a bug in the formatting of time intervals for postcopy latency distribution display in 'info migrate'. While bounds checking the labels array, sizeof is incorrectly being used. ARRAY_SIZE is the correct form of obtaining the size of an array. Fixes: `3345fb3b6d` ("migration/postcopy: Add latency distribution report for blocktime") Resolves: Coverity CID 1612248 Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/qemu-devel/20250716182648.30202-2-farosas@suse.de Signed-off-by: Fabiano Rosas <farosas@suse.de>	9 months ago
Stefan Hajnoczi	9e601684dc	Update version for the v10.1.0-rc0 release Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>	8 months ago

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