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${ noResults }
9 Commits (311569185539766c5578edd07541d44930e14741)
| Author | SHA1 | Message | Date |
|---|---|---|---|
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3115691855 |
bswap: Include missing 'qemu/bswap.h' header
All these files indirectly include the "qemu/bswap.h" header. Make this inclusion explicit to avoid build errors when refactoring unrelated headers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260109164742.58041-4-philmd@linaro.org> |
7 months ago |
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823288fc13 |
test/qtest/hace: Support to validate 64-bit hmac key buffer addresses
Added "key" and "key_hi" fields to "AspeedMasks" for 64-bit addresses test. Updated "aspeed_test_addresses" to validate "HACE_HASH_KEY_BUFF" and "HACE_HASH_KEY_BUFF_HI". Ensured correct masking of 64-bit addresses by checking both lower and upper 32-bit registers. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-28-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
1 year ago |
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88d8515fb7 |
test/qtest/hace: Support to test upper 32 bits of digest and source addresses
Added "src_hi" and "dest_hi" fields to "AspeedMasks" for 64-bit addresses test. Updated "aspeed_test_addresses" to validate "HACE_HASH_SRC_HI" and "HACE_HASH_DIGEST_HI". Ensured correct masking of 64-bit addresses by checking both lower and upper 32-bit registers. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-27-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
1 year ago |
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5ced818e42 |
test/qtest/hace: Support 64-bit source and digest addresses for AST2700
Added "HACE_HASH_SRC_HI" and "HACE_HASH_DIGEST_HI", "HACE_HASH_KEY_BUFF_HI" registers to store upper 32 bits. Updated "write_regs" to handle 64-bit source and digest addresses. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-26-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
1 year ago |
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dcdbbd45a8 |
test/qtest/hace: Update source data and digest data type to 64-bit
Currently, the hash data source and digest result buffer addresses are set to 32-bit. However, the AST2700 CPU is a 64-bit Cortex-A35 architecture, and its DRAM base address is also 64-bit. To support AST2700, update the hash data source address and digest result buffer address to use 64-bit addressing. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-25-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
1 year ago |
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3c13be86ba |
test/qtest/hace: Add SHA-384 test cases for ASPEED HACE model
Introduced SHA-384 test functions to verify hashing operations.
Extended support for scatter-gather ("_sg") and accumulation ("_accum") tests.
Updated test result vectors for SHA-384 validation.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Acked-by: Fabiano Rosas <farosas@suse.de>
Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-22-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
|
1 year ago |
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a3e7f6d05d |
test/qtest/hace: Adjust test address range for AST1030 due to SRAM limitations
The digest_addr is set to "src_addr + 0x1000000", where src_addr is the DRAM base address. However, the value 0x1000000 (16MB) is too large because the AST1030 does not support DRAM, and its SRAM size is only 768KB. A range size of 0x10000 (64KB) is sufficient for HACE test cases, as the test vector size does not exceed 64KB. Updates: 1. Direct Access Mode Update digest_addr to "src_addr + 0x10000" in the following functions: aspeed_test_md5 aspeed_test_sha256 aspeed_test_sha512 2. Scatter-Gather (SG) Mode Update source address for different SG buffer addresses in the following functions: src_addr1 = src_addr + 0x10000 src_addr2 = src_addr + 0x20000 src_addr3 = src_addr + 0x30000 digest_addr = src_addr + 0x40000 aspeed_test_sha256_sg aspeed_test_sha512_sg 3. ACC Mode Update Update the SG List start address: src_addr + 0x10000 Update the SG List buffer size to 0x30000 (192KB). buffer_addr = src_addr + 0x10000 digest_addr = src_addr + 0x40000 Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-21-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
1 year ago |
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33627ab237 |
test/qtest/hace: Specify explicit array sizes for test vectors and hash results
To enhance code readability and prevent potential buffer overflows or unintended size assumptions, this commit updates all fixed-size array declarations to use explicit array sizes. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-20-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
1 year ago |
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70985b0ea7 |
test/qtest: Introduce a new aspeed-hace-utils.c to place common testcases
The test cases for the ASPEED HACE model were originally placed in aspeed_hace-test.c. However, this test file only supports ARM32. To enable compatibility with all ASPEED SoCs, including the AST2700, which uses the AArch64 architecture, this update introduces a new source file, aspeed-hace-utils.c. All common APIs and test cases have been moved from aspeed_hace-test.c to aspeed-hace-utils.c to facilitate reuse across different ASPEED SoCs. As a result, these test cases can now be reused for AST2700 and future ASPEED SoC testing. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-19-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
1 year ago |
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907b5105f1 |
tests: move libqtest.h back under qtest/
Since commit
|
4 years ago |
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e0c371a0d2 |
tests/qtest: Add test for Aspeed HACE accumulative mode
This add two addition test cases for accumulative mode under sg enabled. The input vector was manually craft with "abc" + bit 1 + padding zeros + L. The padding length depends on algorithm, i.e. SHA512 (1024 bit), SHA256 (512 bit). The result was calculated by command line sha512sum/sha256sum utilities without padding, i.e. only "abc" ascii text. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Joel Stanley <joel@jms.id.au> [ clg: checkpatch fixes ] Message-Id: <20220426021120.28255-4-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
4 years ago |
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0f9668e0c1 |
Remove qemu-common.h include from most units
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220323155743.1585078-33-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
4 years ago |
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666099520a |
tests/qtest: Add test for Aspeed HACE
This adds a test for the Aspeed Hash and Crypto (HACE) engine. It tests the currently implemented behavior of the hash functionality. The tests are similar, but are cut/pasted instead of broken out into a common function so the assert machinery produces useful output when a test fails. Co-developed-by: Cédric Le Goater <clg@kaod.org> Co-developed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210409000253.1475587-4-joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
5 years ago |