Tree:
1bd0e2d1c4
10.1-testing
99888-virtio-zero-init-c9s
block
coverity
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-10.0
stable-10.1
stable-10.2
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.0-staging
stable-6.1
stable-7.2
stable-7.2-staging
stable-8.0
stable-8.0-staging
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-0.0
staging-10.0
staging-10.1
staging-10.2
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
staging-mjt-test
stsquad-hotfix
tracing
initial
release_0_10_0
release_0_10_1
release_0_10_2
release_0_5_1
release_0_6_0
release_0_6_1
release_0_7_0
release_0_7_1
release_0_8_1
release_0_8_2
release_0_9_0
release_0_9_1
staging-mjt-test
trivial-patches-pull-request
v0.1.0
v0.1.1
v0.1.3
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v2.1.1
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v2.10.1
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v2.11.0-rc0
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v2.11.1
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v2.12.0-rc0
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v2.12.1
v2.2.0
v2.2.0-rc0
v2.2.0-rc1
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v2.2.0-rc3
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v2.2.1
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v2.4.0
v2.4.0-rc0
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v2.4.0-rc3
v2.4.0-rc4
v2.4.0.1
v2.4.1
v2.5.0
v2.5.0-rc0
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v2.5.1
v2.5.1.1
v2.6.0
v2.6.0-rc0
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v2.6.1
v2.6.2
v2.7.0
v2.7.0-rc0
v2.7.0-rc1
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v2.7.0-rc3
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v2.7.1
v2.8.0
v2.8.0-rc0
v2.8.0-rc1
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v2.8.0-rc3
v2.8.0-rc4
v2.8.1
v2.8.1.1
v2.9.0
v2.9.0-rc0
v2.9.0-rc1
v2.9.0-rc2
v2.9.0-rc3
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v2.9.0-rc5
v2.9.1
v3.0.0
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v3.0.0-rc1
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v3.0.0-rc3
v3.0.0-rc4
v3.0.1
v3.1.0
v3.1.0-rc0
v3.1.0-rc1
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v3.1.0-rc3
v3.1.0-rc4
v3.1.0-rc5
v3.1.1
v3.1.1.1
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v4.0.0-rc0
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v4.0.1
v4.1.0
v4.1.0-rc0
v4.1.0-rc1
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v4.1.0-rc3
v4.1.0-rc4
v4.1.0-rc5
v4.1.1
v4.2.0
v4.2.0-rc0
v4.2.0-rc1
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v4.2.1
v5.0.0
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${ noResults }
3 Commits (1bd0e2d1c40ef1dbe717728197071e931abe22a4)
| Author | SHA1 | Message | Date |
|---|---|---|---|
Max Filippov
|
82b25dc8b0 |
xtensa_lx60: add FLASH support
LX60 carry 4 Mbyte FLASH and 128 Kbyte SRAM, LX200 carry 16 Mbyte FLASH and 32 Mbyte SRAM. Either of these memories may be mapped to the system ROM region. Select boot from FLASH if -kernel option is not specified, otherwise boot from SRAM. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> |
15 years ago |
|
Max Filippov
|
0200db650e |
target-xtensa: add Avnet LX60/LX110/LX200 boards
These boards carry similar hardware: SDRAM (48M for LX110, 64M for LX60, 96M for LX200), 16 Mbyte FLASH, FPGA, 10/100 Mbps Ethernet PHY and 16550 UART. FPGA may be loaded with almost any Tensilica processor. It is also used to implement Ethernet MAC, e.g. OpenCores 10/100 Mbps Ethernet MAC and LED/DIP switches access. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> |
15 years ago |
|
Max Filippov
|
cfa550c6ac |
target-xtensa: add target to the configure script
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> |
15 years ago |