For now only use the minimal decadency set until all the OpenBSD
mappings can be divined.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260226185303.1920021-7-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
For reasons still not clear to me passing the single dashed
-interactive would confuse the argument parsing enough we tried to
pass "nterative" as a string to the launch command causing failure and
head scratching.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260226185303.1920021-6-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
The bugs have evidently been fixed in the latest release so we can
migrate the laggards into how all-test-cross container and remove the
legacy hacks. They are also packaged for the main architectures so we
don't need to jump through the amd64 hoops.
Suggested-by: John Snow <jsnow@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20260226185303.1920021-3-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Debian 11 was EOL in 2024, and Debian 12 will be EOL this June. This
patch moves all but one of our tests, debian-legacy-test-cross, onto
Debian 13.
This patch does the bare minimum to upgrade these tests and doesn't make
any attempt at optimization or cleanup that may or may not be possible
with this upgrade.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
[AJB: tweak summary line]
Message-ID: <20260226185303.1920021-2-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* target/arm: set the correct TI bits for WFIT traps
* target/arm: Refactorings preparatory to KVM SME support
* target/arm/kvm: Don't free migration-blocker reason on failure
* target/arm/kvm: add kvm-psci-version vcpu property
* Revert "target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0"
* hw/arm/virt: Add virtio-mmio-transports property
* hw/arm/virt: Update error message for bad gic-version option
* hw/cpu: Build a15mpcore.c once as common object
* hw/misc/allwinner-cpucfg: Remove use of ARM_CPU() cast macro
* hw/ssi/xilinx_spips: Reset TX FIFO in reset
* hw/char/pl011: Only log "data written to disabled UART" once
* tests/functional: Make sure test case .py files are executable
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Merge tag 'pull-target-arm-20260226' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* target/arm: set the correct TI bits for WFIT traps
* target/arm: Refactorings preparatory to KVM SME support
* target/arm/kvm: Don't free migration-blocker reason on failure
* target/arm/kvm: add kvm-psci-version vcpu property
* Revert "target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0"
* hw/arm/virt: Add virtio-mmio-transports property
* hw/arm/virt: Update error message for bad gic-version option
* hw/cpu: Build a15mpcore.c once as common object
* hw/misc/allwinner-cpucfg: Remove use of ARM_CPU() cast macro
* hw/ssi/xilinx_spips: Reset TX FIFO in reset
* hw/char/pl011: Only log "data written to disabled UART" once
* tests/functional: Make sure test case .py files are executable
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# gpg: Signature made Thu Feb 26 15:55:06 2026 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20260226' of https://gitlab.com/pm215/qemu:
hw/char/pl011: Only log "data written to disabled UART" once
target/arm/kvm: Don't free migration-blocker reason on failure
target/arm: Add have_ffr argument to kvm_arch_{get, put}_sve
target/arm: Add vq argument to kvm_arch_{get, put}_sve
target/arm: Drop kvm_arm_pmu_supported
target/arm: Remove kvm test in arm_set_pmu
target/arm: Drop kvm_arm_sve_supported
target/arm: Move kvm test out of cpu_arm_set_sve
target/arm: Init sve_vq in kvm_arm_set_cpu_features_from_host
target/arm: Move kvm_arm_sve_get_vls within kvm.c
target/arm: Remove aarch64 test for kvm
hw/misc/allwinner-cpucfg: Remove use of ARM_CPU() cast macro
hw/cpu: Build a15mpcore.c once as common object
Revert "target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0"
target/arm/kvm: add kvm-psci-version vcpu property
tests/functional: Make sure test case .py files are executable
hw/arm/virt: Update error message for bad gic-version option
hw/arm/virt: Add virtio-mmio-transports property
target/arm: set the correct TI bits for WFIT traps
hw/ssi/xilinx_spips: Reset TX FIFO in reset
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The environment we do our coverity build in (amd64-fedora-container)
has just upgraded to Fedora 43. This ships with libnfs version
16.2.0. We can't currently build against that: in commit
e2d98f2571 we added a requirement to meson.build that libnfs be <
6.0.0, because of an upstream API change that we haven't yet updated
block/nfs.c to handle.
The result is that the coverity CI job currently fails in
configure:
Dependency libnfs found: NO. Found 16.2.0 but need: '<6.0.0' ;
matched: '>=1.9.3'
Run-time dependency libnfs found: NO
../meson.build:1150:11: ERROR: Dependency lookup for libnfs with
method 'pkgconfig' failed: Invalid version, need 'libnfs' ['<6.0.0']
found '16.2.0'.
Fix the coverity builds by dropping --enable-libnfs. This means we
will no longer have coverage of block/nfs.c until/unless we do
that update to handle the new libnfs API.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20260226111001.1021810-1-peter.maydell@linaro.org
We actually do not allow our meson requirements to be fetched online
because we strictly prefer the vendored version. Move the tooling group
installation to a different invocation that does allow PyPI to be
accessed when configure is run without explicitly disabling PyPI access.
This will allow QEMU to download and install python3-wheel for you if
you don't have it in your host environment.
Reported-by: Kevin Wolf <kwolf@redhat.com>
Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-id: 20260225191255.955585-1-jsnow@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
We log a GUEST_ERROR message "PL011 data written to disabled UART" if
the guest writes data to the TX FIFO when it has not set the enable
bit in the UART. The idea is to note that the guest has done
something dubious but let it work anyway. However, since we print
this message for every output character, it floods the logs when
running a guest that does this.
Keep a note of whether we've printed the log message or not, so we
only output it once. If the guest actively disables the UART, we
re-arm the log message.
Notably, the Linux kernel does not bother to enable the UART if it is
used for earlycon, relying on the firmware having already done that.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Message-id: 20260210101702.3980804-1-peter.maydell@linaro.org
The migrate_add_blocker() function documents that if it fails it will
free the Error it is passed via its reasonp argument and set reasonp
to NULL. That means that in kvm_arm_enable_mte() we don't need to
call error_free(mte_migration_blocker) in the failure codepath.
Doing so is harmless because error_free(NULL) is permitted and does
nothing, but we can remove the unnecessary code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260223173232.453165-1-peter.maydell@linaro.org
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This function has only one use, so inline it and drop the stubs.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
In kvm_arm_get_host_cpu_features, we only set ARM_FEATURE_PMU if
kvm_arm_pmu_supported. In arm_cpu_post_init we only register the
"pmu" property if ARM_FEATURE_PMU. Therefore, if kvm is enabled,
we can only arrive in arm_set_pmu if kvm_arm_pmu_supported.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This function has only one real use, so inline it and
drop the stubs.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Introduce a set of stub property callbacks for when we really
don't want to be able to enable SVE. Register the real or stub
funtions in aarch64_add_sve_properties depending on whether or
not SVE is available.
Adjust aarch64_a64fx_initfn to initialize the set of supported
vector sizes before calling aarch64_add_sve_properties.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Probe for SVE vector sizes with the same scratch vm that
we use for probing other features. Remove a separate
initialization path in arm_cpu_sve_finalize.
Unexport kvm_arm_sve_get_vls.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Prepare to adjust the invocation point and visibility.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
We no longer support kvm for aarch32, therefore the aarch64
test is trivially true.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
allwinner_cpucfg_cpu_reset() doesn't access ARM CPU internal
fields: no need to cast, pass a generic CPU pointer along.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260225034720.41495-1-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
a15mpcore.c doesn't need to include the target-specific 'kvm_arm.h'
header, it only lacks the qemu_get_cpu() declaration which comes
from 'hw/core/cpu.h'. Include the latter and build as common object.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260225034451.41338-1-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Provide a kvm specific vcpu property to override the default
(as of kernel v6.13 that would be PSCI v1.3) PSCI version emulated
by kvm. Current valid values are: 0.1, 0.2, 1.0, 1.1, 1.2, and 1.3
Note: in order to support PSCI v0.1 we need to drop vcpu
initialization with KVM_CAP_ARM_PSCI_0_2 in that case.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Sebastian Ott <sebott@redhat.com>
Message-id: 20260220115656.4831-2-sebott@redhat.com
[PMM: adjust sscanf to not permit negative numbers]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The top-level test python scripts in tests/functional are supposed to
be marked executable; "make check-functional" doesn't care about
this, but it allows them to be run as standalone executables to
exercise a single test, as docs/devel/testing/functional.rst
describes.
A couple of files have got into the tree without the executable
bit set: fix them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20260212151258.1750268-1-peter.maydell@linaro.org
As we added different valid gic-version option settings,
we forgot to update the hint in the error message produced
when the user specifies an invalid value:
$ qemu-system-aarch64 -M virt,help | grep gic-version
gic-version=<string> - Set GIC version. Valid values are 2, 3, 4, host and max
$ qemu-system-aarch64 -M virt,gic-version=bang
qemu-system-aarch64: Invalid gic-version value
Valid values are 3, 2, host, max.
Update the error string to match the one we use in the help text
for the option.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20260219110228.3804482-1-peter.maydell@linaro.org
Windows ARM64 guests detect virtio-mmio devices declared in ACPI
tables even when no backend is attached. This causes "Unknown
devices" (ACPI\LNRO0005) to appear in Device Manager.
Until Windows fixes that by supporting, add a new machine
property 'virtio-mmio-transports' to control the number of
virtio-mmio transports instantiated. The default remains
NUM_VIRTIO_TRANSPORTS (32) for backward compatibility.
Setting it to 0 allows users to disable virtio-mmio entirely.
Usage: -machine virt,virtio-mmio-transports=0
Signed-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>
Message-id: 20260219173256.152743-1-mbawa@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The WFIT trap should be reported as 0b10.
Cc: qemu-stable@nongnu.org
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-id: 20260220171945.1065102-1-alex.bennee@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
In xilinx_spips_reset() and xlnx_zynqmp_qspips_reset() a cut and
paste error meant we reset the RX FIFO twice and the TX FIFO not at
all. Correct this to reset both FIFOs.
Cc: qemu-stable@nongnu.org
Signed-off-by: Weixie Cui <cuiweixie@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260223095905.67709-1-cuiweixie@gmail.com
[Rewrote commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
- Remove TARGET_PHYS_ADDR_SPACE_BITS definition
- Remove MonitorDef register entries already provided by gdbstub XML
- Remove gdbstub ldtul*() macros
- Build various gdbstub.c files once
- Make qemu_arch_available() and page-vary common code
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Merge tag 'single-binary-20260226' of https://github.com/philmd/qemu into staging
Various patches related to single binary effort:
- Remove TARGET_PHYS_ADDR_SPACE_BITS definition
- Remove MonitorDef register entries already provided by gdbstub XML
- Remove gdbstub ldtul*() macros
- Build various gdbstub.c files once
- Make qemu_arch_available() and page-vary common code
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# -----END PGP SIGNATURE-----
# gpg: Signature made Wed Feb 25 23:12:38 2026 GMT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'single-binary-20260226' of https://github.com/philmd/qemu: (70 commits)
page-vary: Build migration_legacy_page_bits as common code
page-vary: Build finalize_target_page_bits as common code
page-vary: Build set_preferred_target_page_bits as common code
target-info: Move TARGET_PAGE_BITS sanity check
target-info: Add page_bits_{init,vary}
page-vary: Expose TARGET_PAGE_BITS_MIN definition
meson: don't access 'cxx' object without checking cpp lang
system: Reduce 'arch_init.h' scope
system: Make qemu_arch_available() common code
hw/scsi/disk: Prefer target_s390x() over qemu_arch_available()
qemu/target_info: Add target_s390x() helper
qemu: Document qemu_arch_available() method
target/m68k: clean-up includes in cpu.c
target/tricore: Build 'gdbstub.c' once for system single binary
target/s390x: Build 'gdbstub.c' once for system single binary
target/rx: Build 'gdbstub.c' once for system single binary
target/m68k: Build 'gdbstub.c' once for system single binary
target/loongarch: Build 'gdbstub.c' once for system single binary
target/avr: Build 'gdbstub.c' once for system single binary
target/alpha: Build 'gdbstub.c' once for system single binary
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Use target_info->page_bits_init to implement
migration_legacy_page_bits. Because this is the last
function within the file, rename page-vary-target.c
to page-vary-system.c and build once for system mode.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260217095106.598486-7-richard.henderson@linaro.org>
[PMD: Update MAINTAINERS]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Use target_info->page_bits_init to merge
finalize_target_page_bits_common into
finalize_target_page_bits in page-vary-common.c.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260217095106.598486-6-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Use target_info->page_bits_vary to merge
set_preferred_target_page_bits_common into
set_preferred_target_page_bits in page-vary-common.c.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260217095106.598486-5-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Move the check from page-vary-target.c to target-info-stub.c,
in the process of removing page-vary-target.c entirely.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260217095106.598486-4-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Add two fields that will hold TARGET_PAGE_BITS,
TARGET_PAGE_BITS_VARY, TARGET_PAGE_BITS_LEGACY.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260217095106.598486-3-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
We'll use TARGET_PAGE_BITS_MIN in page-vary-common.c,
so expose it via "exec/page-vary.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260213182713.44924-3-philmd@linaro.org>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <20260210173355.776365-1-berrange@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Better to restrict qemu_arch_available() scope so it is only
used by generic system/ code to parse command line options.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260213175032.32121-6-philmd@linaro.org>
Remove the need of per-target QEMU_ARCH. Define the
QEMU_ARCH_* constants based on SYS_EMU_TARGET_* ones,
themselves already exposed via target_arch(), allowing
to check the current target is included in @arch_bitmask.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260213175032.32121-5-philmd@linaro.org>
qemu_arch_available() is used to check if a broadly available
feature should be exposed to a particular set of target
architectures. Here we only want to check something that is
specific to s390x: the target_s390x() helper is more adapted.
Besides, it will allow to reduce qemu_arch_available() scope.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260213175032.32121-4-philmd@linaro.org>
Add a helper to distinct whether the binary is targetting
S390x or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260213175032.32121-3-philmd@linaro.org>
qemu_arch_available() is used to check if a broadly available
feature should be exposed to a particular set of target
architectures.
Since its argument is a mask of bits, rename it as @arch_bitmask.
We have less than 32 target architectures so far, so restrict it
to the uint32_t type.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260213175032.32121-2-philmd@linaro.org>
We don't need translation-block.h as the TB flags are local and the
only bits needed come from cpu-ops.h. The vmstate is a system only
concerns so we can guard against including it for linux-user.
Finally tidy up the order to keep things together with the local cpu.h
kept at the end.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260219171810.602667-2-alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
There is a single qemu-system-tricore binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-50-philmd@linaro.org>
There is a single qemu-system-s390x binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-49-philmd@linaro.org>
There is a single qemu-system-rx binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-48-philmd@linaro.org>
There is a single qemu-system-m68k binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-47-philmd@linaro.org>
There is a single qemu-system-loongarch64 binary, but by
moving 'gdbstub.c' in the target_common_system_arch[] source
set the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-46-philmd@linaro.org>
There is a single qemu-system-avr binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-45-philmd@linaro.org>
There is a single qemu-system-alpha binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-44-philmd@linaro.org>
Alex Bennée
John Snow
Peter Maydell
Richard Henderson
Philippe Mathieu-Daudé
Mohamed Mediouni
Sebastian Ott
Mohammadfaiz Bawa
Weixie Cui
Daniel P. Berrangé