riscv/qemu - qemu - Gitea: Git with a cup of tea

Commit Graph

Author	SHA1	Message	Date
Philippe Mathieu-Daudé	166a4b6e43	user: Declare cpu_loop() once in 'user/cpu_loop.h' Declare cpu_loop() once in "user/cpu_loop.h". bsd-user gets the G_NORETURN attribute. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-18-philmd@linaro.org>	1 year ago
Warner Losh	ec018b7679	bsd-user: Add target.h for aarch64. For aarch64, it's a 64-bit API, so there's no pairing of registers for 64-bit values. Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago
Warner Losh	5fa2a10ba6	bsd-user: Define TARGET_SIGSTACK_ALIGN and use it to round stack Most (all?) targets require stacks to be properly aligned. Rather than a series of ifdefs in bsd-user/signal.h, instead use a manditory #define for all architectures. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>	2 years ago
Stacey Son	ce6c541dcb	bsd-user:Add AArch64 improvements and signal handling functions Added get_ucontext_sigreturn function to check processor state ensuring current execution mode is EL0 and no flags indicating interrupts or exceptions are set. Updated AArch64 code to use CF directly without reading/writing the entire processor state, improving efficiency. Changed FP data structures to use Int128 instead of __uint128_t, leveraging QEMU's generic mechanism for referencing this type. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-9-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago
Stacey Son	dadfc6d5df	bsd-user:Add set_mcontext function for ARM AArch64 The function copies register values from the provided target_mcontext_t structure to the CPUARMState registers. Note:FP is unfinished upstream but will be a separate commit coming soon. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-8-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago
Warner Losh	c88f44d85a	bsd-user:Add setup_sigframe_arch function for ARM AArch64 The function utilizes the `get_mcontext` function to retrieve the machine context for the current CPUARMState Signed-off-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-7-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago
Stacey Son	9959fae592	bsd-user:Add get_mcontext function for ARM AArch64 function to retrieve machine context,it populates the provided target_mcontext_t structure with information from the CPUARMState registers. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-6-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago
Stacey Son	7dba5e10a6	bsd-user:Add ARM AArch64 signal handling support Added sigcode setup function for signal trampoline which initializes a sequence of instructions to handle signal returns and exits, copying this code to the target offset. Defined ARM AArch64 specific signal definitions including register indices and sizes, and introduced structures to represent general purpose registers, floating point registers, and machine context. Added function to set up signal handler arguments, populating register values in `CPUARMState` based on the provided signal, signal frame, signal action, and frame address. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-5-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago
Warner Losh	1541d87db2	bsd-user:Add ARM AArch64 support and capabilities Added function to access rval2 by accessing the x1 register. Defined ARM AArch64 ELF parameters including mmap and dynamic load addresses. Introduced extensive hardware capability definitions and macros for retrieving hardware capability (hwcap) flags. Implemented function to retrieve ARM AArch64 hardware capabilities using the `GET_FEATURE_ID` macro. Added function to retrieve extended ARM AArch64 hardware capability flags. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Co-authored-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-4-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago
Stacey Son	1acce7718b	bsd-user:Add AArch64 register handling and related functions Added header file for managing CPU register states in FreeBSD user mode. Introduced prototypes for setting and getting thread-local storage (TLS). Implemented AArch64 sysarch() system call emulation and a printing function. Added function for setting up thread upcall to add thread support to BSD-USER. Initialized thread's register state during thread setup. Updated ARM AArch64 VM parameter definitions for bsd-user, including address spaces for FreeBSD/arm64 and a function for getting the stack pointer from CPU and setting a return value. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com> Co-authored-by: Sean Bruno <sbruno@freebsd.org> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-3-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago
Stacey Son	8cbb4fc12e	bsd-user:Add CPU initialization and management functions Added function to initialize ARM CPU and check if it supports 64-bit mode. Implemented CPU loop function to handle exceptions and emulate execution of instructions. Added function to clone CPU state to create a new thread. Included AArch64 specific CPU functions for bsd-user to set and receive thread-local-storage value from the tpidr_el0 register. Introduced structure for storing CPU register states for BSD-USER. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Kyle Evans <kevans@freebsd.org> Co-authored-by: Sean Bruno <sbruno@freebsd.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240707191128.10509-2-itachis@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com>	2 years ago

11 Commits (0a765ca850125e0202c366cb4aab032ac9670870)