riscv/qemu - qemu - Gitea: Git with a cup of tea

127712 Commits

68 Branches

448 Tags

581 MiB

Branch: master

Commit Graph

Author	SHA1	Message	Date
William Hooper	cad529260a	target/m68k: Improve CHK and CHK2; implement CMP2 Some CHK2 (Check Register Against Bounds) instructions, such as opcode 02FA, cause spurious illegal instruction exceptions, despite being valid on Motorola MC68020 and later processors and used in existing software. With this patch, QEMU: - Translates CHK2 and CMP2 (Compare Register Against Bounds) instructions [1] having any valid size or effective address. CHK2 and CMP2 use the same opcodes but differ in bit 11 of the extension word. (BITREV or BYTEREV instructions for ColdFire family processors [2], which use similar opcodes, are not captured, however.) - Implements CMP2, which "is identical to CHK2 except that it sets condition codes rather than taking an exception" [1]. - Populates the correct "logical address of the instruction following the instruction that caused the trap" [3] in the exception stack frame for CHK and CHK2 exceptions, according to the number of words in the instruction, including extension words, rather than default lengths. An existing test for CHK2 is enabled, and tests are added for CHK, CHK2, and CMP2. References: [1] Motorola M68000 Family Programmer's Reference Manual (M68000PM/AD), Rev. 1, 1992, pages 4-72 to 4-73 and 4-82 to 4-83. [2] Freescale Semiconductor, ColdFire Family Programmer's Reference Manual (CFPRM), Rev. 3, 2005, pages 4-19 and 4-26. [3] Motorola M68040 User's Manual (M68040UM/AD), 1993, page 8-8. Signed-off-by: William Hooper <wsh@wshooper.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20251222002634.61480-1-wsh@wshooper.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>	3 months ago
Richard Henderson	e105db0227	tests/tcg/m68k: Add trap.c Test various trap instructions: chk, div, trap, trapv, trapcc, ftrapcc, and the signals and addresses that we expect from them. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220602013401.303699-15-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>	4 years ago

Author

SHA1

Message

Date

William Hooper

cad529260a

target/m68k: Improve CHK and CHK2; implement CMP2

Some CHK2 (Check Register Against Bounds) instructions, such as opcode
02FA, cause spurious illegal instruction exceptions, despite being valid
on Motorola MC68020 and later processors and used in existing software.

With this patch, QEMU:

- Translates CHK2 and CMP2 (Compare Register Against Bounds)
  instructions [1] having any valid size or effective address. CHK2 and
  CMP2 use the same opcodes but differ in bit 11 of the extension word.
  (BITREV or BYTEREV instructions for ColdFire family processors [2],
  which use similar opcodes, are not captured, however.)

- Implements CMP2, which "is identical to CHK2 except that it sets
  condition codes rather than taking an exception" [1].

- Populates the correct "logical address of the instruction following
  the instruction that caused the trap" [3] in the exception stack frame
  for CHK and CHK2 exceptions, according to the number of words in the
  instruction, including extension words, rather than default lengths.

An existing test for CHK2 is enabled, and tests are added for CHK, CHK2,
and CMP2.

References:
[1] Motorola M68000 Family Programmer's Reference Manual (M68000PM/AD),
    Rev. 1, 1992, pages 4-72 to 4-73 and 4-82 to 4-83.
[2] Freescale Semiconductor, ColdFire Family Programmer's Reference Manual
    (CFPRM), Rev. 3, 2005, pages 4-19 and 4-26.
[3] Motorola M68040 User's Manual (M68040UM/AD), 1993, page 8-8.

Signed-off-by: William Hooper <wsh@wshooper.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-ID: <20251222002634.61480-1-wsh@wshooper.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

3 months ago

Richard Henderson

e105db0227

tests/tcg/m68k: Add trap.c

Test various trap instructions: chk, div, trap, trapv, trapcc, ftrapcc,
and the signals and addresses that we expect from them.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-15-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

4 years ago

2 Commits (master)