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target/loongarch: Use MMUContext in get_physical_address()

With function get_physical_address(), parameter MMUContext is added
and remove parameter address, prot and address.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
pull/299/head
Bibo Mao 1 year ago
parent
commit
f95b970275
  1. 3
      target/loongarch/cpu-mmu.h
  2. 32
      target/loongarch/cpu_helper.c
  3. 8
      target/loongarch/tcg/tlb_helper.c

3
target/loongarch/cpu-mmu.h

@ -30,8 +30,7 @@ typedef struct MMUContext {
bool check_ps(CPULoongArchState *ent, uint8_t ps);
TLBRet loongarch_check_pte(CPULoongArchState *env, MMUContext *context,
MMUAccessType access_type, int mmu_idx);
TLBRet get_physical_address(CPULoongArchState *env, hwaddr *physical,
int *prot, vaddr address,
TLBRet get_physical_address(CPULoongArchState *env, MMUContext *context,
MMUAccessType access_type, int mmu_idx,
int is_debug);
void get_dir_base_width(CPULoongArchState *env, uint64_t *dir_base,

32
target/loongarch/cpu_helper.c

@ -200,8 +200,7 @@ static hwaddr dmw_va2pa(CPULoongArchState *env, vaddr va, target_ulong dmw)
}
}
TLBRet get_physical_address(CPULoongArchState *env, hwaddr *physical,
int *prot, vaddr address,
TLBRet get_physical_address(CPULoongArchState *env, MMUContext *context,
MMUAccessType access_type, int mmu_idx,
int is_debug)
{
@ -211,13 +210,13 @@ TLBRet get_physical_address(CPULoongArchState *env, hwaddr *physical,
int64_t addr_high;
uint8_t da = FIELD_EX64(env->CSR_CRMD, CSR_CRMD, DA);
uint8_t pg = FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PG);
MMUContext context;
TLBRet ret;
vaddr address;
/* Check PG and DA */
address = context->addr;
if (da & !pg) {
*physical = address & TARGET_PHYS_MASK;
*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
context->physical = address & TARGET_PHYS_MASK;
context->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
return TLBRET_MATCH;
}
@ -235,8 +234,8 @@ TLBRet get_physical_address(CPULoongArchState *env, hwaddr *physical,
base_c = FIELD_EX64(env->CSR_DMW[i], CSR_DMW_32, VSEG);
}
if ((plv & env->CSR_DMW[i]) && (base_c == base_v)) {
*physical = dmw_va2pa(env, address, env->CSR_DMW[i]);
*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
context->physical = dmw_va2pa(env, address, env->CSR_DMW[i]);
context->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
return TLBRET_MATCH;
}
}
@ -248,25 +247,18 @@ TLBRet get_physical_address(CPULoongArchState *env, hwaddr *physical,
}
/* Mapped address */
context.addr = address;
ret = loongarch_map_address(env, &context,
access_type, mmu_idx, is_debug);
if (ret == TLBRET_MATCH) {
*physical = context.physical;
*prot = context.prot;
}
return ret;
return loongarch_map_address(env, context, access_type, mmu_idx, is_debug);
}
hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
CPULoongArchState *env = cpu_env(cs);
hwaddr phys_addr;
int prot;
MMUContext context;
if (get_physical_address(env, &phys_addr, &prot, addr, MMU_DATA_LOAD,
context.addr = addr;
if (get_physical_address(env, &context, MMU_DATA_LOAD,
cpu_mmu_index(cs, false), 1) != TLBRET_MATCH) {
return -1;
}
return phys_addr;
return context.physical;
}

8
target/loongarch/tcg/tlb_helper.c

@ -517,13 +517,15 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
CPULoongArchState *env = cpu_env(cs);
hwaddr physical;
int prot;
MMUContext context;
TLBRet ret;
/* Data access */
ret = get_physical_address(env, &physical, &prot, address,
access_type, mmu_idx, 0);
context.addr = address;
ret = get_physical_address(env, &context, access_type, mmu_idx, 0);
if (ret == TLBRET_MATCH) {
physical = context.physical;
prot = context.prot;
tlb_set_page(cs, address & TARGET_PAGE_MASK,
physical & TARGET_PAGE_MASK, prot,
mmu_idx, TARGET_PAGE_SIZE);

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