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@ -86,16 +86,12 @@ static uint32_t PPC_PCIIO_readl (void *opaque, target_phys_addr_t addr) |
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return val; |
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} |
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static CPUWriteMemoryFunc * const PPC_PCIIO_write[] = { |
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&PPC_PCIIO_writeb, |
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&PPC_PCIIO_writew, |
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&PPC_PCIIO_writel, |
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}; |
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static CPUReadMemoryFunc * const PPC_PCIIO_read[] = { |
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&PPC_PCIIO_readb, |
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&PPC_PCIIO_readw, |
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&PPC_PCIIO_readl, |
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static const MemoryRegionOps PPC_PCIIO_ops = { |
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.old_mmio = { |
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.read = { PPC_PCIIO_readb, PPC_PCIIO_readw, PPC_PCIIO_readl, }, |
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.write = { PPC_PCIIO_writeb, PPC_PCIIO_writew, PPC_PCIIO_writel, }, |
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}, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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}; |
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static int prep_map_irq(PCIDevice *pci_dev, int irq_num) |
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@ -116,7 +112,6 @@ PCIBus *pci_prep_init(qemu_irq *pic, |
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{ |
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PREPPCIState *s; |
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PCIDevice *d; |
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int PPC_io_memory; |
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s = g_malloc0(sizeof(PREPPCIState)); |
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s->bus = pci_register_bus(NULL, "pci", |
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@ -135,10 +130,8 @@ PCIBus *pci_prep_init(qemu_irq *pic, |
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memory_region_add_subregion(address_space_io, 0xcfc, &s->data_mem); |
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sysbus_init_ioports(&s->busdev, 0xcfc, 1); |
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PPC_io_memory = cpu_register_io_memory(PPC_PCIIO_read, |
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PPC_PCIIO_write, s, |
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DEVICE_NATIVE_ENDIAN); |
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cpu_register_physical_memory(0x80800000, 0x00400000, PPC_io_memory); |
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memory_region_init_io(&s->mmcfg, &PPC_PCIIO_ops, s, "pciio", 0x00400000); |
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memory_region_add_subregion(address_space_mem, 0x80800000, &s->mmcfg); |
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/* PCI host bridge */ |
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d = pci_register_device(s->bus, "PREP Host Bridge - Motorola Raven", |
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