include: Make headers more self-contained

Back in 2016, we discussed[1] rules for headers, and these were
generally liked:

1. Have a carefully curated header that's included everywhere first.  We
   got that already thanks to Peter: osdep.h.

2. Headers should normally include everything they need beyond osdep.h.
   If exceptions are needed for some reason, they must be documented in
   the header.  If all that's needed from a header is typedefs, put
   those into qemu/typedefs.h instead of including the header.

3. Cyclic inclusion is forbidden.

This patch gets include/ closer to obeying 2.

It's actually extracted from my "[RFC] Baby steps towards saner
headers" series[2], which demonstrates a possible path towards
checking 2 automatically.  It passes the RFC test there.

[1] Message-ID: <87h9g8j57d.fsf@blackfin.pond.sub.org>
    https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg03345.html
[2] Message-Id: <20190711122827.18970-1-armbru@redhat.com>
    https://lists.nongnu.org/archive/html/qemu-devel/2019-07/msg02715.html

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190812052359.30071-2-armbru@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>

include/block/raw-aio.h

@@ -12,9 +12,11 @@
  * Contributions after 2012-01-13 are licensed under the terms of the
  * GNU GPL, version 2 or (at your option) any later version.
  */
+
 #ifndef QEMU_RAW_AIO_H
 #define QEMU_RAW_AIO_H
 
+#include "block/aio.h"
 #include "qemu/coroutine.h"
 #include "qemu/iov.h"
 

include/block/write-threshold.h

@@ -9,9 +9,11 @@
  * This work is licensed under the terms of the GNU LGPL, version 2 or later.
  * See the COPYING.LIB file in the top-level directory.
  */
+
 #ifndef BLOCK_WRITE_THRESHOLD_H
 #define BLOCK_WRITE_THRESHOLD_H
 
+#include "block/block_int.h"
 
 /*
  * bdrv_write_threshold_set:

include/disas/disas.h

@@ -1,6 +1,7 @@
 #ifndef QEMU_DISAS_H
 #define QEMU_DISAS_H
 
+#include "exec/hwaddr.h"
 
 #ifdef NEED_CPU_H
 #include "cpu.h"

include/exec/cputlb.h

@@ -16,9 +16,12 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
+
 #ifndef CPUTLB_H
 #define CPUTLB_H
 
+#include "exec/cpu-common.h"
+
 #if !defined(CONFIG_USER_ONLY)
 /* cputlb.c */
 void tlb_protect_code(ram_addr_t ram_addr);

include/exec/exec-all.h

@@ -20,6 +20,7 @@
 #ifndef EXEC_ALL_H
 #define EXEC_ALL_H
 
+#include "cpu.h"
 #include "exec/tb-context.h"
 #include "sysemu/cpus.h"
 

include/exec/ioport.h

@@ -24,6 +24,8 @@
 #ifndef IOPORT_H
 #define IOPORT_H
 
+#include "exec/memory.h"
+
 #define MAX_IOPORTS     (64 * 1024)
 #define IOPORTS_MASK    (MAX_IOPORTS - 1)
 

include/exec/memory-internal.h

@@ -20,6 +20,8 @@
 #ifndef MEMORY_INTERNAL_H
 #define MEMORY_INTERNAL_H
 
+#include "cpu.h"
+
 #ifndef CONFIG_USER_ONLY
 static inline AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv)
 {

include/exec/ram_addr.h

@@ -20,6 +20,7 @@
 #define RAM_ADDR_H
 
 #ifndef CONFIG_USER_ONLY
+#include "cpu.h"
 #include "hw/xen/xen.h"
 #include "sysemu/tcg.h"
 #include "exec/ramlist.h"

include/exec/softmmu-semi.h

@@ -10,6 +10,8 @@
 #ifndef SOFTMMU_SEMI_H
 #define SOFTMMU_SEMI_H
 
+#include "cpu.h"
+
 static inline uint64_t softmmu_tget64(CPUArchState *env, target_ulong addr)
 {
     uint64_t val;

include/exec/tb-hash.h

@@ -20,6 +20,8 @@
 #ifndef EXEC_TB_HASH_H
 #define EXEC_TB_HASH_H
 
+#include "exec/cpu-defs.h"
+#include "exec/exec-all.h"
 #include "qemu/xxhash.h"
 
 #ifdef CONFIG_SOFTMMU

include/exec/user/thunk.h

@@ -16,10 +16,12 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
+
 #ifndef THUNK_H
 #define THUNK_H
 
 #include "cpu.h"
+#include "exec/user/abitypes.h"
 
 /* types enums definitions */
 

include/fpu/softfloat-macros.h

@@ -82,6 +82,8 @@ this code that are retained.
 #ifndef FPU_SOFTFLOAT_MACROS_H
 #define FPU_SOFTFLOAT_MACROS_H
 
+#include "fpu/softfloat.h"
+
 /*----------------------------------------------------------------------------
 | Shifts `a' right by the number of bits given in `count'.  If any nonzero
 | bits are shifted off, they are ``jammed'' into the least significant bit of

include/hw/acpi/pci.h

@@ -22,9 +22,12 @@
  * You should have received a copy of the GNU General Public License along
  * with this program; if not, see <http://www.gnu.org/licenses/>.
  */
+
 #ifndef HW_ACPI_PCI_H
 #define HW_ACPI_PCI_H
 
+#include "hw/acpi/bios-linker-loader.h"
+
 typedef struct AcpiMcfgInfo {
     uint64_t base;
     uint32_t size;

include/hw/acpi/tco.h

@@ -6,9 +6,12 @@
  * This work is licensed under the terms of the GNU GPL, version 2 or later.
  * See the COPYING file in the top-level directory.
  */
+
 #ifndef HW_ACPI_TCO_H
 #define HW_ACPI_TCO_H
 
+#include "exec/memory.h"
+#include "migration/vmstate.h"
 
 /* As per ICH9 spec, the internal timer has an error of ~0.6s on every tick */
 #define TCO_TICK_NSEC 600000000LL

include/hw/adc/stm32f2xx_adc.h

@@ -25,6 +25,8 @@
 #ifndef HW_STM32F2XX_ADC_H
 #define HW_STM32F2XX_ADC_H
 
+#include "hw/sysbus.h"
+
 #define ADC_SR    0x00
 #define ADC_CR1   0x04
 #define ADC_CR2   0x08

include/hw/arm/allwinner-a10.h

@@ -11,6 +11,7 @@
 #include "hw/ide/ahci.h"
 
 #include "sysemu/sysemu.h"
+#include "target/arm/cpu.h"
 
 
 #define AW_A10_PIC_REG_BASE     0x01c20400

include/hw/arm/aspeed_soc.h

@@ -22,6 +22,7 @@
 #include "hw/ssi/aspeed_smc.h"
 #include "hw/watchdog/wdt_aspeed.h"
 #include "hw/net/ftgmac100.h"
+#include "target/arm/cpu.h"
 
 #define ASPEED_SPIS_NUM  2
 #define ASPEED_WDTS_NUM  3

include/hw/arm/bcm2836.h

@@ -13,6 +13,7 @@
 
 #include "hw/arm/bcm2835_peripherals.h"
 #include "hw/intc/bcm2836_control.h"
+#include "target/arm/cpu.h"
 
 #define TYPE_BCM283X "bcm283x"
 #define BCM283X(obj) OBJECT_CHECK(BCM283XState, (obj), TYPE_BCM283X)

include/hw/arm/exynos4210.h

@@ -19,13 +19,12 @@
  *
  *  You should have received a copy of the GNU General Public License along
  *  with this program; if not, see <http://www.gnu.org/licenses/>.
- *
  */
 
 #ifndef EXYNOS4210_H
 #define EXYNOS4210_H
 
-#include "exec/memory.h"
+#include "hw/sysbus.h"
 #include "target/arm/cpu-qom.h"
 
 #define EXYNOS4210_NCPUS                    2

include/hw/arm/fsl-imx25.h

@@ -27,6 +27,7 @@
 #include "hw/i2c/imx_i2c.h"
 #include "hw/gpio/imx_gpio.h"
 #include "exec/memory.h"
+#include "target/arm/cpu.h"
 
 #define TYPE_FSL_IMX25 "fsl,imx25"
 #define FSL_IMX25(obj) OBJECT_CHECK(FslIMX25State, (obj), TYPE_FSL_IMX25)

include/hw/arm/fsl-imx31.h

@@ -26,6 +26,7 @@
 #include "hw/i2c/imx_i2c.h"
 #include "hw/gpio/imx_gpio.h"
 #include "exec/memory.h"
+#include "target/arm/cpu.h"
 
 #define TYPE_FSL_IMX31 "fsl,imx31"
 #define FSL_IMX31(obj) OBJECT_CHECK(FslIMX31State, (obj), TYPE_FSL_IMX31)

include/hw/arm/sharpsl.h

@@ -3,9 +3,12 @@
  *
  * This file is licensed under the GNU GPL.
  */
+
 #ifndef QEMU_SHARPSL_H
 #define QEMU_SHARPSL_H
 
+#include "exec/hwaddr.h"
+
 #define zaurus_printf(format, ...)	\
     fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__)
 

include/hw/arm/xlnx-zynqmp.h

@@ -32,6 +32,7 @@
 #include "hw/intc/xlnx-zynqmp-ipi.h"
 #include "hw/timer/xlnx-zynqmp-rtc.h"
 #include "hw/cpu/cluster.h"
+#include "target/arm/cpu.h"
 
 #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
 #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \

include/hw/block/fdc.h

@@ -1,6 +1,8 @@
 #ifndef HW_FDC_H
 #define HW_FDC_H
 
+#include "exec/hwaddr.h"
+#include "hw/irq.h"
 #include "qapi/qapi-types-block.h"
 
 /* fdc.c */

include/hw/block/flash.h

@@ -4,6 +4,7 @@
 /* NOR flash devices */
 
 #include "exec/memory.h"
+#include "migration/vmstate.h"
 
 /* pflash_cfi01.c */
 

include/hw/char/escc.h

@@ -3,6 +3,7 @@
 
 #include "chardev/char-fe.h"
 #include "chardev/char-serial.h"
+#include "hw/sysbus.h"
 #include "ui/input.h"
 
 /* escc.c */

include/hw/char/xilinx_uartlite.h

@@ -15,6 +15,8 @@
 #ifndef XILINX_UARTLITE_H
 #define XILINX_UARTLITE_H
 
+#include "hw/sysbus.h"
+
 static inline DeviceState *xilinx_uartlite_create(hwaddr addr,
                                         qemu_irq irq,
                                         Chardev *chr)

include/hw/core/generic-loader.h

@@ -19,6 +19,7 @@
 #define GENERIC_LOADER_H
 
 #include "elf.h"
+#include "hw/qdev-core.h"
 
 typedef struct GenericLoaderState {
     /* <private> */

include/hw/cris/etraxfs.h

@@ -27,6 +27,7 @@
 
 #include "net/net.h"
 #include "hw/cris/etraxfs_dma.h"
+#include "hw/sysbus.h"
 
 /* Instantiate an ETRAXFS Ethernet MAC.  */
 static inline DeviceState *

include/hw/cris/etraxfs_dma.h

@@ -1,6 +1,9 @@
 #ifndef HW_ETRAXFS_DMA_H
 #define HW_ETRAXFS_DMA_H
 
+#include "exec/hwaddr.h"
+#include "hw/irq.h"
+
 struct dma_context_metadata {
 	/* data descriptor md */
 	uint16_t metadata;

include/hw/display/i2c-ddc.h

@@ -20,6 +20,7 @@
 #define I2C_DDC_H
 
 #include "hw/display/edid.h"
+#include "hw/i2c/i2c.h"
 
 /* A simple I2C slave which just returns the contents of its EDID blob. */
 struct I2CDDCState {

include/hw/empty_slot.h

@@ -1,6 +1,8 @@
 #ifndef HW_EMPTY_SLOT_H
 #define HW_EMPTY_SLOT_H
 
+#include "exec/hwaddr.h"
+
 /* empty_slot.c */
 void empty_slot_init(hwaddr addr, uint64_t slot_size);
 

include/hw/gpio/bcm2835_gpio.h

@@ -15,6 +15,7 @@
 #define BCM2835_GPIO_H
 
 #include "hw/sd/sd.h"
+#include "hw/sysbus.h"
 
 typedef struct BCM2835GpioState {
     SysBusDevice parent_obj;

include/hw/i2c/aspeed_i2c.h

@@ -17,10 +17,12 @@
  *  with this program; if not, write to the Free Software Foundation, Inc.,
  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
+
 #ifndef ASPEED_I2C_H
 #define ASPEED_I2C_H
 
 #include "hw/i2c/i2c.h"
+#include "hw/sysbus.h"
 
 #define TYPE_ASPEED_I2C "aspeed.i2c"
 #define ASPEED_I2C(obj) \

include/hw/i386/apic_internal.h

@@ -24,6 +24,7 @@
 #include "cpu.h"
 #include "exec/memory.h"
 #include "qemu/timer.h"
+#include "target/i386/cpu-qom.h"
 
 /* APIC Local Vector Table */
 #define APIC_LVT_TIMER                  0

include/hw/i386/ioapic_internal.h

@@ -24,6 +24,7 @@
 
 #include "hw/hw.h"
 #include "exec/memory.h"
+#include "hw/i386/ioapic.h"
 #include "hw/sysbus.h"
 #include "qemu/notify.h"
 

include/hw/intc/allwinner-a10-pic.h

@@ -1,6 +1,8 @@
 #ifndef ALLWINNER_A10_PIC_H
 #define ALLWINNER_A10_PIC_H
 
+#include "hw/sysbus.h"
+
 #define TYPE_AW_A10_PIC  "allwinner-a10-pic"
 #define AW_A10_PIC(obj) OBJECT_CHECK(AwA10PICState, (obj), TYPE_AW_A10_PIC)
 

include/hw/intc/heathrow_pic.h

@@ -26,6 +26,8 @@
 #ifndef HW_INTC_HEATHROW_PIC_H
 #define HW_INTC_HEATHROW_PIC_H
 
+#include "hw/sysbus.h"
+
 #define TYPE_HEATHROW "heathrow"
 #define HEATHROW(obj) OBJECT_CHECK(HeathrowState, (obj), TYPE_HEATHROW)
 

include/hw/intc/mips_gic.h

@@ -13,6 +13,7 @@
 
 #include "qemu/units.h"
 #include "hw/timer/mips_gictimer.h"
+#include "hw/sysbus.h"
 #include "cpu.h"
 /*
  * GIC Specific definitions

include/hw/isa/vt82c686.h

@@ -1,6 +1,8 @@
 #ifndef HW_VT82C686_H
 #define HW_VT82C686_H
 
+#include "hw/irq.h"
+
 #define TYPE_VT82C686B_SUPERIO "vt82c686b-superio"
 
 /* vt82c686.c */

include/hw/mips/cps.h

@@ -25,6 +25,7 @@
 #include "hw/intc/mips_gic.h"
 #include "hw/misc/mips_cpc.h"
 #include "hw/misc/mips_itu.h"
+#include "target/mips/cpu.h"
 
 #define TYPE_MIPS_CPS "mips-cps"
 #define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS)

include/hw/misc/macio/cuda.h

@@ -26,6 +26,8 @@
 #ifndef CUDA_H
 #define CUDA_H
 
+#include "hw/misc/mos6522.h"
+
 /* CUDA commands (2nd byte) */
 #define CUDA_WARM_START                0x0
 #define CUDA_AUTOPOLL                  0x1

include/hw/misc/macio/gpio.h

@@ -26,6 +26,9 @@
 #ifndef MACIO_GPIO_H
 #define MACIO_GPIO_H
 
+#include "hw/ppc/openpic.h"
+#include "hw/sysbus.h"
+
 #define TYPE_MACIO_GPIO "macio-gpio"
 #define MACIO_GPIO(obj) OBJECT_CHECK(MacIOGPIOState, (obj), TYPE_MACIO_GPIO)
 

include/hw/misc/macio/macio.h

@@ -27,10 +27,12 @@
 #define MACIO_H
 
 #include "hw/char/escc.h"
+#include "hw/ide/internal.h"
 #include "hw/intc/heathrow_pic.h"
 #include "hw/misc/macio/cuda.h"
 #include "hw/misc/macio/gpio.h"
 #include "hw/misc/macio/pmu.h"
+#include "hw/ppc/mac.h"
 #include "hw/ppc/mac_dbdma.h"
 #include "hw/ppc/openpic.h"
 

include/hw/misc/macio/pmu.h

@@ -10,6 +10,9 @@
 #ifndef PMU_H
 #define PMU_H
 
+#include "hw/misc/mos6522.h"
+#include "hw/misc/macio/gpio.h"
+
 /*
  * PMU commands
  */

include/hw/misc/mips_cmgcr.h

@@ -10,6 +10,8 @@
 #ifndef MIPS_CMGCR_H
 #define MIPS_CMGCR_H
 
+#include "hw/sysbus.h"
+
 #define TYPE_MIPS_GCR "mips-gcr"
 #define MIPS_GCR(obj) OBJECT_CHECK(MIPSGCRState, (obj), TYPE_MIPS_GCR)
 

include/hw/misc/mips_cpc.h

@@ -20,6 +20,8 @@
 #ifndef MIPS_CPC_H
 #define MIPS_CPC_H
 
+#include "hw/sysbus.h"
+
 #define CPC_ADDRSPACE_SZ    0x6000
 
 /* CPC blocks offsets relative to base address */

include/hw/misc/pvpanic.h

@@ -11,9 +11,12 @@
  * See the COPYING file in the top-level directory.
  *
  */
+
 #ifndef HW_MISC_PVPANIC_H
 #define HW_MISC_PVPANIC_H
 
+#include "qom/object.h"
+
 #define TYPE_PVPANIC "pvpanic"
 
 #define PVPANIC_IOPORT_PROP "ioport"

include/hw/net/allwinner_emac.h

@@ -27,6 +27,7 @@
 #include "net/net.h"
 #include "qemu/fifo8.h"
 #include "hw/net/mii.h"
+#include "hw/sysbus.h"
 
 #define TYPE_AW_EMAC "allwinner-emac"
 #define AW_EMAC(obj) OBJECT_CHECK(AwEmacState, (obj), TYPE_AW_EMAC)

include/hw/net/lance.h

@@ -31,6 +31,7 @@
 
 #include "net/net.h"
 #include "hw/net/pcnet.h"
+#include "hw/sysbus.h"
 
 #define TYPE_LANCE "lance"
 #define SYSBUS_PCNET(obj) \

include/hw/nvram/chrp_nvram.h

@@ -18,6 +18,8 @@
 #ifndef CHRP_NVRAM_H
 #define CHRP_NVRAM_H
 
+#include "qemu/bswap.h"
+
 /* OpenBIOS NVRAM partition */
 typedef struct {
     uint8_t signature;

include/hw/pci-host/sabre.h

@@ -1,6 +1,8 @@
 #ifndef HW_PCI_HOST_SABRE_H
 #define HW_PCI_HOST_SABRE_H
 
+#include "hw/pci/pci.h"
+#include "hw/pci/pci_host.h"
 #include "hw/sparc/sun4u_iommu.h"
 
 #define MAX_IVEC 0x40

include/hw/pci-host/uninorth.h

@@ -26,7 +26,7 @@
 #define UNINORTH_H
 
 #include "hw/hw.h"
-
+#include "hw/pci/pci_host.h"
 #include "hw/ppc/openpic.h"
 
 /* UniNorth version */

include/hw/pci/pcie_aer.h

@@ -22,6 +22,7 @@
 #define QEMU_PCIE_AER_H
 
 #include "hw/hw.h"
+#include "hw/pci/pci_regs.h"
 
 /* definitions which PCIExpressDevice uses */
 

include/hw/ppc/pnv_core.h

@@ -21,6 +21,7 @@
 #define PPC_PNV_CORE_H
 
 #include "hw/cpu/core.h"
+#include "target/ppc/cpu.h"
 
 #define TYPE_PNV_CORE "powernv-cpu-core"
 #define PNV_CORE(obj) \

include/hw/ppc/ppc4xx.h

@@ -25,6 +25,10 @@
 #ifndef PPC4XX_H
 #define PPC4XX_H
 
+#include "hw/ppc/ppc.h"
+#include "exec/cpu-common.h"
+#include "exec/memory.h"
+
 /* PowerPC 4xx core initialization */
 PowerPCCPU *ppc4xx_init(const char *cpu_model,
                         clk_setup_t *cpu_clk, clk_setup_t *tb_clk,

include/hw/ppc/spapr_irq.h

@@ -10,6 +10,9 @@
 #ifndef HW_SPAPR_IRQ_H
 #define HW_SPAPR_IRQ_H
 
+#include "hw/irq.h"
+#include "target/ppc/cpu-qom.h"
+
 /*
  * IRQ range offsets per device type
  */

include/hw/ppc/spapr_vio.h

@@ -22,6 +22,7 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
+#include "hw/ppc/spapr.h"
 #include "sysemu/dma.h"
 
 #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"

include/hw/ppc/spapr_xive.h

@@ -10,7 +10,9 @@
 #ifndef PPC_SPAPR_XIVE_H
 #define PPC_SPAPR_XIVE_H
 
+#include "hw/ppc/spapr_irq.h"
 #include "hw/ppc/xive.h"
+#include "sysemu/sysemu.h"
 
 #define TYPE_SPAPR_XIVE "spapr-xive"
 #define SPAPR_XIVE(obj) OBJECT_CHECK(SpaprXive, (obj), TYPE_SPAPR_XIVE)

include/hw/ppc/xive_regs.h

@@ -16,6 +16,9 @@
 #ifndef PPC_XIVE_REGS_H
 #define PPC_XIVE_REGS_H
 
+#include "qemu/bswap.h"
+#include "qemu/host-utils.h"
+
 /*
  * Interrupt source number encoding on PowerBUS
  */

include/hw/riscv/boot.h

@@ -20,6 +20,8 @@
 #ifndef RISCV_BOOT_H
 #define RISCV_BOOT_H
 
+#include "exec/cpu-defs.h"
+
 void riscv_find_and_load_firmware(MachineState *machine,
                                   const char *default_machine_firmware,
                                   hwaddr firmware_load_addr);

include/hw/riscv/riscv_hart.h

@@ -21,6 +21,9 @@
 #ifndef HW_RISCV_HART_H
 #define HW_RISCV_HART_H
 
+#include "hw/sysbus.h"
+#include "target/riscv/cpu.h"
+
 #define TYPE_RISCV_HART_ARRAY "riscv.hart_array"
 
 #define RISCV_HART_ARRAY(obj) \

include/hw/riscv/sifive_clint.h

@@ -20,6 +20,8 @@
 #ifndef HW_SIFIVE_CLINT_H
 #define HW_SIFIVE_CLINT_H
 
+#include "hw/sysbus.h"
+
 #define TYPE_SIFIVE_CLINT "riscv.sifive.clint"
 
 #define SIFIVE_CLINT(obj) \

include/hw/riscv/sifive_e.h

@@ -19,6 +19,7 @@
 #ifndef HW_SIFIVE_E_H
 #define HW_SIFIVE_E_H
 
+#include "hw/riscv/riscv_hart.h"
 #include "hw/riscv/sifive_gpio.h"
 
 #define TYPE_RISCV_E_SOC "riscv.sifive.e.soc"

include/hw/riscv/sifive_plic.h

@@ -21,7 +21,7 @@
 #ifndef HW_SIFIVE_PLIC_H
 #define HW_SIFIVE_PLIC_H
 
-#include "hw/irq.h"
+#include "hw/sysbus.h"
 
 #define TYPE_SIFIVE_PLIC "riscv.sifive.plic"
 

include/hw/riscv/sifive_prci.h

@@ -19,6 +19,8 @@
 #ifndef HW_SIFIVE_PRCI_H
 #define HW_SIFIVE_PRCI_H
 
+#include "hw/sysbus.h"
+
 enum {
     SIFIVE_PRCI_HFROSCCFG   = 0x0,
     SIFIVE_PRCI_HFXOSCCFG   = 0x4,

include/hw/riscv/sifive_test.h

@@ -19,6 +19,8 @@
 #ifndef HW_SIFIVE_TEST_H
 #define HW_SIFIVE_TEST_H
 
+#include "hw/sysbus.h"
+
 #define TYPE_SIFIVE_TEST "riscv.sifive.test"
 
 #define SIFIVE_TEST(obj) \

include/hw/riscv/sifive_u.h

@@ -20,6 +20,7 @@
 #define HW_SIFIVE_U_H
 
 #include "hw/net/cadence_gem.h"
+#include "hw/riscv/riscv_hart.h"
 
 #define TYPE_RISCV_U_SOC "riscv.sifive.u.soc"
 #define RISCV_U_SOC(obj) \

include/hw/riscv/sifive_uart.h

@@ -20,6 +20,9 @@
 #ifndef HW_SIFIVE_UART_H
 #define HW_SIFIVE_UART_H
 
+#include "chardev/char-fe.h"
+#include "hw/sysbus.h"
+
 enum {
     SIFIVE_UART_TXFIFO        = 0,
     SIFIVE_UART_RXFIFO        = 4,

include/hw/riscv/spike.h

@@ -19,6 +19,9 @@
 #ifndef HW_RISCV_SPIKE_H
 #define HW_RISCV_SPIKE_H
 
+#include "hw/riscv/riscv_hart.h"
+#include "hw/sysbus.h"
+
 typedef struct {
     /*< private >*/
     SysBusDevice parent_obj;

include/hw/riscv/virt.h

@@ -19,6 +19,9 @@
 #ifndef HW_RISCV_VIRT_H
 #define HW_RISCV_VIRT_H
 
+#include "hw/riscv/riscv_hart.h"
+#include "hw/sysbus.h"
+
 typedef struct {
     /*< private >*/
     SysBusDevice parent_obj;

include/hw/s390x/ap-device.h

@@ -7,9 +7,12 @@
  * your option) any later version. See the COPYING file in the top-level
  * directory.
  */
+
 #ifndef HW_S390X_AP_DEVICE_H
 #define HW_S390X_AP_DEVICE_H
 
+#include "hw/qdev-core.h"
+
 #define AP_DEVICE_TYPE       "ap-device"
 
 typedef struct APDevice {

include/hw/s390x/css-bridge.h

@@ -12,8 +12,9 @@
 
 #ifndef HW_S390X_CSS_BRIDGE_H
 #define HW_S390X_CSS_BRIDGE_H
+
 #include "qom/object.h"
-#include "hw/qdev-core.h"
+#include "hw/sysbus.h"
 
 /* virtual css bridge */
 typedef struct VirtualCssBridge {

include/hw/s390x/css.h

@@ -17,6 +17,7 @@
 #include "hw/s390x/s390_flic.h"
 #include "hw/s390x/ioinst.h"
 #include "sysemu/kvm.h"
+#include "target/s390x/cpu-qom.h"
 
 /* Channel subsystem constants. */
 #define MAX_DEVNO 65535

include/hw/s390x/tod.h

@@ -12,7 +12,7 @@
 #define HW_S390_TOD_H
 
 #include "hw/qdev.h"
-#include "s390-tod.h"
+#include "target/s390x/s390-tod.h"
 
 typedef struct S390TOD {
     uint8_t high;

include/hw/semihosting/console.h

@@ -9,6 +9,8 @@
 #ifndef SEMIHOST_CONSOLE_H
 #define SEMIHOST_CONSOLE_H
 
+#include "cpu.h"
+
 /**
  * qemu_semihosting_console_outs:
  * @env: CPUArchState

include/hw/sh4/sh_intc.h

@@ -1,6 +1,7 @@
 #ifndef SH_INTC_H
 #define SH_INTC_H
 
+#include "exec/memory.h"
 #include "hw/irq.h"
 
 typedef unsigned char intc_enum;

include/hw/sparc/sparc64.h

@@ -1,6 +1,8 @@
 #ifndef HW_SPARC_SPARC64_H
 #define HW_SPARC_SPARC64_H
 
+#include "target/sparc/cpu-qom.h"
+
 #define IVEC_MAX             0x40
 
 SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr);

include/hw/ssi/aspeed_smc.h

@@ -26,6 +26,7 @@
 #define ASPEED_SMC_H
 
 #include "hw/ssi/ssi.h"
+#include "hw/sysbus.h"
 
 typedef struct AspeedSegments {
     hwaddr addr;

include/hw/ssi/xilinx_spips.h

@@ -28,6 +28,7 @@
 #include "hw/ssi/ssi.h"
 #include "qemu/fifo32.h"
 #include "hw/stream.h"
+#include "hw/sysbus.h"
 
 typedef struct XilinxSPIPS XilinxSPIPS;
 

include/hw/timer/allwinner-a10-pit.h

@@ -2,6 +2,7 @@
 #define ALLWINNER_A10_PIT_H
 
 #include "hw/ptimer.h"
+#include "hw/sysbus.h"
 
 #define TYPE_AW_A10_PIT "allwinner-A10-timer"
 #define AW_A10_PIT(obj) OBJECT_CHECK(AwA10PITState, (obj), TYPE_AW_A10_PIT)

include/hw/timer/i8254_internal.h

@@ -27,6 +27,7 @@
 
 #include "hw/hw.h"
 #include "hw/isa/isa.h"
+#include "hw/timer/i8254.h"
 #include "qemu/timer.h"
 
 typedef struct PITChannelState {

include/hw/timer/m48t59.h

@@ -1,6 +1,8 @@
 #ifndef HW_M48T59_H
 #define HW_M48T59_H
 
+#include "exec/hwaddr.h"
+#include "hw/irq.h"
 #include "qom/object.h"
 
 #define TYPE_NVRAM "nvram"

include/hw/timer/mc146818rtc_regs.h

@@ -25,6 +25,8 @@
 #ifndef MC146818RTC_REGS_H
 #define MC146818RTC_REGS_H
 
+#include "qemu/timer.h"
+
 #define RTC_ISA_IRQ 8
 
 #define RTC_SECONDS             0

include/hw/timer/xlnx-zynqmp-rtc.h

@@ -28,6 +28,7 @@
 #define HW_TIMER_XLNX_ZYNQMP_RTC_H
 
 #include "hw/register.h"
+#include "hw/sysbus.h"
 
 #define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc"
 

include/hw/virtio/virtio-access.h

@@ -16,6 +16,7 @@
 #ifndef QEMU_VIRTIO_ACCESS_H
 #define QEMU_VIRTIO_ACCESS_H
 
+#include "exec/hwaddr.h"
 #include "hw/virtio/virtio.h"
 #include "hw/virtio/virtio-bus.h"
 

include/hw/virtio/virtio-gpu-bswap.h

@@ -15,6 +15,7 @@
 #define HW_VIRTIO_GPU_BSWAP_H
 
 #include "qemu/bswap.h"
+#include "standard-headers/linux/virtio_gpu.h"
 
 static inline void
 virtio_gpu_ctrl_hdr_bswap(struct virtio_gpu_ctrl_hdr *hdr)

include/hw/virtio/virtio-rng.h

@@ -12,6 +12,7 @@
 #ifndef QEMU_VIRTIO_RNG_H
 #define QEMU_VIRTIO_RNG_H
 
+#include "hw/virtio/virtio.h"
 #include "sysemu/rng.h"
 #include "sysemu/rng-random.h"
 #include "standard-headers/linux/virtio_rng.h"

include/hw/watchdog/wdt_aspeed.h

@@ -10,6 +10,7 @@
 #ifndef WDT_ASPEED_H
 #define WDT_ASPEED_H
 
+#include "hw/misc/aspeed_scu.h"
 #include "hw/sysbus.h"
 
 #define TYPE_ASPEED_WDT "aspeed.wdt"

include/libdecnumber/decNumberLocal.h

@@ -44,6 +44,7 @@
   #define DECNLAUTHOR	"Mike Cowlishaw"	      /* Who to blame */
 
   #include "libdecnumber/dconfig.h"
+  #include "libdecnumber/decContext.h"
 
   /* Conditional code flag -- set this to match hardware platform     */
   /* 1=little-endian, 0=big-endian	                              */

include/migration/cpu.h

@@ -1,7 +1,10 @@
 /* Declarations for use for CPU state serialization.  */
+
 #ifndef MIGRATION_CPU_H
 #define MIGRATION_CPU_H
 
+#include "exec/cpu-defs.h"
+
 #if TARGET_LONG_BITS == 64
 #define qemu_put_betl qemu_put_be64
 #define qemu_get_betl qemu_get_be64

include/monitor/hmp-target.h

@@ -25,6 +25,8 @@
 #ifndef MONITOR_HMP_TARGET_H
 #define MONITOR_HMP_TARGET_H
 
+#include "cpu.h"
+
 #define MD_TLONG 0
 #define MD_I32   1
 

include/qemu/atomic128.h

@@ -13,6 +13,8 @@
 #ifndef QEMU_ATOMIC128_H
 #define QEMU_ATOMIC128_H
 
+#include "qemu/int128.h"
+
 /*
  * GCC is a house divided about supporting large atomic operations.
  *

include/qemu/ratelimit.h

@@ -14,6 +14,8 @@
 #ifndef QEMU_RATELIMIT_H
 #define QEMU_RATELIMIT_H
 
+#include "qemu/timer.h"
+
 typedef struct {
     int64_t slice_start_time;
     int64_t slice_end_time;

include/qemu/thread-win32.h

@@ -47,6 +47,6 @@ struct QemuThread {
 };
 
 /* Only valid for joinable threads.  */
-HANDLE qemu_thread_get_handle(QemuThread *thread);
+HANDLE qemu_thread_get_handle(struct QemuThread *thread);
 
 #endif

include/sysemu/balloon.h

@@ -14,6 +14,7 @@
 #ifndef QEMU_BALLOON_H
 #define QEMU_BALLOON_H
 
+#include "exec/cpu-common.h"
 #include "qapi/qapi-types-misc.h"
 
 typedef void (QEMUBalloonEvent)(void *opaque, ram_addr_t target);

include/sysemu/cryptodev-vhost-user.h

@@ -20,9 +20,12 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  *
  */
+
 #ifndef CRYPTODEV_VHOST_USER_H
 #define CRYPTODEV_VHOST_USER_H
 
+#include "sysemu/cryptodev-vhost.h"
+
 #define VHOST_USER_MAX_AUTH_KEY_LEN    512
 #define VHOST_USER_MAX_CIPHER_KEY_LEN  64
 

include/sysemu/hvf.h

@@ -13,6 +13,7 @@
 #ifndef HVF_H
 #define HVF_H
 
+#include "cpu.h"
 #include "qemu/bitops.h"
 #include "exec/memory.h"
 #include "sysemu/accel.h"

include/sysemu/iothread.h

@@ -16,6 +16,7 @@
 
 #include "block/aio.h"
 #include "qemu/thread.h"
+#include "qom/object.h"
 
 #define TYPE_IOTHREAD "iothread"
 

include/sysemu/kvm_int.h

@@ -9,6 +9,8 @@
 #ifndef QEMU_KVM_INT_H
 #define QEMU_KVM_INT_H
 
+#include "exec/cpu-common.h"
+#include "exec/memory.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/accel.h"
 #include "sysemu/kvm.h"