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exec: Drop TARGET_PHYS_ADDR_SPACE_BITS

The macro is no longer in use and can safely be dropped.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-ID: <20260218-phys_addr-v6-7-a603bf363218@rev.ng>
[PMD: Keep TARGET_PHYS_ADDR_SPACE_BITS poisoned]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
master
Anton Johansson 8 months ago
committed by Philippe Mathieu-Daudé
parent
commit
cf884c075e
  1. 3
      include/exec/cpu-defs.h
  2. 3
      target/alpha/cpu-param.h
  3. 2
      target/arm/cpu-param.h
  4. 1
      target/avr/cpu-param.h
  5. 1
      target/hexagon/cpu-param.h
  6. 3
      target/hppa/cpu-param.h
  7. 2
      target/i386/cpu-param.h
  8. 1
      target/loongarch/cpu-param.h
  9. 1
      target/m68k/cpu-param.h
  10. 2
      target/microblaze/cpu-param.h
  11. 2
      target/mips/cpu-param.h
  12. 1
      target/or1k/cpu-param.h
  13. 7
      target/ppc/cpu-param.h
  14. 2
      target/riscv/cpu-param.h
  15. 1
      target/rx/cpu-param.h
  16. 1
      target/s390x/cpu-param.h
  17. 1
      target/sh4/cpu-param.h
  18. 2
      target/sparc/cpu-param.h
  19. 1
      target/tricore/cpu-param.h
  20. 1
      target/xtensa/cpu-param.h

3
include/exec/cpu-defs.h

@ -28,9 +28,6 @@
#ifndef TARGET_LONG_BITS
# error TARGET_LONG_BITS must be defined in cpu-param.h
#endif
#ifndef TARGET_PHYS_ADDR_SPACE_BITS
# error TARGET_PHYS_ADDR_SPACE_BITS must be defined in cpu-param.h
#endif
#ifndef TARGET_VIRT_ADDR_SPACE_BITS
# error TARGET_VIRT_ADDR_SPACE_BITS must be defined in cpu-param.h
#endif

3
target/alpha/cpu-param.h

@ -8,9 +8,6 @@
#ifndef ALPHA_CPU_PARAM_H
#define ALPHA_CPU_PARAM_H
/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
#define TARGET_PHYS_ADDR_SPACE_BITS 44
#ifdef CONFIG_USER_ONLY
/*
* Allow user-only to vary page size. Real hardware allows only 8k and 64k,

2
target/arm/cpu-param.h

@ -9,10 +9,8 @@
#define ARM_CPU_PARAM_H
#ifdef TARGET_AARCH64
# define TARGET_PHYS_ADDR_SPACE_BITS 52
# define TARGET_VIRT_ADDR_SPACE_BITS 52
#else
# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

1
target/avr/cpu-param.h

@ -22,7 +22,6 @@
#define AVR_CPU_PARAM_H
#define TARGET_PAGE_BITS 10
#define TARGET_PHYS_ADDR_SPACE_BITS 24
#define TARGET_VIRT_ADDR_SPACE_BITS 24
#endif

1
target/hexagon/cpu-param.h

@ -20,7 +20,6 @@
#define TARGET_PAGE_BITS 16 /* 64K pages */
#define TARGET_PHYS_ADDR_SPACE_BITS 36
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

3
target/hppa/cpu-param.h

@ -9,11 +9,8 @@
#define HPPA_CPU_PARAM_H
#if defined(CONFIG_USER_ONLY) && defined(TARGET_ABI32)
# define TARGET_PHYS_ADDR_SPACE_BITS 32
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#else
/* ??? PA-8000 through 8600 have 40 bits; PA-8700 and 8900 have 44 bits. */
# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 64
#endif

2
target/i386/cpu-param.h

@ -9,7 +9,6 @@
#define I386_CPU_PARAM_H
#ifdef TARGET_X86_64
# define TARGET_PHYS_ADDR_SPACE_BITS 52
/*
* ??? This is really 48 bits, sign-extended, but the only thing
* accessible to userland with bit 48 set is the VSYSCALL, and that
@ -17,7 +16,6 @@
*/
# define TARGET_VIRT_ADDR_SPACE_BITS 47
#else
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
#define TARGET_PAGE_BITS 12

1
target/loongarch/cpu-param.h

@ -8,7 +8,6 @@
#ifndef LOONGARCH_CPU_PARAM_H
#define LOONGARCH_CPU_PARAM_H
#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48
#define TARGET_PAGE_BITS 12

1
target/m68k/cpu-param.h

@ -14,7 +14,6 @@
* use the smallest one
*/
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

2
target/microblaze/cpu-param.h

@ -17,10 +17,8 @@
* of address space.
*/
#ifdef CONFIG_USER_ONLY
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#else
#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
#endif

2
target/mips/cpu-param.h

@ -8,10 +8,8 @@
#define MIPS_CPU_PARAM_H
#ifdef TARGET_ABI_MIPSN64
#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48
#else
#define TARGET_PHYS_ADDR_SPACE_BITS 40
# ifdef CONFIG_USER_ONLY
# define TARGET_VIRT_ADDR_SPACE_BITS 31
# else

1
target/or1k/cpu-param.h

@ -9,7 +9,6 @@
#define OPENRISC_CPU_PARAM_H
#define TARGET_PAGE_BITS 13
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

7
target/ppc/cpu-param.h

@ -9,12 +9,6 @@
#define PPC_CPU_PARAM_H
#ifdef TARGET_PPC64
/*
* Note that the official physical address space bits is 62-M where M
* is implementation dependent. I've not looked up M for the set of
* cpus we emulate at the system level.
*/
#define TARGET_PHYS_ADDR_SPACE_BITS 62
/*
* Note that the PPC environment architecture talks about 80 bit virtual
* addresses, with segmentation. Obviously that's not all visible to a
@ -26,7 +20,6 @@
# define TARGET_VIRT_ADDR_SPACE_BITS 64
# endif
#else
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

2
target/riscv/cpu-param.h

@ -9,10 +9,8 @@
#define RISCV_CPU_PARAM_H
#if defined(TARGET_RISCV64)
# define TARGET_PHYS_ADDR_SPACE_BITS 56 /* 44-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 48 /* sv48 */
#elif defined(TARGET_RISCV32)
# define TARGET_PHYS_ADDR_SPACE_BITS 34 /* 22-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 32 /* sv32 */
#endif
#define TARGET_PAGE_BITS 12 /* 4 KiB Pages */

1
target/rx/cpu-param.h

@ -21,7 +21,6 @@
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

1
target/s390x/cpu-param.h

@ -9,7 +9,6 @@
#define S390_CPU_PARAM_H
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
#endif

1
target/sh4/cpu-param.h

@ -9,7 +9,6 @@
#define SH4_CPU_PARAM_H
#define TARGET_PAGE_BITS 12 /* 4k */
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
# define TARGET_VIRT_ADDR_SPACE_BITS 31
#else

2
target/sparc/cpu-param.h

@ -9,7 +9,6 @@
#ifdef TARGET_SPARC64
# define TARGET_PAGE_BITS 13 /* 8k */
# define TARGET_PHYS_ADDR_SPACE_BITS 41
# ifdef TARGET_ABI32
# define TARGET_VIRT_ADDR_SPACE_BITS 32
# else
@ -17,7 +16,6 @@
# endif
#else
# define TARGET_PAGE_BITS 12 /* 4k */
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

1
target/tricore/cpu-param.h

@ -9,7 +9,6 @@
#define TRICORE_CPU_PARAM_H
#define TARGET_PAGE_BITS 14
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

1
target/xtensa/cpu-param.h

@ -9,7 +9,6 @@
#define XTENSA_CPU_PARAM_H
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
#define TARGET_VIRT_ADDR_SPACE_BITS 30
#else

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