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target/hppa: Use big-endian variant of cpu_ld/st_data*() 

We only build the HPPA target using big endianness order,
therefore the cpu_ld/st_data*() definitions expand to the big
endian declarations. Use the explicit big-endian variants.

Mechanical change running:

  $ tgt=hppa; \
    end=be; \
    for op in data mmuidx_ra; do \
      for ac in uw sw l q; do \
        sed -i -e "s/cpu_ld${ac}_${op}/cpu_ld${ac}_${end}_${op}/" \
                  $(git grep -l cpu_ target/${tgt}/); \
      done;
      for ac in w l q; do \
        sed -i -e "s/cpu_st${ac}_${op}/cpu_st${ac}_${end}_${op}/" \
                  $(git grep -l cpu_ target/${tgt}/); \
      done;
    done

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251229225517.45078-2-philmd@linaro.org>
pull/316/head
Philippe Mathieu-Daudé 5 months ago
parent
dffb3938aa
commit
c77d0e9009
1 changed files with 22 additions and 22 deletions
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  1. 44
      target/hppa/op_helper.c

44
target/hppa/op_helper.c
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@ -107,7 +107,7 @@ static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ulong val,
cpu_stb_data_ra(env, addr, val, ra);
break;
case 2:
cpu_stw_data_ra(env, addr, val, ra);
cpu_stw_be_data_ra(env, addr, val, ra);
break;
case 1:
/* The 3 byte store must appear atomic. */
@ -115,11 +115,11 @@ static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ulong val,
atomic_store_mask32(env, addr, val, 0x00ffffffu, ra);
} else {
cpu_stb_data_ra(env, addr, val >> 16, ra);
cpu_stw_data_ra(env, addr + 1, val, ra);
cpu_stw_be_data_ra(env, addr + 1, val, ra);
}
break;
default:
cpu_stl_data_ra(env, addr, val, ra);
cpu_stl_be_data_ra(env, addr, val, ra);
break;
}
}
@ -132,7 +132,7 @@ static void do_stdby_b(CPUHPPAState *env, target_ulong addr, uint64_t val,
cpu_stb_data_ra(env, addr, val, ra);
break;
case 6:
cpu_stw_data_ra(env, addr, val, ra);
cpu_stw_be_data_ra(env, addr, val, ra);
break;
case 5:
/* The 3 byte store must appear atomic. */
@ -140,11 +140,11 @@ static void do_stdby_b(CPUHPPAState *env, target_ulong addr, uint64_t val,
atomic_store_mask32(env, addr, val, 0x00ffffffu, ra);
} else {
cpu_stb_data_ra(env, addr, val >> 16, ra);
cpu_stw_data_ra(env, addr + 1, val, ra);
cpu_stw_be_data_ra(env, addr + 1, val, ra);
}
break;
case 4:
cpu_stl_data_ra(env, addr, val, ra);
cpu_stl_be_data_ra(env, addr, val, ra);
break;
case 3:
/* The 5 byte store must appear atomic. */
@ -152,7 +152,7 @@ static void do_stdby_b(CPUHPPAState *env, target_ulong addr, uint64_t val,
atomic_store_mask64(env, addr, val, 0x000000ffffffffffull, 5, ra);
} else {
cpu_stb_data_ra(env, addr, val >> 32, ra);
cpu_stl_data_ra(env, addr + 1, val, ra);
cpu_stl_be_data_ra(env, addr + 1, val, ra);
}
break;
case 2:
@ -160,8 +160,8 @@ static void do_stdby_b(CPUHPPAState *env, target_ulong addr, uint64_t val,
if (parallel) {
atomic_store_mask64(env, addr, val, 0x0000ffffffffffffull, 6, ra);
} else {
cpu_stw_data_ra(env, addr, val >> 32, ra);
cpu_stl_data_ra(env, addr + 2, val, ra);
cpu_stw_be_data_ra(env, addr, val >> 32, ra);
cpu_stl_be_data_ra(env, addr + 2, val, ra);
}
break;
case 1:
@ -170,12 +170,12 @@ static void do_stdby_b(CPUHPPAState *env, target_ulong addr, uint64_t val,
atomic_store_mask64(env, addr, val, 0x00ffffffffffffffull, 7, ra);
} else {
cpu_stb_data_ra(env, addr, val >> 48, ra);
cpu_stw_data_ra(env, addr + 1, val >> 32, ra);
cpu_stl_data_ra(env, addr + 3, val, ra);
cpu_stw_be_data_ra(env, addr + 1, val >> 32, ra);
cpu_stl_be_data_ra(env, addr + 3, val, ra);
}
break;
default:
cpu_stq_data_ra(env, addr, val, ra);
cpu_stq_be_data_ra(env, addr, val, ra);
break;
}
}
@ -211,12 +211,12 @@ static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ulong val,
if (parallel) {
atomic_store_mask32(env, addr - 3, val, 0xffffff00u, ra);
} else {
cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
cpu_stw_be_data_ra(env, addr - 3, val >> 16, ra);
cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
}
break;
case 2:
cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
cpu_stw_be_data_ra(env, addr - 2, val >> 16, ra);
break;
case 1:
cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
@ -239,8 +239,8 @@ static void do_stdby_e(CPUHPPAState *env, target_ulong addr, uint64_t val,
atomic_store_mask64(env, addr - 7, val,
0xffffffffffffff00ull, 7, ra);
} else {
cpu_stl_data_ra(env, addr - 7, val >> 32, ra);
cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
cpu_stl_be_data_ra(env, addr - 7, val >> 32, ra);
cpu_stw_be_data_ra(env, addr - 3, val >> 16, ra);
cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
}
break;
@ -250,8 +250,8 @@ static void do_stdby_e(CPUHPPAState *env, target_ulong addr, uint64_t val,
atomic_store_mask64(env, addr - 6, val,
0xffffffffffff0000ull, 6, ra);
} else {
cpu_stl_data_ra(env, addr - 6, val >> 32, ra);
cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
cpu_stl_be_data_ra(env, addr - 6, val >> 32, ra);
cpu_stw_be_data_ra(env, addr - 2, val >> 16, ra);
}
break;
case 5:
@ -260,24 +260,24 @@ static void do_stdby_e(CPUHPPAState *env, target_ulong addr, uint64_t val,
atomic_store_mask64(env, addr - 5, val,
0xffffffffff000000ull, 5, ra);
} else {
cpu_stl_data_ra(env, addr - 5, val >> 32, ra);
cpu_stl_be_data_ra(env, addr - 5, val >> 32, ra);
cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
}
break;
case 4:
cpu_stl_data_ra(env, addr - 4, val >> 32, ra);
cpu_stl_be_data_ra(env, addr - 4, val >> 32, ra);
break;
case 3:
/* The 3 byte store must appear atomic. */
if (parallel) {
atomic_store_mask32(env, addr - 3, val >> 32, 0xffffff00u, ra);
} else {
cpu_stw_data_ra(env, addr - 3, val >> 48, ra);
cpu_stw_be_data_ra(env, addr - 3, val >> 48, ra);
cpu_stb_data_ra(env, addr - 1, val >> 40, ra);
}
break;
case 2:
cpu_stw_data_ra(env, addr - 2, val >> 48, ra);
cpu_stw_be_data_ra(env, addr - 2, val >> 48, ra);
break;
case 1:
cpu_stb_data_ra(env, addr - 1, val >> 56, ra);

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