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hw/loongarch/virt: Add reset support for kernel irqchip

When system reboot, interrupt controller is restored to initial
state. However if interrupt controller extioi/ipi/pch_pic is
emulated in kernel, it should notify kvm to do so. Here suspend
and restore API is used for reset, set initial state in qemu user
space and restore API is used to notify kvm to reload register
state.

Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Message-ID: <20250606063033.2557365-11-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
pull/292/head
Bibo Mao 1 year ago
committed by Song Gao
parent
commit
c642ddf19b
  1. 4
      hw/intc/loongarch_extioi.c
  2. 4
      hw/intc/loongarch_extioi_kvm.c
  3. 4
      hw/intc/loongarch_ipi.c
  4. 4
      hw/intc/loongarch_ipi_kvm.c
  5. 4
      hw/intc/loongarch_pch_pic.c
  6. 4
      hw/intc/loongarch_pic_kvm.c

4
hw/intc/loongarch_extioi.c

@ -391,6 +391,10 @@ static void loongarch_extioi_reset_hold(Object *obj, ResetType type)
if (lec->parent_phases.hold) {
lec->parent_phases.hold(obj, type);
}
if (kvm_irqchip_in_kernel()) {
kvm_extioi_put(obj, 0);
}
}
static int vmstate_extioi_pre_save(void *opaque)

4
hw/intc/loongarch_extioi_kvm.c

@ -94,6 +94,10 @@ int kvm_extioi_put(void *opaque, int version_id)
LoongArchExtIOIState *les = LOONGARCH_EXTIOI(opaque);
int fd = les->dev_fd;
if (fd == 0) {
return 0;
}
kvm_extioi_access_regs(opaque, true);
kvm_extioi_access_sw_status(opaque, true);
kvm_device_access(fd, KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL,

4
hw/intc/loongarch_ipi.c

@ -122,6 +122,10 @@ static void loongarch_ipi_reset_hold(Object *obj, ResetType type)
core->clear = 0;
memset(core->buf, 0, sizeof(core->buf));
}
if (kvm_irqchip_in_kernel()) {
kvm_ipi_put(obj, 0);
}
}
static void loongarch_ipi_cpu_plug(HotplugHandler *hotplug_dev,

4
hw/intc/loongarch_ipi_kvm.c

@ -25,6 +25,10 @@ static void kvm_ipi_access_regs(void *opaque, bool write)
uint64_t attr;
int cpu, fd = lis->dev_fd;
if (fd == 0) {
return;
}
for (cpu = 0; cpu < ipi->num_cpu; cpu++) {
core = &ipi->cpu[cpu];
attr = (cpu << 16) | CORE_STATUS_OFF;

4
hw/intc/loongarch_pch_pic.c

@ -264,6 +264,10 @@ static void loongarch_pic_reset_hold(Object *obj, ResetType type)
if (lpc->parent_phases.hold) {
lpc->parent_phases.hold(obj, type);
}
if (kvm_irqchip_in_kernel()) {
kvm_pic_put(obj, 0);
}
}
static void loongarch_pic_realize(DeviceState *dev, Error **errp)

4
hw/intc/loongarch_pic_kvm.c

@ -26,6 +26,10 @@ static void kvm_pch_pic_access(void *opaque, bool write)
int fd = lps->dev_fd;
int addr, offset;
if (fd == 0) {
return;
}
kvm_pch_pic_access_reg(fd, PCH_PIC_INT_MASK, &s->int_mask, write);
kvm_pch_pic_access_reg(fd, PCH_PIC_HTMSI_EN, &s->htmsi_en, write);
kvm_pch_pic_access_reg(fd, PCH_PIC_INT_EDGE, &s->intedge, write);

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