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Fix Sparse warnings about using plain integer as NULL pointer 

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
remotes/github/stable-0.12
Blue Swirl 17 years ago
parent
52d946208e
commit
b9d38e9510
16 changed files with 43 additions and 43 deletions
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  1. 16
      hw/nseries.c
  2. 8
      hw/omap1.c
  3. 16
      hw/omap2.c
  4. 4
      hw/omap_clk.c
  5. 10
      hw/omap_lcdc.c
  6. 2
      hw/omap_mmc.c
  7. 4
      hw/onenand.c
  8. 4
      hw/pxa2xx_lcd.c
  9. 4
      hw/pxa2xx_pcmcia.c
  10. 4
      hw/pxa2xx_template.h
  11. 2
      hw/pxa2xx_timer.c
  12. 2
      hw/sh7750_regnames.c
  13. 2
      hw/sm501.c
  14. 2
      hw/tsc210x.c
  15. 2
      linux-user/arm/nwfpe/fpa11.c
  16. 4
      target-sh4/op_helper.c

16
hw/nseries.c
View File

@ -248,7 +248,7 @@ static void n800_tsc_kbd_setup(struct n800_s *s)
/* XXX: are the three pins inverted inside the chip between the
* tsc and the cpu (N4111)? */
qemu_irq penirq = 0; /* NC */
qemu_irq penirq = NULL; /* NC */
qemu_irq kbirq = omap2_gpio_in_get(s->cpu->gpif, N800_TSC_KP_IRQ_GPIO)[0];
qemu_irq dav = omap2_gpio_in_get(s->cpu->gpif, N800_TSC_TS_GPIO)[0];
@ -716,7 +716,7 @@ static void n800_dss_init(struct rfbi_chip_s *chip)
static void n8x0_dss_setup(struct n800_s *s)
{
s->blizzard.opaque = s1d13745_init(0);
s->blizzard.opaque = s1d13745_init(NULL);
s->blizzard.block = s1d13745_write_block;
s->blizzard.write = s1d13745_write;
s->blizzard.read = s1d13745_read;
@ -769,9 +769,9 @@ static void n8x0_usb_setup(struct n800_s *s)
/* Using the NOR interface */
omap_gpmc_attach(s->cpu->gpmc, N8X0_USB_ASYNC_CS,
tusb6010_async_io(tusb), 0, 0, tusb);
tusb6010_async_io(tusb), NULL, NULL, tusb);
omap_gpmc_attach(s->cpu->gpmc, N8X0_USB_SYNC_CS,
tusb6010_sync_io(tusb), 0, 0, tusb);
tusb6010_sync_io(tusb), NULL, NULL, tusb);
s->usb = tusb;
omap2_gpio_out_set(s->cpu->gpif, N8X0_TUSB_ENABLE_GPIO, tusb_pwr);
@ -1047,7 +1047,7 @@ static struct omap_gpiosw_info_s {
"headphone", N8X0_HEADPHONE_GPIO,
OMAP_GPIOSW_TYPE_CONNECTION | OMAP_GPIOSW_INVERTED,
},
{ 0 }
{ NULL }
}, n810_gpiosw_info[] = {
{
"gps_reset", N810_GPS_RESET_GPIO,
@ -1068,7 +1068,7 @@ static struct omap_gpiosw_info_s {
"slide", N810_SLIDE_GPIO,
OMAP_GPIOSW_TYPE_COVER | OMAP_GPIOSW_INVERTED,
},
{ 0 }
{ NULL }
};
static struct omap_partition_info_s {
@ -1083,7 +1083,7 @@ static struct omap_partition_info_s {
{ 0x00280000, 0x00200000, 0x3, "initfs" },
{ 0x00480000, 0x0fb80000, 0x3, "rootfs" },
{ 0, 0, 0, 0 }
{ 0, 0, 0, NULL }
}, n810_part_info[] = {
{ 0x00000000, 0x00020000, 0x3, "bootloader" },
{ 0x00020000, 0x00060000, 0x0, "config" },
@ -1091,7 +1091,7 @@ static struct omap_partition_info_s {
{ 0x002a0000, 0x00400000, 0x0, "initfs" },
{ 0x006a0000, 0x0f960000, 0x0, "rootfs" },
{ 0, 0, 0, 0 }
{ 0, 0, 0, NULL }
};
static bdaddr_t n8x0_bd_addr = {{ N8X0_BD_ADDR }};

8
hw/omap1.c
View File

@ -436,7 +436,7 @@ static uint32_t omap2_inth_read(void *opaque, target_phys_addr_t addr)
struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
int offset = addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank = 0;
struct omap_intr_handler_bank_s *bank = NULL;
if ((offset & 0xf80) == 0x80) {
bank_no = (offset & 0x60) >> 5;
@ -514,7 +514,7 @@ static void omap2_inth_write(void *opaque, target_phys_addr_t addr,
struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
int offset = addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank = 0;
struct omap_intr_handler_bank_s *bank = NULL;
if ((offset & 0xf80) == 0x80) {
bank_no = (offset & 0x60) >> 5;
@ -4731,12 +4731,12 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
omap_findclk(s, "uart2_ck"),
omap_findclk(s, "uart2_ck"),
s->drq[OMAP_DMA_UART2_TX], s->drq[OMAP_DMA_UART2_RX],
serial_hds[0] ? serial_hds[1] : 0);
serial_hds[0] ? serial_hds[1] : NULL);
s->uart[2] = omap_uart_init(0xfffb9800, s->irq[0][OMAP_INT_UART3],
omap_findclk(s, "uart3_ck"),
omap_findclk(s, "uart3_ck"),
s->drq[OMAP_DMA_UART3_TX], s->drq[OMAP_DMA_UART3_RX],
serial_hds[0] && serial_hds[1] ? serial_hds[2] : 0);
serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);
omap_dpll_init(&s->dpll[0], 0xfffecf00, omap_findclk(s, "dpll1"));
omap_dpll_init(&s->dpll[1], 0xfffed000, omap_findclk(s, "dpll2"));

16
hw/omap2.c
View File

@ -1055,7 +1055,7 @@ struct omap_gpif_s *omap2_gpio_init(struct omap_target_agent_s *ta,
s->modules = modules;
for (i = 0; i < modules; i ++)
omap_gpio_module_init(s->module + i, ta, region[i],
irq[i], 0, 0, fclk[i], iclk);
irq[i], NULL, NULL, fclk[i], iclk);
omap_gpif_reset(s);
@ -1615,13 +1615,13 @@ static void omap_eac_format_update(struct omap_eac_s *s)
if (s->codec.in_voice) {
AUD_set_active_in(s->codec.in_voice, 0);
AUD_close_in(&s->codec.card, s->codec.in_voice);
s->codec.in_voice = 0;
s->codec.in_voice = NULL;
}
if (s->codec.out_voice) {
omap_eac_out_empty(s);
AUD_set_active_out(s->codec.out_voice, 0);
AUD_close_out(&s->codec.card, s->codec.out_voice);
s->codec.out_voice = 0;
s->codec.out_voice = NULL;
s->codec.txavail = 0;
}
/* Discard what couldn't be written */
@ -2555,8 +2555,8 @@ static struct omap_l4_agent_info_s {
struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus, int cs)
{
int i, iomemtype;
struct omap_target_agent_s *ta = 0;
struct omap_l4_agent_info_s *info = 0;
struct omap_target_agent_s *ta = NULL;
struct omap_l4_agent_info_s *info = NULL;
for (i = 0; i < bus->ta_num; i ++)
if (omap_l4_agent_info[i].ta == cs) {
@ -4559,14 +4559,14 @@ struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
omap_findclk(s, "uart2_iclk"),
s->drq[OMAP24XX_DMA_UART2_TX],
s->drq[OMAP24XX_DMA_UART2_RX],
serial_hds[0] ? serial_hds[1] : 0);
serial_hds[0] ? serial_hds[1] : NULL);
s->uart[2] = omap2_uart_init(omap_l4ta(s->l4, 21),
s->irq[0][OMAP_INT_24XX_UART3_IRQ],
omap_findclk(s, "uart3_fclk"),
omap_findclk(s, "uart3_iclk"),
s->drq[OMAP24XX_DMA_UART3_TX],
s->drq[OMAP24XX_DMA_UART3_RX],
serial_hds[0] && serial_hds[1] ? serial_hds[2] : 0);
serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);
s->gptimer[0] = omap_gp_timer_init(omap_l4ta(s->l4, 7),
s->irq[0][OMAP_INT_24XX_GPTIMER1],
@ -4677,7 +4677,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
omap_sti_init(omap_l4ta(s->l4, 18), 0x54000000,
s->irq[0][OMAP_INT_24XX_STI], omap_findclk(s, "emul_ck"),
serial_hds[0] && serial_hds[1] && serial_hds[2] ?
serial_hds[3] : 0);
serial_hds[3] : NULL);
s->eac = omap_eac_init(omap_l4ta(s->l4, 32),
s->irq[0][OMAP_INT_24XX_EAC_IRQ],

4
hw/omap_clk.c
View File

@ -1086,7 +1086,7 @@ static struct clk *onchip_clks[] = {
&dss_l4_iclk,
&omapctrl_clk,
0
NULL
};
void omap_clk_adduser(struct clk *clk, qemu_irq user)
@ -1184,7 +1184,7 @@ void omap_clk_reparent(struct clk *clk, struct clk *parent)
omap_clk_update(clk);
omap_clk_rate_update(clk);
} else
clk->sibling = 0;
clk->sibling = NULL;
}
void omap_clk_onoff(struct clk *clk, int on)

10
hw/omap_lcdc.c
View File

@ -80,31 +80,31 @@ static void omap_lcd_interrupts(struct omap_lcd_panel_s *s)
#include "omap_lcd_template.h"
static draw_line_func draw_line_table2[33] = {
[0 ... 32] = 0,
[0 ... 32] = NULL,
[8] = draw_line2_8,
[15] = draw_line2_15,
[16] = draw_line2_16,
[32] = draw_line2_32,
}, draw_line_table4[33] = {
[0 ... 32] = 0,
[0 ... 32] = NULL,
[8] = draw_line4_8,
[15] = draw_line4_15,
[16] = draw_line4_16,
[32] = draw_line4_32,
}, draw_line_table8[33] = {
[0 ... 32] = 0,
[0 ... 32] = NULL,
[8] = draw_line8_8,
[15] = draw_line8_15,
[16] = draw_line8_16,
[32] = draw_line8_32,
}, draw_line_table12[33] = {
[0 ... 32] = 0,
[0 ... 32] = NULL,
[8] = draw_line12_8,
[15] = draw_line12_15,
[16] = draw_line12_16,
[32] = draw_line12_32,
}, draw_line_table16[33] = {
[0 ... 32] = 0,
[0 ... 32] = NULL,
[8] = draw_line16_8,
[15] = draw_line16_15,
[16] = draw_line16_16,

2
hw/omap_mmc.c
View File

@ -619,7 +619,7 @@ struct omap_mmc_s *omap2_mmc_init(struct omap_target_agent_s *ta,
s->card = sd_init(bd, 0);
s->cdet = qemu_allocate_irqs(omap_mmc_cover_cb, s, 1)[0];
sd_set_cb(s->card, 0, s->cdet);
sd_set_cb(s->card, NULL, s->cdet);
return s;
}

4
hw/onenand.c
View File

@ -426,7 +426,7 @@ static void onenand_command(OneNANDState *s, int cmd)
case 0x65: /* OTP Access */
s->intstatus |= ONEN_INT;
s->bdrv_cur = 0;
s->bdrv_cur = NULL;
s->current = s->otp;
s->secs_cur = 1 << (BLOCK_SHIFT - 9);
s->addr[ONEN_BUF_BLOCK] = 0;
@ -624,7 +624,7 @@ void *onenand_init(uint32_t id, int regshift, qemu_irq irq)
s->shift = regshift;
s->intr = irq;
s->rdy = 0;
s->rdy = NULL;
s->id = id;
s->blocks = size >> BLOCK_SHIFT;
s->secs = size >> 9;

4
hw/pxa2xx_lcd.c
View File

@ -667,7 +667,7 @@ static void pxa2xx_lcdc_dma0_redraw_horiz(PXA2xxLCDState *s,
target_phys_addr_t addr, int *miny, int *maxy)
{
int src_width, dest_width;
drawfn fn = 0;
drawfn fn = NULL;
if (s->dest_width)
fn = s->line_fn[s->transp][s->bpp];
if (!fn)
@ -694,7 +694,7 @@ static void pxa2xx_lcdc_dma0_redraw_vert(PXA2xxLCDState *s,
target_phys_addr_t addr, int *miny, int *maxy)
{
int src_width, dest_width;
drawfn fn = 0;
drawfn fn = NULL;
if (s->dest_width)
fn = s->line_fn[s->transp][s->bpp];
if (!fn)

4
hw/pxa2xx_pcmcia.c
View File

@ -193,8 +193,8 @@ int pxa2xx_pcmcia_dettach(void *opaque)
return -ENOENT;
s->card->detach(s->card->state);
s->card->slot = 0;
s->card = 0;
s->card->slot = NULL;
s->card = NULL;
s->slot.attached = 0;

4
hw/pxa2xx_template.h
View File

@ -403,7 +403,7 @@ static void glue(pxa2xx_draw_line25_, BITS)(void *opaque,
/* Overlay planes disabled, no transparency */
static drawfn glue(pxa2xx_draw_fn_, BITS)[16] =
{
[0 ... 0xf] = 0,
[0 ... 0xf] = NULL,
[pxa_lcdc_2bpp] = glue(pxa2xx_draw_line2_, BITS),
[pxa_lcdc_4bpp] = glue(pxa2xx_draw_line4_, BITS),
[pxa_lcdc_8bpp] = glue(pxa2xx_draw_line8_, BITS),
@ -416,7 +416,7 @@ static drawfn glue(pxa2xx_draw_fn_, BITS)[16] =
/* Overlay planes enabled, transparency used */
static drawfn glue(glue(pxa2xx_draw_fn_, BITS), t)[16] =
{
[0 ... 0xf] = 0,
[0 ... 0xf] = NULL,
[pxa_lcdc_4bpp] = glue(pxa2xx_draw_line4_, BITS),
[pxa_lcdc_8bpp] = glue(pxa2xx_draw_line8_, BITS),
[pxa_lcdc_16bpp] = glue(pxa2xx_draw_line16t_, BITS),

2
hw/pxa2xx_timer.c
View File

@ -465,7 +465,7 @@ void pxa25x_timer_init(target_phys_addr_t base, qemu_irq *irqs)
{
pxa2xx_timer_info *s = pxa2xx_timer_init(base, irqs);
s->freq = PXA25X_FREQ;
s->tm4 = 0;
s->tm4 = NULL;
}
void pxa27x_timer_init(target_phys_addr_t base,

2
hw/sh7750_regnames.c
View File

@ -81,7 +81,7 @@ static regname_t regnames[] = {
REGNAME(SH7750_BCR3_A7)
REGNAME(SH7750_BCR4_A7)
REGNAME(SH7750_SDMR2_A7)
REGNAME(SH7750_SDMR3_A7) {(uint32_t) - 1, 0}
REGNAME(SH7750_SDMR3_A7) {(uint32_t) - 1, NULL}
};
const char *regname(uint32_t addr)

2
hw/sm501.c
View File

@ -1096,7 +1096,7 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
/* bridge to serial emulation module */
if (chr)
serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
0, /* TODO : chain irq to IRL */
NULL, /* TODO : chain irq to IRL */
115200, chr, 1);
/* create qemu graphic console */

2
hw/tsc210x.c
View File

@ -331,7 +331,7 @@ static void tsc2102_audio_output_update(TSC210xState *s)
s->codec.out.size = 0;
AUD_set_active_out(s->dac_voice[0], 0);
AUD_close_out(&s->card, s->dac_voice[0]);
s->dac_voice[0] = 0;
s->dac_voice[0] = NULL;
}
s->codec.cts = 0;

2
linux-user/arm/nwfpe/fpa11.c
View File

@ -30,7 +30,7 @@
#include <stdio.h>
FPA11* qemufpa=0;
FPA11* qemufpa = NULL;
CPUARMState* user_registers;
/* Reset the FPA11 chip. Called to initialize and reset the emulator. */

4
target-sh4/op_helper.c
View File

@ -145,7 +145,7 @@ void helper_discard_movcal_backup(void)
memory_content *next = current->next;
free (current);
env->movcal_backup = current = next;
if (current == 0)
if (current == NULL)
env->movcal_backup_tail = &(env->movcal_backup);
}
}
@ -161,7 +161,7 @@ void helper_ocbi(uint32_t address)
memory_content *next = (*current)->next;
stl(a, (*current)->value);
if (next == 0)
if (next == NULL)
{
env->movcal_backup_tail = current;
}

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