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Move detection code out of tcg, similar to other hosts. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>pull/286/head
Richard Henderson
2 years ago
5 changed files with 139 additions and 101 deletions
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/*
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* SPDX-License-Identifier: GPL-2.0-or-later |
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* Host specific cpu identification for RISC-V. |
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*/ |
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#ifndef HOST_CPUINFO_H |
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#define HOST_CPUINFO_H |
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#define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */ |
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#define CPUINFO_ZBA (1u << 1) |
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#define CPUINFO_ZBB (1u << 2) |
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#define CPUINFO_ZICOND (1u << 3) |
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/* Initialized with a constructor. */ |
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extern unsigned cpuinfo; |
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/*
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* We cannot rely on constructor ordering, so other constructors must |
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* use the function interface rather than the variable above. |
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*/ |
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unsigned cpuinfo_init(void); |
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#endif /* HOST_CPUINFO_H */ |
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/*
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* SPDX-License-Identifier: GPL-2.0-or-later |
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* Host specific cpu identification for RISC-V. |
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*/ |
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#include "qemu/osdep.h" |
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#include "host/cpuinfo.h" |
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unsigned cpuinfo; |
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static volatile sig_atomic_t got_sigill; |
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static void sigill_handler(int signo, siginfo_t *si, void *data) |
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{ |
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/* Skip the faulty instruction */ |
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ucontext_t *uc = (ucontext_t *)data; |
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uc->uc_mcontext.__gregs[REG_PC] += 4; |
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got_sigill = 1; |
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} |
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/* Called both as constructor and (possibly) via other constructors. */ |
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unsigned __attribute__((constructor)) cpuinfo_init(void) |
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{ |
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unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZICOND; |
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unsigned info = cpuinfo; |
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if (info) { |
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return info; |
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} |
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/* Test for compile-time settings. */ |
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#if defined(__riscv_arch_test) && defined(__riscv_zba) |
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info |= CPUINFO_ZBA; |
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#endif |
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#if defined(__riscv_arch_test) && defined(__riscv_zbb) |
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info |= CPUINFO_ZBB; |
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#endif |
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#if defined(__riscv_arch_test) && defined(__riscv_zicond) |
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info |= CPUINFO_ZICOND; |
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#endif |
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left &= ~info; |
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if (left) { |
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struct sigaction sa_old, sa_new; |
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memset(&sa_new, 0, sizeof(sa_new)); |
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sa_new.sa_flags = SA_SIGINFO; |
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sa_new.sa_sigaction = sigill_handler; |
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sigaction(SIGILL, &sa_new, &sa_old); |
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if (left & CPUINFO_ZBA) { |
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/* Probe for Zba: add.uw zero,zero,zero. */ |
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got_sigill = 0; |
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asm volatile(".insn r 0x3b, 0, 0x04, zero, zero, zero" |
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: : : "memory"); |
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info |= got_sigill ? 0 : CPUINFO_ZBA; |
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left &= ~CPUINFO_ZBA; |
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} |
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if (left & CPUINFO_ZBB) { |
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/* Probe for Zbb: andn zero,zero,zero. */ |
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got_sigill = 0; |
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asm volatile(".insn r 0x33, 7, 0x20, zero, zero, zero" |
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: : : "memory"); |
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info |= got_sigill ? 0 : CPUINFO_ZBB; |
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left &= ~CPUINFO_ZBB; |
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} |
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if (left & CPUINFO_ZICOND) { |
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/* Probe for Zicond: czero.eqz zero,zero,zero. */ |
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got_sigill = 0; |
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asm volatile(".insn r 0x33, 5, 0x07, zero, zero, zero" |
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: : : "memory"); |
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info |= got_sigill ? 0 : CPUINFO_ZICOND; |
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left &= ~CPUINFO_ZICOND; |
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} |
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sigaction(SIGILL, &sa_old, NULL); |
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assert(left == 0); |
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} |
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info |= CPUINFO_ALWAYS; |
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cpuinfo = info; |
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return info; |
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} |
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