@ -1,5 +1,6 @@
# include "qemu/osdep.h"
# include "qemu/osdep.h"
# include "cpu.h"
# include "cpu.h"
# include "trace.h"
# include "qemu/error-report.h"
# include "qemu/error-report.h"
# include "system/kvm.h"
# include "system/kvm.h"
# include "system/tcg.h"
# include "system/tcg.h"
@ -984,11 +985,14 @@ static int cpu_pre_save(void *opaque)
}
}
}
}
/*
* On outbound migration , send the data in our cpreg_ { values , indexes }
* arrays . The migration code will not allocate anything , but just
* reads the data pointed to by the VMSTATE_VARRAY_INT32_ALLOC ( ) fields .
*/
cpu - > cpreg_vmstate_indexes = cpu - > cpreg_indexes ;
cpu - > cpreg_vmstate_values = cpu - > cpreg_values ;
cpu - > cpreg_vmstate_array_len = cpu - > cpreg_array_len ;
cpu - > cpreg_vmstate_array_len = cpu - > cpreg_array_len ;
memcpy ( cpu - > cpreg_vmstate_indexes , cpu - > cpreg_indexes ,
cpu - > cpreg_array_len * sizeof ( uint64_t ) ) ;
memcpy ( cpu - > cpreg_vmstate_values , cpu - > cpreg_values ,
cpu - > cpreg_array_len * sizeof ( uint64_t ) ) ;
return 0 ;
return 0 ;
}
}
@ -1001,6 +1005,9 @@ static int cpu_post_save(void *opaque)
pmu_op_finish ( & cpu - > env ) ;
pmu_op_finish ( & cpu - > env ) ;
}
}
cpu - > cpreg_vmstate_indexes = NULL ;
cpu - > cpreg_vmstate_values = NULL ;
return 0 ;
return 0 ;
}
}
@ -1034,6 +1041,9 @@ static int cpu_pre_load(void *opaque)
pmu_op_start ( env ) ;
pmu_op_start ( env ) ;
}
}
g_assert ( ! cpu - > cpreg_vmstate_indexes ) ;
g_assert ( ! cpu - > cpreg_vmstate_values ) ;
return 0 ;
return 0 ;
}
}
@ -1043,6 +1053,9 @@ static int cpu_post_load(void *opaque, int version_id)
CPUARMState * env = & cpu - > env ;
CPUARMState * env = & cpu - > env ;
int i , v ;
int i , v ;
trace_cpu_post_load ( cpu - > cpreg_vmstate_array_len ,
cpu - > cpreg_array_len ) ;
/*
/*
* Handle migration compatibility from old QEMU which didn ' t
* Handle migration compatibility from old QEMU which didn ' t
* send the irq - line - state subsection . A QEMU without it did not
* send the irq - line - state subsection . A QEMU without it did not
@ -1094,6 +1107,11 @@ static int cpu_post_load(void *opaque, int version_id)
}
}
}
}
g_free ( cpu - > cpreg_vmstate_indexes ) ;
g_free ( cpu - > cpreg_vmstate_values ) ;
cpu - > cpreg_vmstate_indexes = NULL ;
cpu - > cpreg_vmstate_values = NULL ;
/*
/*
* Misaligned thumb pc is architecturally impossible . Fail the
* Misaligned thumb pc is architecturally impossible . Fail the
* incoming migration . For TCG it would trigger the assert in
* incoming migration . For TCG it would trigger the assert in
@ -1167,14 +1185,15 @@ const VMStateDescription vmstate_arm_cpu = {
VMSTATE_UINT32_ARRAY ( env . fiq_regs , ARMCPU , 5 ) ,
VMSTATE_UINT32_ARRAY ( env . fiq_regs , ARMCPU , 5 ) ,
VMSTATE_UINT64_ARRAY ( env . elr_el , ARMCPU , 4 ) ,
VMSTATE_UINT64_ARRAY ( env . elr_el , ARMCPU , 4 ) ,
VMSTATE_UINT64_ARRAY ( env . sp_el , ARMCPU , 4 ) ,
VMSTATE_UINT64_ARRAY ( env . sp_el , ARMCPU , 4 ) ,
/* The length-check must come before the arrays to avoid
/*
* incoming data possibly overflowing the array .
* The length must come before the arrays so we can
* allocate the arrays before their data arrives
*/
*/
VMSTATE_INT32_POSITIVE_LE ( cpreg_vmstate_array_len , ARMCPU ) ,
VMSTATE_INT32 ( cpreg_vmstate_array_len , ARMCPU ) ,
VMSTATE_VARRAY_INT32 ( cpreg_vmstate_indexes , ARMCPU ,
VMSTATE_VARRAY_INT32_ALLOC ( cpreg_vmstate_indexes , ARMCPU ,
cpreg_vmstate_array_len ,
cpreg_vmstate_array_len ,
0 , vmstate_info_uint64 , uint64_t ) ,
0 , vmstate_info_uint64 , uint64_t ) ,
VMSTATE_VARRAY_INT32 ( cpreg_vmstate_values , ARMCPU ,
VMSTATE_VARRAY_INT32_ALLOC ( cpreg_vmstate_values , ARMCPU ,
cpreg_vmstate_array_len ,
cpreg_vmstate_array_len ,
0 , vmstate_info_uint64 , uint64_t ) ,
0 , vmstate_info_uint64 , uint64_t ) ,
VMSTATE_UINT64 ( env . exclusive_addr , ARMCPU ) ,
VMSTATE_UINT64 ( env . exclusive_addr , ARMCPU ) ,