@ -1,15 +1,59 @@
# include " macros.inc "
# define LSBIT ( v ) (( v ) ^ (( v ) & (( v ) - 1 )))
# define LSBIT ( v ) (( v ) & -( v ))
# define LEVEL_MASK ( x ) glue3 ( XCHAL_INTLEVEL , x , _MASK )
# define LEVEL_SOFT_MASK ( x ) ( LEVEL_MASK ( x ) & XCHAL_INTTYPE_MASK_SOFTWARE )
# define L1_SOFT_MASK LEVEL_SOFT_MASK ( 1 )
# define L1_SOFT LSBIT ( L1_SOFT_MASK )
# if LEVEL_SOFT_MASK ( 2 )
# define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK ( 2 )
# elif LEVEL_SOFT_MASK ( 3 )
# define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK ( 3 )
# elif LEVEL_SOFT_MASK ( 4 )
# define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK ( 4 )
# elif LEVEL_SOFT_MASK ( 5 )
# define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK ( 5 )
# elif LEVEL_SOFT_MASK ( 6 )
# define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK ( 6 )
# else
# define HIGH_LEVEL_SOFT_MASK 0
# endif
# define HIGH_LEVEL_SOFT LSBIT ( HIGH_LEVEL_SOFT_MASK )
# if LEVEL_SOFT_MASK ( 2 )
# define HIGH_LEVEL_SOFT_LEVEL 2
# elif LEVEL_SOFT_MASK ( 3 )
# define HIGH_LEVEL_SOFT_LEVEL 3
# elif LEVEL_SOFT_MASK ( 4 )
# define HIGH_LEVEL_SOFT_LEVEL 4
# elif LEVEL_SOFT_MASK ( 5 )
# define HIGH_LEVEL_SOFT_LEVEL 5
# elif LEVEL_SOFT_MASK ( 6 )
# define HIGH_LEVEL_SOFT_LEVEL 6
# else
# define HIGH_LEVEL_SOFT_LEVEL 0
# endif
test_suite interrupt
# if XCHAL_HAVE_INTERRUPTS
.macro clear_interrupts
movi a2 , 0
wsr a2 , intenable
# if XCHAL_NUM_TIMERS
wsr a2 , ccompare0
# endif
# if XCHAL_NUM_TIMERS > 1
wsr a2 , ccompare1
# endif
# if XCHAL_NUM_TIMERS > 2
wsr a2 , ccompare2
# endif
esync
rsr a2 , interrupt
wsr a2 , intclear
@ -44,11 +88,12 @@ test rsil
assert eqi , a2 , 0
test_end
# if L1_SOFT
test soft_disabled
set_vector kernel , 1 f
clear_interrupts
movi a2 , LSBIT ( XCHAL_INTTYPE_MASK_SOFTWARE )
movi a2 , L1_SOFT
wsr a2 , intset
esync
rsr a3 , interrupt
@ -70,7 +115,7 @@ test soft_intenable
set_vector kernel , 1 f
clear_interrupts
movi a2 , LSBIT ( XCHAL_INTTYPE_MASK_SOFTWARE )
movi a2 , L1_SOFT
wsr a2 , intset
esync
rsr a3 , interrupt
@ -89,7 +134,7 @@ test soft_rsil
set_vector kernel , 1 f
clear_interrupts
movi a2 , LSBIT ( XCHAL_INTTYPE_MASK_SOFTWARE )
movi a2 , L1_SOFT
wsr a2 , intset
esync
rsr a3 , interrupt
@ -108,7 +153,7 @@ test soft_waiti
set_vector kernel , 1 f
clear_interrupts
movi a2 , LSBIT ( XCHAL_INTTYPE_MASK_SOFTWARE )
movi a2 , L1_SOFT
wsr a2 , intset
esync
rsr a3 , interrupt
@ -127,7 +172,7 @@ test soft_user
set_vector user , 2 f
clear_interrupts
movi a2 , LSBIT ( XCHAL_INTTYPE_MASK_SOFTWARE )
movi a2 , L1_SOFT
wsr a2 , intset
esync
rsr a3 , interrupt
@ -147,12 +192,13 @@ test soft_user
check_l1
test_end
# if HIGH_LEVEL_SOFT
test soft_priority
set_vector kernel , 1 f
set_vector level3 , 2 f
set_vector glue ( level , HIGH_LEVEL_SOFT_LEVEL ) , 2 f
clear_interrupts
movi a2 , XCHAL_INTTYPE_MASK_SOFTWARE
movi a2 , L1_SOFT | HIGH_LEVEL_SOFT
wsr a2 , intenable
rsil a3 , 0
esync
@ -164,17 +210,20 @@ test soft_priority
rsr a2 , ps
movi a3 , 0x1f / * EXCM | INTMASK * /
and a2 , a2 , a3
movi a3 , 0x13
movi a3 , 0x10 | HIGH_LEVEL_SOFT_LEVEL
assert eq , a2 , a3 / * EXCM and INTMASK are set
for high-priority interrupt * /
test_end
# endif
# endif
# if HIGH_LEVEL_SOFT
test eps_epc_rfi
set_vector level3 , 3 f
set_vector glue ( level , HIGH_LEVEL_SOFT_LEVEL ) , 3 f
clear_interrupts
reset_ps
movi a2 , XCHAL_INTTYPE_MASK_SOFTWARE
movi a2 , L1_SOFT_MASK | HIGH_LEVEL_SOFT_MASK
wsr a2 , intenable
rsil a3 , 0
rsr a3 , ps
@ -185,23 +234,26 @@ test eps_epc_rfi
2 :
test_fail
3 :
rsr a2 , eps3
rsr a2 , glue ( eps , HIGH_LEVEL_SOFT_LEVEL )
assert eq , a2 , a3
rsr a2 , epc3
rsr a2 , glue ( epc , HIGH_LEVEL_SOFT_LEVEL )
movi a3 , 1 b
assert ge , a2 , a3
movi a3 , 2 b
assert ge , a3 , a2
movi a2 , 4 f
wsr a2 , epc3
movi a2 , 0x40003
wsr a2 , eps3
rfi 3
wsr a2 , glue ( epc , HIGH_LEVEL_SOFT_LEVEL )
movi a2 , 0x40000 | HIGH_LEVEL_SOFT_LEVEL
wsr a2 , glue ( eps , HIGH_LEVEL_SOFT_LEVEL )
rfi HIGH_LEVEL_SOFT_LEVEL
test_fail
4 :
rsr a2 , ps
movi a3 , 0x40003
movi a3 , 0x40000 | HIGH_LEVEL_SOFT_LEVEL
assert eq , a2 , a3
test_end
# endif
# endif
test_suite_end