From 851d6b2c8ce7a7f07c4160bfae5c9cb91e3ac792 Mon Sep 17 00:00:00 2001 From: Yi Liu Date: Tue, 6 Jan 2026 01:12:57 -0500 Subject: [PATCH] intel_iommu: Replay all pasid bindings when either SRTP or TE bit is changed MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When either 'Set Root Table Pointer' or 'Translation Enable' bit is changed, all pasid bindings on host side become stale and need to be updated. Introduce a helper function vtd_replay_pasid_bindings_all() to go through all pasid entries in all passthrough devices to update host side bindings. Signed-off-by: Yi Liu Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger Reviewed-by: Yi Liu Reviewed-by: Michael S. Tsirkin Link: https://lore.kernel.org/qemu-devel/20260106061304.314546-16-zhenzhong.duan@intel.com Signed-off-by: Cédric Le Goater --- hw/i386/intel_iommu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 2889c29102..3241af811c 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -76,6 +76,7 @@ struct vtd_iotlb_key { static void vtd_address_space_refresh_all(IntelIOMMUState *s); static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n); +static void vtd_replay_pasid_bindings_all(IntelIOMMUState *s); static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s) { @@ -2629,6 +2630,7 @@ static void vtd_handle_gcmd_srtp(IntelIOMMUState *s) vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_RTPS); vtd_reset_caches(s); vtd_address_space_refresh_all(s); + vtd_replay_pasid_bindings_all(s); } /* Set Interrupt Remap Table Pointer */ @@ -2663,6 +2665,7 @@ static void vtd_handle_gcmd_te(IntelIOMMUState *s, bool en) vtd_reset_caches(s); vtd_address_space_refresh_all(s); + vtd_replay_pasid_bindings_all(s); } /* Handle Interrupt Remap Enable/Disable */ @@ -3162,6 +3165,13 @@ static void vtd_pasid_cache_sync(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info) vtd_iommu_unlock(s); } +static void vtd_replay_pasid_bindings_all(IntelIOMMUState *s) +{ + VTDPASIDCacheInfo pc_info = { .type = VTD_INV_DESC_PASIDC_G_GLOBAL }; + + vtd_pasid_cache_sync(s, &pc_info); +} + static bool vtd_process_pasid_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc) {