From 81c389fd6f0c9ef0f0b14cc0f1184d9d29f1b9c5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Date: Wed, 26 Nov 2025 18:53:50 +0100
Subject: [PATCH] target/ppc: Simplify endianness handling in Altivec opcodes
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Access the memory in big-endian order,
swap bytes when MSR.LE is set.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20251126202200.23100-22-philmd@linaro.org>
---
 target/ppc/mem_helper.c | 31 ++++++++++---------------------
 1 file changed, 10 insertions(+), 21 deletions(-)

diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index 6ab71a6fcb..7318b02c46 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -31,15 +31,6 @@
 
 /* #define DEBUG_OP */
 
-static inline bool needs_byteswap(const CPUPPCState *env)
-{
-#if TARGET_BIG_ENDIAN
-  return FIELD_EX64(env->msr, MSR, LE);
-#else
-  return !FIELD_EX64(env->msr, MSR, LE);
-#endif
-}
-
 /*****************************************************************************/
 /* Memory load and stores */
 
@@ -401,11 +392,10 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong addr, uint32_t reg,
         int adjust = HI_IDX * (n_elems - 1);                    \
         int sh = sizeof(r->element[0]) >> 1;                    \
         int index = (addr & 0xf) >> sh;                         \
-        if (FIELD_EX64(env->msr, MSR, LE)) {                    \
-            index = n_elems - index - 1;                        \
-        }                                                       \
+        bool byteswap = FIELD_EX64(env->msr, MSR, LE);          \
                                                                 \
-        if (needs_byteswap(env)) {                              \
+        if (byteswap) {                                         \
+            index = n_elems - index - 1;                        \
             r->element[LO_IDX ? index : (adjust - index)] =     \
                 swap(access(env, addr, GETPC()));               \
         } else {                                                \
@@ -415,8 +405,8 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong addr, uint32_t reg,
     }
 #define I(x) (x)
 LVE(LVEBX, cpu_ldub_data_ra, I, u8)
-LVE(LVEHX, cpu_lduw_data_ra, bswap16, u16)
-LVE(LVEWX, cpu_ldl_data_ra, bswap32, u32)
+LVE(LVEHX, cpu_lduw_be_data_ra, bswap16, u16)
+LVE(LVEWX, cpu_ldl_be_data_ra, bswap32, u32)
 #undef I
 #undef LVE
 
@@ -428,11 +418,10 @@ LVE(LVEWX, cpu_ldl_data_ra, bswap32, u32)
         int adjust = HI_IDX * (n_elems - 1);                            \
         int sh = sizeof(r->element[0]) >> 1;                            \
         int index = (addr & 0xf) >> sh;                                 \
-        if (FIELD_EX64(env->msr, MSR, LE)) {                            \
-            index = n_elems - index - 1;                                \
-        }                                                               \
+        bool byteswap = FIELD_EX64(env->msr, MSR, LE);                  \
                                                                         \
-        if (needs_byteswap(env)) {                                      \
+        if (byteswap) {                                                 \
+            index = n_elems - index - 1;                                \
             access(env, addr, swap(r->element[LO_IDX ? index :          \
                                               (adjust - index)]),       \
                         GETPC());                                       \
@@ -443,8 +432,8 @@ LVE(LVEWX, cpu_ldl_data_ra, bswap32, u32)
     }
 #define I(x) (x)
 STVE(STVEBX, cpu_stb_data_ra, I, u8)
-STVE(STVEHX, cpu_stw_data_ra, bswap16, u16)
-STVE(STVEWX, cpu_stl_data_ra, bswap32, u32)
+STVE(STVEHX, cpu_stw_be_data_ra, bswap16, u16)
+STVE(STVEWX, cpu_stl_be_data_ra, bswap32, u32)
 #undef I
 #undef LVE