riscv
/
qemu
mirror of https://gitea.goldendeliverer.com/riscv/qemu.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
Browse Source

hw/arm/omap1: Remove omap_badwidth_write* calls 

Complete the conversion started in the previous commit by
changing all the omap_badwidth_write* calls to open-coded
log-and-ignore behaviour.

We can delete a FIXME comment about an infinite loop, because that
only looped infinitely back before 2011 when the device was still
using absolute physical addresses.  Now that we are simply logging
the error we can clearly see that there's no loop.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
pull/316/head
Peter Maydell 7 months ago
parent
21d3cac1ab
commit
7c1a339bbf
1 changed files with 42 additions and 22 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Split View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 64
      hw/arm/omap1.c

64
hw/arm/omap1.c
View File

@ -235,7 +235,8 @@ static void omap_mpu_timer_write(void *opaque, hwaddr addr,
struct omap_mpu_timer_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -344,7 +345,8 @@ static void omap_wd_timer_write(void *opaque, hwaddr addr,
struct omap_watchdog_timer_s *s = opaque;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -472,7 +474,8 @@ static void omap_os_timer_write(void *opaque, hwaddr addr,
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -619,7 +622,8 @@ static void omap_ulpd_pm_write(void *opaque, hwaddr addr,
uint16_t diff;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -894,7 +898,8 @@ static void omap_pin_cfg_write(void *opaque, hwaddr addr,
uint32_t diff;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -1052,7 +1057,8 @@ static void omap_id_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -1124,7 +1130,8 @@ static void omap_mpui_write(void *opaque, hwaddr addr,
struct omap_mpu_state_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -1221,7 +1228,8 @@ static void omap_tipb_bridge_write(void *opaque, hwaddr addr,
struct omap_tipb_bridge_s *s = opaque;
if (size < 2) {
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -1332,7 +1340,8 @@ static void omap_tcmi_write(void *opaque, hwaddr addr,
struct omap_mpu_state_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -1430,7 +1439,8 @@ static void omap_dpll_write(void *opaque, hwaddr addr,
int div, mult;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -1703,7 +1713,8 @@ static void omap_clkm_write(void *opaque, hwaddr addr,
};
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -1833,7 +1844,8 @@ static void omap_clkdsp_write(void *opaque, hwaddr addr,
uint16_t diff;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -2043,7 +2055,8 @@ static void omap_mpuio_write(void *opaque, hwaddr addr,
int ln;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -2268,7 +2281,8 @@ static void omap_uwire_write(void *opaque, hwaddr addr,
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -2397,7 +2411,8 @@ static void omap_pwl_write(void *opaque, hwaddr addr,
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
omap_badwidth_write8(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -2494,7 +2509,8 @@ static void omap_pwt_write(void *opaque, hwaddr addr,
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
omap_badwidth_write8(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -2691,7 +2707,8 @@ static void omap_rtc_write(void *opaque, hwaddr addr,
time_t ti[2];
if (size != 1) {
omap_badwidth_write8(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -3419,7 +3436,8 @@ static void omap_mcbsp_writew(void *opaque, hwaddr addr,
return;
}
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, 4);
}
static void omap_mcbsp_write(void *opaque, hwaddr addr,
@ -3433,7 +3451,8 @@ static void omap_mcbsp_write(void *opaque, hwaddr addr,
omap_mcbsp_writew(opaque, addr, value);
break;
default:
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
}
}
@ -3607,7 +3626,8 @@ static void omap_lpg_write(void *opaque, hwaddr addr,
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
omap_badwidth_write8(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return;
}
@ -3681,8 +3701,8 @@ static uint64_t omap_mpui_io_read(void *opaque, hwaddr addr,
static void omap_mpui_io_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
/* FIXME: infinite loop */
omap_badwidth_write16(opaque, addr, value);
qemu_log_mask(LOG_GUEST_ERROR, "%s: write at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
}
static const MemoryRegionOps omap_mpui_io_ops = {

Write Preview
Loading…
Cancel
Save