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vga: split vga-isa-mm.o 

It is only used in mips softmmu, compile only there.
it_shift field was only used for vga_isa_mm, move it from VGACommonState
to ISAVGAMMstate.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
remotes/github/stable-0.12
Juan Quintela 17 years ago
committed by Anthony Liguori
parent
f97e36b9d6
commit
79b97bf2e7
4 changed files with 131 additions and 98 deletions
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  1. 2
      Makefile.target
  2. 130
      hw/vga-isa-mm.c
  3. 96
      hw/vga.c
  4. 1
      hw/vga_int.h

2
Makefile.target
View File

@ -212,7 +212,7 @@ obj-ppc-$(CONFIG_FDT) += device_tree.o
obj-mips-y = mips_r4k.o mips_jazz.o mips_malta.o mips_mipssim.o
obj-mips-y += mips_timer.o mips_int.o dma.o vga.o serial.o i8254.o i8259.o rc4030.o
obj-mips-y += vga-pci.o vga-isa.o
obj-mips-y += vga-pci.o vga-isa.o vga-isa-mm.o
obj-mips-y += g364fb.o jazz_led.o dp8393x.o
obj-mips-y += ide/core.o ide/isa.o ide/pci.o
obj-mips-y += gt64xxx.o pckbd.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o

130
hw/vga-isa-mm.c
View File

@ -0,0 +1,130 @@
/*
* QEMU ISA MM VGA Emulator.
*
* Copyright (c) 2003 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "hw.h"
#include "console.h"
#include "pc.h"
#include "vga_int.h"
#include "pixel_ops.h"
#include "qemu-timer.h"
typedef struct ISAVGAMMState {
VGACommonState vga;
int it_shift;
} ISAVGAMMState;
/* Memory mapped interface */
static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr)
{
ISAVGAMMState *s = opaque;
return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff;
}
static void vga_mm_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
ISAVGAMMState *s = opaque;
vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff);
}
static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr)
{
ISAVGAMMState *s = opaque;
return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff;
}
static void vga_mm_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
ISAVGAMMState *s = opaque;
vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff);
}
static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr)
{
ISAVGAMMState *s = opaque;
return vga_ioport_read(&s->vga, addr >> s->it_shift);
}
static void vga_mm_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
ISAVGAMMState *s = opaque;
vga_ioport_write(&s->vga, addr >> s->it_shift, value);
}
static CPUReadMemoryFunc * const vga_mm_read_ctrl[] = {
&vga_mm_readb,
&vga_mm_readw,
&vga_mm_readl,
};
static CPUWriteMemoryFunc * const vga_mm_write_ctrl[] = {
&vga_mm_writeb,
&vga_mm_writew,
&vga_mm_writel,
};
static void vga_mm_init(ISAVGAMMState *s, target_phys_addr_t vram_base,
target_phys_addr_t ctrl_base, int it_shift)
{
int s_ioport_ctrl, vga_io_memory;
s->it_shift = it_shift;
s_ioport_ctrl = cpu_register_io_memory(vga_mm_read_ctrl, vga_mm_write_ctrl, s);
vga_io_memory = cpu_register_io_memory(vga_mem_read, vga_mem_write, s);
register_savevm("vga", 0, 2, vga_common_save, vga_common_load, s);
cpu_register_physical_memory(ctrl_base, 0x100000, s_ioport_ctrl);
s->vga.bank_offset = 0;
cpu_register_physical_memory(vram_base + 0x000a0000, 0x20000, vga_io_memory);
qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
}
int isa_vga_mm_init(target_phys_addr_t vram_base,
target_phys_addr_t ctrl_base, int it_shift)
{
ISAVGAMMState *s;
s = qemu_mallocz(sizeof(*s));
vga_common_init(&s->vga, VGA_RAM_SIZE);
vga_mm_init(s, vram_base, ctrl_base, it_shift);
s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
s->vga.screen_dump, s->vga.text_update, s);
#ifdef CONFIG_BOCHS_VBE
/* XXX: use optimized standard vga accesses */
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
VGA_RAM_SIZE, s->vga.vram_offset);
#endif
return 0;
}

96
hw/vga.c
View File

@ -2319,102 +2319,6 @@ void vga_init(VGAState *s)
qemu_register_coalesced_mmio(isa_mem_base + 0x000a0000, 0x20000);
}
/* Memory mapped interface */
static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr)
{
VGAState *s = opaque;
return vga_ioport_read(s, addr >> s->it_shift) & 0xff;
}
static void vga_mm_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
VGAState *s = opaque;
vga_ioport_write(s, addr >> s->it_shift, value & 0xff);
}
static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr)
{
VGAState *s = opaque;
return vga_ioport_read(s, addr >> s->it_shift) & 0xffff;
}
static void vga_mm_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
VGAState *s = opaque;
vga_ioport_write(s, addr >> s->it_shift, value & 0xffff);
}
static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr)
{
VGAState *s = opaque;
return vga_ioport_read(s, addr >> s->it_shift);
}
static void vga_mm_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
VGAState *s = opaque;
vga_ioport_write(s, addr >> s->it_shift, value);
}
static CPUReadMemoryFunc * const vga_mm_read_ctrl[] = {
&vga_mm_readb,
&vga_mm_readw,
&vga_mm_readl,
};
static CPUWriteMemoryFunc * const vga_mm_write_ctrl[] = {
&vga_mm_writeb,
&vga_mm_writew,
&vga_mm_writel,
};
static void vga_mm_init(VGAState *s, target_phys_addr_t vram_base,
target_phys_addr_t ctrl_base, int it_shift)
{
int s_ioport_ctrl, vga_io_memory;
s->it_shift = it_shift;
s_ioport_ctrl = cpu_register_io_memory(vga_mm_read_ctrl, vga_mm_write_ctrl, s);
vga_io_memory = cpu_register_io_memory(vga_mem_read, vga_mem_write, s);
register_savevm("vga", 0, 2, vga_common_save, vga_common_load, s);
cpu_register_physical_memory(ctrl_base, 0x100000, s_ioport_ctrl);
s->bank_offset = 0;
cpu_register_physical_memory(vram_base + 0x000a0000, 0x20000, vga_io_memory);
qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
}
int isa_vga_mm_init(target_phys_addr_t vram_base,
target_phys_addr_t ctrl_base, int it_shift)
{
VGAState *s;
s = qemu_mallocz(sizeof(VGAState));
vga_common_init(s, VGA_RAM_SIZE);
vga_mm_init(s, vram_base, ctrl_base, it_shift);
s->ds = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update, s);
#ifdef CONFIG_BOCHS_VBE
/* XXX: use optimized standard vga accesses */
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
VGA_RAM_SIZE, s->vram_offset);
#endif
return 0;
}
/********************************************************/
/* vga screen dump */

1
hw/vga_int.h
View File

@ -109,7 +109,6 @@ typedef struct VGACommonState {
uint32_t lfb_vram_mapped; /* whether 0xa0000 is mapped as ram */
uint32_t bios_offset;
uint32_t bios_size;
int it_shift;
uint32_t latch;
uint8_t sr_index;
uint8_t sr[256];

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