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@ -222,27 +222,16 @@ static void dma_reset(void *opaque) |
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s->dmaregs[0] = DMA_VER; |
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} |
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static void dma_save(QEMUFile *f, void *opaque) |
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{ |
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DMAState *s = opaque; |
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unsigned int i; |
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for (i = 0; i < DMA_REGS; i++) |
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qemu_put_be32s(f, &s->dmaregs[i]); |
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} |
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static int dma_load(QEMUFile *f, void *opaque, int version_id) |
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{ |
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DMAState *s = opaque; |
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unsigned int i; |
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if (version_id != 2) |
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return -EINVAL; |
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for (i = 0; i < DMA_REGS; i++) |
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qemu_get_be32s(f, &s->dmaregs[i]); |
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return 0; |
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} |
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static const VMStateDescription vmstate_dma = { |
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.name ="sparc32_dma", |
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.version_id = 2, |
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.minimum_version_id = 2, |
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.minimum_version_id_old = 2, |
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.fields = (VMStateField []) { |
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VMSTATE_UINT32_ARRAY(dmaregs, DMAState, DMA_REGS), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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static int sparc32_dma_init1(SysBusDevice *dev) |
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{ |
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@ -254,7 +243,7 @@ static int sparc32_dma_init1(SysBusDevice *dev) |
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dma_io_memory = cpu_register_io_memory(dma_mem_read, dma_mem_write, s); |
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sysbus_init_mmio(dev, DMA_SIZE, dma_io_memory); |
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register_savevm("sparc32_dma", -1, 2, dma_save, dma_load, s); |
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vmstate_register(-1, &vmstate_dma, s); |
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qemu_register_reset(dma_reset, s); |
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qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1); |
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