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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1326 c046a42c-6fe2-441c-8c8c-71466251a162stable-0.10
bellard
22 years ago
12 changed files with 1751 additions and 676 deletions
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/*
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* QEMU ESP emulation |
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* |
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* Copyright (c) 2005 Fabrice Bellard |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a copy |
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* of this software and associated documentation files (the "Software"), to deal |
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* in the Software without restriction, including without limitation the rights |
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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* copies of the Software, and to permit persons to whom the Software is |
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* furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice and this permission notice shall be included in |
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* all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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* THE SOFTWARE. |
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*/ |
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#include "vl.h" |
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/* debug ESP card */ |
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#define DEBUG_ESP |
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#ifdef DEBUG_ESP |
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#define DPRINTF(fmt, args...) \ |
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do { printf("ESP: " fmt , ##args); } while (0) |
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#else |
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#define DPRINTF(fmt, args...) |
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#endif |
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#define ESPDMA_REGS 4 |
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#define ESPDMA_MAXADDR (ESPDMA_REGS * 4 - 1) |
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#define ESP_MAXREG 0x3f |
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typedef struct ESPState { |
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BlockDriverState **bd; |
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uint8_t regs[ESP_MAXREG]; |
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int irq; |
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uint32_t espdmaregs[ESPDMA_REGS]; |
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} ESPState; |
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static void esp_reset(void *opaque) |
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{ |
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ESPState *s = opaque; |
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memset(s->regs, 0, ESP_MAXREG); |
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s->regs[0x0e] = 0x4; // Indicate fas100a
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memset(s->espdmaregs, 0, ESPDMA_REGS * 4); |
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} |
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static uint32_t esp_mem_readb(void *opaque, target_phys_addr_t addr) |
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{ |
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ESPState *s = opaque; |
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uint32_t saddr; |
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saddr = (addr & ESP_MAXREG) >> 2; |
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switch (saddr) { |
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default: |
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break; |
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} |
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DPRINTF("esp: read reg[%d]: 0x%2.2x\n", saddr, s->regs[saddr]); |
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return s->regs[saddr]; |
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} |
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static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
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{ |
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ESPState *s = opaque; |
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uint32_t saddr; |
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saddr = (addr & ESP_MAXREG) >> 2; |
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DPRINTF("esp: write reg[%d]: 0x%2.2x -> 0x%2.2x\n", saddr, s->regs[saddr], val); |
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switch (saddr) { |
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case 3: |
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// Command
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switch(val & 0x7f) { |
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case 0: |
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DPRINTF("esp: NOP (%2.2x)\n", val); |
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break; |
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case 2: |
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DPRINTF("esp: Chip reset (%2.2x)\n", val); |
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esp_reset(s); |
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break; |
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case 3: |
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DPRINTF("esp: Bus reset (%2.2x)\n", val); |
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break; |
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case 0x1a: |
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DPRINTF("esp: Set ATN (%2.2x)\n", val); |
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break; |
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case 0x42: |
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DPRINTF("esp: Select with ATN (%2.2x)\n", val); |
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s->regs[4] = 0x1a; // Status: TCNT | TDONE | CMD
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s->regs[5] = 0x20; // Intr: Disconnect, nobody there
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s->regs[6] = 0x4; // Seq: Cmd done
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pic_set_irq(s->irq, 1); |
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break; |
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} |
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break; |
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case 4 ... 7: |
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case 9 ... 0xf: |
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break; |
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default: |
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s->regs[saddr] = val; |
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break; |
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} |
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} |
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static CPUReadMemoryFunc *esp_mem_read[3] = { |
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esp_mem_readb, |
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esp_mem_readb, |
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esp_mem_readb, |
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}; |
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static CPUWriteMemoryFunc *esp_mem_write[3] = { |
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esp_mem_writeb, |
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esp_mem_writeb, |
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esp_mem_writeb, |
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}; |
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static uint32_t espdma_mem_readl(void *opaque, target_phys_addr_t addr) |
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{ |
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ESPState *s = opaque; |
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uint32_t saddr; |
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saddr = (addr & ESPDMA_MAXADDR) >> 2; |
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return s->espdmaregs[saddr]; |
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} |
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static void espdma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) |
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{ |
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ESPState *s = opaque; |
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uint32_t saddr; |
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saddr = (addr & ESPDMA_MAXADDR) >> 2; |
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s->espdmaregs[saddr] = val; |
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} |
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static CPUReadMemoryFunc *espdma_mem_read[3] = { |
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espdma_mem_readl, |
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espdma_mem_readl, |
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espdma_mem_readl, |
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}; |
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static CPUWriteMemoryFunc *espdma_mem_write[3] = { |
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espdma_mem_writel, |
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espdma_mem_writel, |
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espdma_mem_writel, |
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}; |
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static void esp_save(QEMUFile *f, void *opaque) |
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{ |
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ESPState *s = opaque; |
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} |
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static int esp_load(QEMUFile *f, void *opaque, int version_id) |
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{ |
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ESPState *s = opaque; |
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if (version_id != 1) |
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return -EINVAL; |
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return 0; |
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} |
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void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr) |
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{ |
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ESPState *s; |
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int esp_io_memory, espdma_io_memory; |
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s = qemu_mallocz(sizeof(ESPState)); |
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if (!s) |
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return; |
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s->bd = bd; |
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s->irq = irq; |
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esp_io_memory = cpu_register_io_memory(0, esp_mem_read, esp_mem_write, s); |
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cpu_register_physical_memory(espaddr, ESP_MAXREG*4, esp_io_memory); |
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espdma_io_memory = cpu_register_io_memory(0, espdma_mem_read, espdma_mem_write, s); |
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cpu_register_physical_memory(espdaddr, 16, espdma_io_memory); |
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esp_reset(s); |
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register_savevm("esp", espaddr, 1, esp_save, esp_load, s); |
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qemu_register_reset(esp_reset, s); |
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} |
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