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Farhan Ali's s390x host PCI support for the block/nvme.c driver. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAmgcviUACgkQnKSrs4Gr c8hRswgAupxH5Zhx50F7GzwZyu9TCF2sphEPd2VuFVxze8Sg6mXnJq5BFTjv9IuC 0trPppfDyKFKujDk+FA3pl9bT45btm0xctNbFYNRS3HXrVUyMQLy73MlFF2twa5g U3uiX2d7DAYOdi5O1Cn3bhlByDh4qSko7YyUDFKio+WU57cdJxEd+pUqwyVXrU3E AMC2ZmJdKFGGC+tWxBIAuWNc5apq9yzbiywR8z62/Z2IC+Bym0RpvCbdklqcZb8O tpGxDKN8bY6s+hy1NZmA8eBA/iCiu6SUFmNpoe2vSwCFEk9R3gi+UNcuTVt3FaWO lgzoZSOelmI3JkF0UBqvKsPXt3fdJw== =KII7 -----END PGP SIGNATURE----- Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging Pull request Farhan Ali's s390x host PCI support for the block/nvme.c driver. # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAmgcviUACgkQnKSrs4Gr # c8hRswgAupxH5Zhx50F7GzwZyu9TCF2sphEPd2VuFVxze8Sg6mXnJq5BFTjv9IuC # 0trPppfDyKFKujDk+FA3pl9bT45btm0xctNbFYNRS3HXrVUyMQLy73MlFF2twa5g # U3uiX2d7DAYOdi5O1Cn3bhlByDh4qSko7YyUDFKio+WU57cdJxEd+pUqwyVXrU3E # AMC2ZmJdKFGGC+tWxBIAuWNc5apq9yzbiywR8z62/Z2IC+Bym0RpvCbdklqcZb8O # tpGxDKN8bY6s+hy1NZmA8eBA/iCiu6SUFmNpoe2vSwCFEk9R3gi+UNcuTVt3FaWO # lgzoZSOelmI3JkF0UBqvKsPXt3fdJw== # =KII7 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 08 May 2025 10:22:29 EDT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [ultimate] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [ultimate] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * tag 'block-pull-request' of https://gitlab.com/stefanha/qemu: block/nvme: Use host PCI MMIO API include: Add a header to define host PCI MMIO functions util: Add functions for s390x mmio read/write Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>pull/291/head
Stefan Hajnoczi
11 months ago
5 changed files with 331 additions and 18 deletions
@ -0,0 +1,136 @@ |
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/*
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* API for host PCI MMIO accesses (e.g. Linux VFIO BARs) |
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* |
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* Copyright 2025 IBM Corp. |
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* Author(s): Farhan Ali <alifm@linux.ibm.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0-or-later |
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*/ |
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#ifndef HOST_PCI_MMIO_H |
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#define HOST_PCI_MMIO_H |
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#include "qemu/bswap.h" |
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#include "qemu/s390x_pci_mmio.h" |
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static inline uint8_t host_pci_ldub_p(const void *ioaddr) |
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{ |
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uint8_t ret = 0; |
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#ifdef __s390x__ |
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ret = s390x_pci_mmio_read_8(ioaddr); |
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#else |
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ret = ldub_p(ioaddr); |
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#endif |
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return ret; |
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} |
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static inline uint16_t host_pci_lduw_le_p(const void *ioaddr) |
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{ |
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uint16_t ret = 0; |
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#ifdef __s390x__ |
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ret = le16_to_cpu(s390x_pci_mmio_read_16(ioaddr)); |
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#else |
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ret = lduw_le_p(ioaddr); |
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#endif |
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return ret; |
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} |
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static inline uint32_t host_pci_ldl_le_p(const void *ioaddr) |
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{ |
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uint32_t ret = 0; |
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#ifdef __s390x__ |
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ret = le32_to_cpu(s390x_pci_mmio_read_32(ioaddr)); |
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#else |
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ret = ldl_le_p(ioaddr); |
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#endif |
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return ret; |
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} |
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static inline uint64_t host_pci_ldq_le_p(const void *ioaddr) |
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{ |
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uint64_t ret = 0; |
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#ifdef __s390x__ |
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ret = le64_to_cpu(s390x_pci_mmio_read_64(ioaddr)); |
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#else |
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ret = ldq_le_p(ioaddr); |
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#endif |
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return ret; |
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} |
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static inline void host_pci_stb_p(void *ioaddr, uint8_t val) |
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{ |
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#ifdef __s390x__ |
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s390x_pci_mmio_write_8(ioaddr, val); |
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#else |
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stb_p(ioaddr, val); |
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#endif |
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} |
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static inline void host_pci_stw_le_p(void *ioaddr, uint16_t val) |
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{ |
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#ifdef __s390x__ |
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s390x_pci_mmio_write_16(ioaddr, cpu_to_le16(val)); |
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#else |
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stw_le_p(ioaddr, val); |
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#endif |
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} |
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static inline void host_pci_stl_le_p(void *ioaddr, uint32_t val) |
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{ |
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#ifdef __s390x__ |
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s390x_pci_mmio_write_32(ioaddr, cpu_to_le32(val)); |
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#else |
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stl_le_p(ioaddr, val); |
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#endif |
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} |
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static inline void host_pci_stq_le_p(void *ioaddr, uint64_t val) |
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{ |
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#ifdef __s390x__ |
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s390x_pci_mmio_write_64(ioaddr, cpu_to_le64(val)); |
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#else |
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stq_le_p(ioaddr, val); |
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#endif |
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} |
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static inline uint64_t host_pci_ldn_le_p(const void *ioaddr, int sz) |
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{ |
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switch (sz) { |
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case 1: |
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return host_pci_ldub_p(ioaddr); |
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case 2: |
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return host_pci_lduw_le_p(ioaddr); |
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case 4: |
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return host_pci_ldl_le_p(ioaddr); |
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case 8: |
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return host_pci_ldq_le_p(ioaddr); |
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default: |
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g_assert_not_reached(); |
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} |
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} |
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static inline void host_pci_stn_le_p(void *ioaddr, int sz, uint64_t v) |
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{ |
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switch (sz) { |
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case 1: |
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host_pci_stb_p(ioaddr, v); |
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break; |
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case 2: |
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host_pci_stw_le_p(ioaddr, v); |
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break; |
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case 4: |
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host_pci_stl_le_p(ioaddr, v); |
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break; |
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case 8: |
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host_pci_stq_le_p(ioaddr, v); |
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break; |
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default: |
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g_assert_not_reached(); |
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} |
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} |
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#endif |
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@ -0,0 +1,24 @@ |
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/*
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* s390x PCI MMIO definitions |
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* |
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* Copyright 2025 IBM Corp. |
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* Author(s): Farhan Ali <alifm@linux.ibm.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0-or-later |
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*/ |
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#ifndef S390X_PCI_MMIO_H |
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#define S390X_PCI_MMIO_H |
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#ifdef __s390x__ |
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uint8_t s390x_pci_mmio_read_8(const void *ioaddr); |
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uint16_t s390x_pci_mmio_read_16(const void *ioaddr); |
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uint32_t s390x_pci_mmio_read_32(const void *ioaddr); |
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uint64_t s390x_pci_mmio_read_64(const void *ioaddr); |
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void s390x_pci_mmio_write_8(void *ioaddr, uint8_t val); |
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void s390x_pci_mmio_write_16(void *ioaddr, uint16_t val); |
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void s390x_pci_mmio_write_32(void *ioaddr, uint32_t val); |
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void s390x_pci_mmio_write_64(void *ioaddr, uint64_t val); |
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#endif /* __s390x__ */ |
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#endif /* S390X_PCI_MMIO_H */ |
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@ -0,0 +1,146 @@ |
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/*
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* s390x PCI MMIO definitions |
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* |
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* Copyright 2025 IBM Corp. |
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* Author(s): Farhan Ali <alifm@linux.ibm.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0-or-later |
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*/ |
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#include "qemu/osdep.h" |
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#include <sys/syscall.h> |
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#include "qemu/s390x_pci_mmio.h" |
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#include "elf.h" |
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union register_pair { |
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unsigned __int128 pair; |
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struct { |
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uint64_t even; |
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uint64_t odd; |
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}; |
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}; |
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static bool is_mio_supported; |
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static __attribute__((constructor)) void check_is_mio_supported(void) |
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{ |
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is_mio_supported = !!(qemu_getauxval(AT_HWCAP) & HWCAP_S390_PCI_MIO); |
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} |
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static uint64_t s390x_pcilgi(const void *ioaddr, size_t len) |
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{ |
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union register_pair ioaddr_len = { .even = (uint64_t)ioaddr, |
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.odd = len }; |
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uint64_t val; |
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int cc; |
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asm volatile( |
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/* pcilgi */ |
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".insn rre,0xb9d60000,%[val],%[ioaddr_len]\n" |
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"ipm %[cc]\n" |
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"srl %[cc],28\n" |
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: [cc] "=d"(cc), [val] "=d"(val), |
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[ioaddr_len] "+d"(ioaddr_len.pair) :: "cc"); |
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if (cc) { |
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val = -1ULL; |
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} |
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return val; |
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} |
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static void s390x_pcistgi(void *ioaddr, uint64_t val, size_t len) |
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{ |
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union register_pair ioaddr_len = {.even = (uint64_t)ioaddr, .odd = len}; |
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asm volatile ( |
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/* pcistgi */ |
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".insn rre,0xb9d40000,%[val],%[ioaddr_len]\n" |
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: [ioaddr_len] "+d" (ioaddr_len.pair) |
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: [val] "d" (val) |
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: "cc", "memory"); |
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} |
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uint8_t s390x_pci_mmio_read_8(const void *ioaddr) |
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{ |
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uint8_t val = 0; |
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if (is_mio_supported) { |
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val = s390x_pcilgi(ioaddr, sizeof(val)); |
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} else { |
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syscall(__NR_s390_pci_mmio_read, ioaddr, &val, sizeof(val)); |
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} |
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return val; |
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} |
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uint16_t s390x_pci_mmio_read_16(const void *ioaddr) |
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{ |
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uint16_t val = 0; |
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if (is_mio_supported) { |
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val = s390x_pcilgi(ioaddr, sizeof(val)); |
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} else { |
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syscall(__NR_s390_pci_mmio_read, ioaddr, &val, sizeof(val)); |
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} |
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return val; |
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} |
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uint32_t s390x_pci_mmio_read_32(const void *ioaddr) |
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{ |
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uint32_t val = 0; |
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if (is_mio_supported) { |
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val = s390x_pcilgi(ioaddr, sizeof(val)); |
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} else { |
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syscall(__NR_s390_pci_mmio_read, ioaddr, &val, sizeof(val)); |
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} |
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return val; |
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} |
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uint64_t s390x_pci_mmio_read_64(const void *ioaddr) |
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{ |
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uint64_t val = 0; |
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if (is_mio_supported) { |
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val = s390x_pcilgi(ioaddr, sizeof(val)); |
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} else { |
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syscall(__NR_s390_pci_mmio_read, ioaddr, &val, sizeof(val)); |
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} |
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return val; |
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} |
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void s390x_pci_mmio_write_8(void *ioaddr, uint8_t val) |
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{ |
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if (is_mio_supported) { |
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s390x_pcistgi(ioaddr, val, sizeof(val)); |
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} else { |
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syscall(__NR_s390_pci_mmio_write, ioaddr, &val, sizeof(val)); |
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} |
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} |
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void s390x_pci_mmio_write_16(void *ioaddr, uint16_t val) |
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{ |
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if (is_mio_supported) { |
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s390x_pcistgi(ioaddr, val, sizeof(val)); |
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} else { |
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syscall(__NR_s390_pci_mmio_write, ioaddr, &val, sizeof(val)); |
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} |
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} |
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void s390x_pci_mmio_write_32(void *ioaddr, uint32_t val) |
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{ |
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if (is_mio_supported) { |
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s390x_pcistgi(ioaddr, val, sizeof(val)); |
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} else { |
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syscall(__NR_s390_pci_mmio_write, ioaddr, &val, sizeof(val)); |
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} |
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} |
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void s390x_pci_mmio_write_64(void *ioaddr, uint64_t val) |
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{ |
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if (is_mio_supported) { |
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s390x_pcistgi(ioaddr, val, sizeof(val)); |
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} else { |
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syscall(__NR_s390_pci_mmio_write, ioaddr, &val, sizeof(val)); |
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} |
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} |
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