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@ -52,10 +52,15 @@ target_phys_addr_t omap_l4_region_size(struct omap_target_agent_s *ta, |
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return ta->start[region].size; |
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} |
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static uint32_t omap_l4ta_read(void *opaque, target_phys_addr_t addr) |
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static uint64_t omap_l4ta_read(void *opaque, target_phys_addr_t addr, |
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unsigned size) |
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{ |
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struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque; |
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if (size != 2) { |
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return omap_badwidth_read16(opaque, addr); |
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} |
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switch (addr) { |
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case 0x00: /* COMPONENT */ |
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return s->component; |
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@ -72,10 +77,14 @@ static uint32_t omap_l4ta_read(void *opaque, target_phys_addr_t addr) |
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} |
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static void omap_l4ta_write(void *opaque, target_phys_addr_t addr, |
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uint32_t value) |
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uint64_t value, unsigned size) |
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{ |
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struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque; |
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if (size != 4) { |
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return omap_badwidth_write32(opaque, addr, value); |
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} |
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switch (addr) { |
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case 0x00: /* COMPONENT */ |
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case 0x28: /* AGENT_STATUS */ |
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@ -93,16 +102,10 @@ static void omap_l4ta_write(void *opaque, target_phys_addr_t addr, |
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} |
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} |
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static CPUReadMemoryFunc * const omap_l4ta_readfn[] = { |
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omap_badwidth_read16, |
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omap_l4ta_read, |
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omap_badwidth_read16, |
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}; |
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static CPUWriteMemoryFunc * const omap_l4ta_writefn[] = { |
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omap_badwidth_write32, |
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omap_badwidth_write32, |
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omap_l4ta_write, |
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static const MemoryRegionOps omap_l4ta_ops = { |
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.read = omap_l4ta_read, |
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.write = omap_l4ta_write, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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}; |
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struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus, |
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@ -110,7 +113,7 @@ struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus, |
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const struct omap_l4_agent_info_s *agents, |
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int cs) |
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{ |
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int i, iomemtype; |
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int i; |
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struct omap_target_agent_s *ta = NULL; |
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const struct omap_l4_agent_info_s *info = NULL; |
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@ -133,9 +136,9 @@ struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus, |
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ta->status = 0x00000000; |
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ta->control = 0x00000200; /* XXX 01000200 for L4TAO */ |
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iomemtype = cpu_register_io_memory(omap_l4ta_readfn, |
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omap_l4ta_writefn, ta, DEVICE_NATIVE_ENDIAN); |
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ta->base = omap_l4_attach(ta, info->ta_region, iomemtype); |
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memory_region_init_io(&ta->iomem, &omap_l4ta_ops, ta, "omap.l4ta", |
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omap_l4_region_size(ta, info->ta_region)); |
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omap_l4_attach_region(ta, info->ta_region, &ta->iomem); |
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return ta; |
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} |
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