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target/loongarch: Add generic CPU model information

On LoongArch system, CPU model name comes from IOCSR register
LOONGARCH_IOCSR_VENDOR and LOONGARCH_IOCSR_CPUNAME. Its value
can be initialized when CPU is created.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
master
Bibo Mao 1 month ago
committed by Song Gao
parent
commit
371c06fdff
  1. 6
      hw/loongarch/virt.c
  2. 4
      target/loongarch/cpu.c
  3. 6
      target/loongarch/cpu.h

6
hw/loongarch/virt.c

@ -777,7 +777,9 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr,
LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque);
uint64_t ret = 0; uint64_t ret = 0;
int features; int features;
CPULoongArchState *env;
env = &LOONGARCH_CPU(first_cpu)->env;
switch (addr) { switch (addr) {
case VERSION_REG: case VERSION_REG:
ret = 0x11ULL; ret = 0x11ULL;
@ -792,10 +794,10 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr,
} }
break; break;
case VENDOR_REG: case VENDOR_REG:
ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ ret = env->vendor_id;
break; break;
case CPUNAME_REG: case CPUNAME_REG:
ret = 0x303030354133ULL; /* "3A5000" */ ret = env->cpu_id;
break; break;
case MISC_FUNC_REG: case MISC_FUNC_REG:
if (kvm_irqchip_in_kernel()) { if (kvm_irqchip_in_kernel()) {

4
target/loongarch/cpu.c

@ -287,6 +287,8 @@ static void loongarch_la464_initfn(Object *obj)
data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA464); data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA464);
data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON); data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON);
env->cpucfg[0] = data; env->cpucfg[0] = data;
memccpy((void *)&env->vendor_id, CPU_VENDOR_LOONGSON, 0, 8);
memccpy((void *)&env->cpu_id, CPU_MODEL_3A5000, 0, 8);
data = 0; data = 0;
data = FIELD_DP32(data, CPUCFG1, ARCH, 2); data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
@ -413,6 +415,8 @@ static void loongarch_la132_initfn(Object *obj)
data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA132); data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA132);
data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON); data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON);
env->cpucfg[0] = data; env->cpucfg[0] = data;
memccpy((void *)&env->vendor_id, CPU_VENDOR_LOONGSON, 0, 8);
memccpy((void *)&env->cpu_id, CPU_MODEL_1C101, 0, 8);
data = 0; data = 0;
data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */

6
target/loongarch/cpu.h

@ -307,6 +307,10 @@ typedef struct LoongArchBT {
uint32_t ftop; uint32_t ftop;
} lbt_t; } lbt_t;
#define CPU_VENDOR_LOONGSON "Loongson"
#define CPU_MODEL_3A5000 "3A5000"
#define CPU_MODEL_1C101 "1C101"
typedef struct CPUArchState { typedef struct CPUArchState {
uint64_t gpr[32]; uint64_t gpr[32];
uint64_t pc; uint64_t pc;
@ -318,6 +322,8 @@ typedef struct CPUArchState {
uint32_t cpucfg[21]; uint32_t cpucfg[21];
uint32_t pv_features; uint32_t pv_features;
uint64_t vendor_id;
uint64_t cpu_id;
/* LoongArch CSRs */ /* LoongArch CSRs */
uint64_t CSR_CRMD; uint64_t CSR_CRMD;

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