Browse Source

ppc/xive2: Avoid needless interrupt re-check on CPPR set

When CPPR priority is decreased, pending interrupts do not need to be
re-checked if one is already presented because by definition that will
be the highest priority.

This prevents a presented group interrupt from being lost.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-39-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
pull/304/head
Nicholas Piggin 11 months ago
committed by Cédric Le Goater
parent
commit
370ea4a4b6
  1. 4
      hw/intc/xive2.c

4
hw/intc/xive2.c

@ -1250,7 +1250,9 @@ static void xive2_tctx_set_cppr(XiveTCTX *tctx, uint8_t sig_ring, uint8_t cppr)
} }
/* CPPR priority decreased (higher value) */ /* CPPR priority decreased (higher value) */
xive2_tctx_process_pending(tctx, sig_ring); if (!xive_nsr_indicates_exception(sig_ring, nsr)) {
xive2_tctx_process_pending(tctx, sig_ring);
}
} }
void xive2_tm_set_hv_cppr(XivePresenter *xptr, XiveTCTX *tctx, void xive2_tm_set_hv_cppr(XivePresenter *xptr, XiveTCTX *tctx,

Loading…
Cancel
Save