Browse Source
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Andreas Konopik <andreas.konopik@efs-auto.de> Signed-off-by: David Brenken <david.brenken@efs-auto.de> Signed-off-by: Georg Hofstetter <georg.hofstetter@efs-auto.de> Signed-off-by: Robert Rasche <robert.rasche@efs-auto.de> Signed-off-by: Lars Biermanski <lars.biermanski@efs-auto.de> Message-Id: <20201109165055.10508-2-david.brenken@efs-auto.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>pull/113/head
committed by
Bastian Koppelmann
7 changed files with 534 additions and 1 deletions
@ -1 +1 @@ |
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CONFIG_TRICORE=y |
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CONFIG_TRIBOARD=y |
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|
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@ -1,2 +1,10 @@ |
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config TRICORE |
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bool |
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config TRIBOARD |
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bool |
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select TRICORE |
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select TC27X_SOC |
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config TC27X_SOC |
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bool |
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@ -1,4 +1,6 @@ |
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tricore_ss = ss.source_set() |
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tricore_ss.add(when: 'CONFIG_TRICORE', if_true: files('tricore_testboard.c')) |
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tricore_ss.add(when: 'CONFIG_TRIBOARD', if_true: files('triboard.c')) |
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tricore_ss.add(when: 'CONFIG_TC27X_SOC', if_true: files('tc27x_soc.c')) |
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hw_arch += {'tricore': tricore_ss} |
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@ -0,0 +1,246 @@ |
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/*
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* Infineon tc27x SoC System emulation. |
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* |
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* Copyright (c) 2020 Andreas Konopik <andreas.konopik@efs-auto.de> |
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* Copyright (c) 2020 David Brenken <david.brenken@efs-auto.de> |
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* |
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* This library is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
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* License as published by the Free Software Foundation; either |
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* version 2 of the License, or (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public |
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
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*/ |
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|
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#include "qemu/osdep.h" |
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#include "qapi/error.h" |
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#include "hw/sysbus.h" |
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#include "hw/boards.h" |
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#include "hw/loader.h" |
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#include "qemu/units.h" |
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#include "hw/misc/unimp.h" |
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#include "exec/address-spaces.h" |
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#include "qemu/log.h" |
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#include "cpu.h" |
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#include "hw/tricore/tc27x_soc.h" |
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#include "hw/tricore/triboard.h" |
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const MemmapEntry tc27x_soc_memmap[] = { |
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[TC27XD_DSPR2] = { 0x50000000, 120 * KiB }, |
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[TC27XD_DCACHE2] = { 0x5001E000, 8 * KiB }, |
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[TC27XD_DTAG2] = { 0x500C0000, 0xC00 }, |
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[TC27XD_PSPR2] = { 0x50100000, 32 * KiB }, |
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[TC27XD_PCACHE2] = { 0x50108000, 16 * KiB }, |
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[TC27XD_PTAG2] = { 0x501C0000, 0x1800 }, |
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[TC27XD_DSPR1] = { 0x60000000, 120 * KiB }, |
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[TC27XD_DCACHE1] = { 0x6001E000, 8 * KiB }, |
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[TC27XD_DTAG1] = { 0x600C0000, 0xC00 }, |
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[TC27XD_PSPR1] = { 0x60100000, 32 * KiB }, |
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[TC27XD_PCACHE1] = { 0x60108000, 16 * KiB }, |
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[TC27XD_PTAG1] = { 0x601C0000, 0x1800 }, |
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[TC27XD_DSPR0] = { 0x70000000, 112 * KiB }, |
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[TC27XD_PSPR0] = { 0x70100000, 24 * KiB }, |
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[TC27XD_PCACHE0] = { 0x70106000, 8 * KiB }, |
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[TC27XD_PTAG0] = { 0x701C0000, 0xC00 }, |
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[TC27XD_PFLASH0_C] = { 0x80000000, 2 * MiB }, |
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[TC27XD_PFLASH1_C] = { 0x80200000, 2 * MiB }, |
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[TC27XD_OLDA_C] = { 0x8FE70000, 32 * KiB }, |
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[TC27XD_BROM_C] = { 0x8FFF8000, 32 * KiB }, |
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[TC27XD_LMURAM_C] = { 0x90000000, 32 * KiB }, |
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[TC27XD_EMEM_C] = { 0x9F000000, 1 * MiB }, |
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[TC27XD_PFLASH0_U] = { 0xA0000000, 0x0 }, |
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[TC27XD_PFLASH1_U] = { 0xA0200000, 0x0 }, |
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[TC27XD_DFLASH0] = { 0xAF000000, 1 * MiB + 16 * KiB }, |
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[TC27XD_DFLASH1] = { 0xAF110000, 64 * KiB }, |
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[TC27XD_OLDA_U] = { 0xAFE70000, 0x0 }, |
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[TC27XD_BROM_U] = { 0xAFFF8000, 0x0 }, |
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[TC27XD_LMURAM_U] = { 0xB0000000, 0x0 }, |
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[TC27XD_EMEM_U] = { 0xBF000000, 0x0 }, |
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[TC27XD_PSPRX] = { 0xC0000000, 0x0 }, |
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[TC27XD_DSPRX] = { 0xD0000000, 0x0 }, |
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}; |
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/*
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* Initialize the auxiliary ROM region @mr and map it into |
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* the memory map at @base. |
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*/ |
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static void make_rom(MemoryRegion *mr, const char *name, |
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hwaddr base, hwaddr size) |
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{ |
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memory_region_init_rom(mr, NULL, name, size, &error_fatal); |
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memory_region_add_subregion(get_system_memory(), base, mr); |
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} |
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/*
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* Initialize the auxiliary RAM region @mr and map it into |
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* the memory map at @base. |
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*/ |
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static void make_ram(MemoryRegion *mr, const char *name, |
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hwaddr base, hwaddr size) |
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{ |
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memory_region_init_ram(mr, NULL, name, size, &error_fatal); |
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memory_region_add_subregion(get_system_memory(), base, mr); |
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} |
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/*
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* Create an alias of an entire original MemoryRegion @orig |
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* located at @base in the memory map. |
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*/ |
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static void make_alias(MemoryRegion *mr, const char *name, |
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MemoryRegion *orig, hwaddr base) |
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{ |
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memory_region_init_alias(mr, NULL, name, orig, 0, |
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memory_region_size(orig)); |
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memory_region_add_subregion(get_system_memory(), base, mr); |
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} |
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static void tc27x_soc_init_memory_mapping(DeviceState *dev_soc) |
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{ |
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TC27XSoCState *s = TC27X_SOC(dev_soc); |
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TC27XSoCClass *sc = TC27X_SOC_GET_CLASS(s); |
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make_ram(&s->cpu0mem.dspr, "CPU0.DSPR", |
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sc->memmap[TC27XD_DSPR0].base, sc->memmap[TC27XD_DSPR0].size); |
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make_ram(&s->cpu0mem.pspr, "CPU0.PSPR", |
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sc->memmap[TC27XD_PSPR0].base, sc->memmap[TC27XD_PSPR0].size); |
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make_ram(&s->cpu1mem.dspr, "CPU1.DSPR", |
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sc->memmap[TC27XD_DSPR1].base, sc->memmap[TC27XD_DSPR1].size); |
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make_ram(&s->cpu1mem.pspr, "CPU1.PSPR", |
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sc->memmap[TC27XD_PSPR1].base, sc->memmap[TC27XD_PSPR1].size); |
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make_ram(&s->cpu2mem.dspr, "CPU2.DSPR", |
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sc->memmap[TC27XD_DSPR2].base, sc->memmap[TC27XD_DSPR2].size); |
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make_ram(&s->cpu2mem.pspr, "CPU2.PSPR", |
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sc->memmap[TC27XD_PSPR2].base, sc->memmap[TC27XD_PSPR2].size); |
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|
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/* TODO: Control Cache mapping with Memory Test Unit (MTU) */ |
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make_ram(&s->cpu2mem.dcache, "CPU2.DCACHE", |
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sc->memmap[TC27XD_DCACHE2].base, sc->memmap[TC27XD_DCACHE2].size); |
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make_ram(&s->cpu2mem.dtag, "CPU2.DTAG", |
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sc->memmap[TC27XD_DTAG2].base, sc->memmap[TC27XD_DTAG2].size); |
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make_ram(&s->cpu2mem.pcache, "CPU2.PCACHE", |
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sc->memmap[TC27XD_PCACHE2].base, sc->memmap[TC27XD_PCACHE2].size); |
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make_ram(&s->cpu2mem.ptag, "CPU2.PTAG", |
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sc->memmap[TC27XD_PTAG2].base, sc->memmap[TC27XD_PTAG2].size); |
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|
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make_ram(&s->cpu1mem.dcache, "CPU1.DCACHE", |
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sc->memmap[TC27XD_DCACHE1].base, sc->memmap[TC27XD_DCACHE1].size); |
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make_ram(&s->cpu1mem.dtag, "CPU1.DTAG", |
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sc->memmap[TC27XD_DTAG1].base, sc->memmap[TC27XD_DTAG1].size); |
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make_ram(&s->cpu1mem.pcache, "CPU1.PCACHE", |
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sc->memmap[TC27XD_PCACHE1].base, sc->memmap[TC27XD_PCACHE1].size); |
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make_ram(&s->cpu1mem.ptag, "CPU1.PTAG", |
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sc->memmap[TC27XD_PTAG1].base, sc->memmap[TC27XD_PTAG1].size); |
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|
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make_ram(&s->cpu0mem.pcache, "CPU0.PCACHE", |
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sc->memmap[TC27XD_PCACHE0].base, sc->memmap[TC27XD_PCACHE0].size); |
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make_ram(&s->cpu0mem.ptag, "CPU0.PTAG", |
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sc->memmap[TC27XD_PTAG0].base, sc->memmap[TC27XD_PTAG0].size); |
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|
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/*
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* TriCore QEMU executes CPU0 only, thus it is sufficient to map |
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* LOCAL.PSPR/LOCAL.DSPR exclusively onto PSPR0/DSPR0. |
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*/ |
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make_alias(&s->psprX, "LOCAL.PSPR", &s->cpu0mem.pspr, |
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sc->memmap[TC27XD_PSPRX].base); |
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make_alias(&s->dsprX, "LOCAL.DSPR", &s->cpu0mem.dspr, |
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sc->memmap[TC27XD_DSPRX].base); |
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|
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make_ram(&s->flashmem.pflash0_c, "PF0", |
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sc->memmap[TC27XD_PFLASH0_C].base, sc->memmap[TC27XD_PFLASH0_C].size); |
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make_ram(&s->flashmem.pflash1_c, "PF1", |
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sc->memmap[TC27XD_PFLASH1_C].base, sc->memmap[TC27XD_PFLASH1_C].size); |
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make_ram(&s->flashmem.dflash0, "DF0", |
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sc->memmap[TC27XD_DFLASH0].base, sc->memmap[TC27XD_DFLASH0].size); |
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make_ram(&s->flashmem.dflash1, "DF1", |
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sc->memmap[TC27XD_DFLASH1].base, sc->memmap[TC27XD_DFLASH1].size); |
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make_ram(&s->flashmem.olda_c, "OLDA", |
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sc->memmap[TC27XD_OLDA_C].base, sc->memmap[TC27XD_OLDA_C].size); |
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make_rom(&s->flashmem.brom_c, "BROM", |
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sc->memmap[TC27XD_BROM_C].base, sc->memmap[TC27XD_BROM_C].size); |
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make_ram(&s->flashmem.lmuram_c, "LMURAM", |
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sc->memmap[TC27XD_LMURAM_C].base, sc->memmap[TC27XD_LMURAM_C].size); |
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make_ram(&s->flashmem.emem_c, "EMEM", |
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sc->memmap[TC27XD_EMEM_C].base, sc->memmap[TC27XD_EMEM_C].size); |
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make_alias(&s->flashmem.pflash0_u, "PF0.U", &s->flashmem.pflash0_c, |
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sc->memmap[TC27XD_PFLASH0_U].base); |
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make_alias(&s->flashmem.pflash1_u, "PF1.U", &s->flashmem.pflash1_c, |
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sc->memmap[TC27XD_PFLASH1_U].base); |
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make_alias(&s->flashmem.olda_u, "OLDA.U", &s->flashmem.olda_c, |
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sc->memmap[TC27XD_OLDA_U].base); |
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make_alias(&s->flashmem.brom_u, "BROM.U", &s->flashmem.brom_c, |
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sc->memmap[TC27XD_BROM_U].base); |
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make_alias(&s->flashmem.lmuram_u, "LMURAM.U", &s->flashmem.lmuram_c, |
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sc->memmap[TC27XD_LMURAM_U].base); |
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make_alias(&s->flashmem.emem_u, "EMEM.U", &s->flashmem.emem_c, |
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sc->memmap[TC27XD_EMEM_U].base); |
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} |
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static void tc27x_soc_realize(DeviceState *dev_soc, Error **errp) |
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{ |
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TC27XSoCState *s = TC27X_SOC(dev_soc); |
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Error *err = NULL; |
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qdev_realize(DEVICE(&s->cpu), NULL, &err); |
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if (err) { |
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error_propagate(errp, err); |
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return; |
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} |
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tc27x_soc_init_memory_mapping(dev_soc); |
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} |
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static void tc27x_soc_init(Object *obj) |
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{ |
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TC27XSoCState *s = TC27X_SOC(obj); |
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TC27XSoCClass *sc = TC27X_SOC_GET_CLASS(s); |
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object_initialize_child(obj, "tc27x", &s->cpu, sc->cpu_type); |
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} |
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static Property tc27x_soc_properties[] = { |
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DEFINE_PROP_END_OF_LIST(), |
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}; |
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static void tc27x_soc_class_init(ObjectClass *klass, void *data) |
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{ |
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DeviceClass *dc = DEVICE_CLASS(klass); |
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dc->realize = tc27x_soc_realize; |
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device_class_set_props(dc, tc27x_soc_properties); |
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} |
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static void tc277d_soc_class_init(ObjectClass *oc, void *data) |
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{ |
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TC27XSoCClass *sc = TC27X_SOC_CLASS(oc); |
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sc->name = "tc277d-soc"; |
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sc->cpu_type = TRICORE_CPU_TYPE_NAME("tc27x"); |
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sc->memmap = tc27x_soc_memmap; |
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sc->num_cpus = 1; |
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} |
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static const TypeInfo tc27x_soc_types[] = { |
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{ |
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.name = "tc277d-soc", |
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.parent = TYPE_TC27X_SOC, |
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.class_init = tc277d_soc_class_init, |
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}, { |
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.name = TYPE_TC27X_SOC, |
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.parent = TYPE_SYS_BUS_DEVICE, |
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.instance_size = sizeof(TC27XSoCState), |
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.instance_init = tc27x_soc_init, |
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.class_size = sizeof(TC27XSoCClass), |
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.class_init = tc27x_soc_class_init, |
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.abstract = true, |
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}, |
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}; |
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DEFINE_TYPES(tc27x_soc_types) |
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@ -0,0 +1,98 @@ |
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/*
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* Infineon TriBoard System emulation. |
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* |
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* Copyright (c) 2020 Andreas Konopik <andreas.konopik@efs-auto.de> |
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* Copyright (c) 2020 David Brenken <david.brenken@efs-auto.de> |
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* |
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* This library is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
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* License as published by the Free Software Foundation; either |
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* version 2 of the License, or (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public |
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
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*/ |
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|
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#include "qemu/osdep.h" |
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#include "qemu/units.h" |
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#include "qapi/error.h" |
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#include "hw/qdev-properties.h" |
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#include "cpu.h" |
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#include "net/net.h" |
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#include "hw/boards.h" |
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#include "hw/loader.h" |
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#include "exec/address-spaces.h" |
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#include "elf.h" |
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#include "hw/tricore/tricore.h" |
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#include "qemu/error-report.h" |
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#include "hw/tricore/triboard.h" |
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#include "hw/tricore/tc27x_soc.h" |
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static void tricore_load_kernel(const char *kernel_filename) |
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{ |
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uint64_t entry; |
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long kernel_size; |
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TriCoreCPU *cpu; |
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CPUTriCoreState *env; |
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kernel_size = load_elf(kernel_filename, NULL, |
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NULL, NULL, &entry, NULL, |
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NULL, NULL, 0, |
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EM_TRICORE, 1, 0); |
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if (kernel_size <= 0) { |
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error_report("no kernel file '%s'", kernel_filename); |
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exit(1); |
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} |
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cpu = TRICORE_CPU(first_cpu); |
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env = &cpu->env; |
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env->PC = entry; |
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} |
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|
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static void triboard_machine_init(MachineState *machine) |
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{ |
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TriBoardMachineState *ms = TRIBOARD_MACHINE(machine); |
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TriBoardMachineClass *amc = TRIBOARD_MACHINE_GET_CLASS(machine); |
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object_initialize_child(OBJECT(machine), "soc", &ms->tc27x_soc, |
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amc->soc_name); |
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sysbus_realize(SYS_BUS_DEVICE(&ms->tc27x_soc), &error_fatal); |
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|
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if (machine->kernel_filename) { |
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tricore_load_kernel(machine->kernel_filename); |
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} |
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} |
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|
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static void triboard_machine_tc277d_class_init(ObjectClass *oc, |
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void *data) |
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{ |
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MachineClass *mc = MACHINE_CLASS(oc); |
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TriBoardMachineClass *amc = TRIBOARD_MACHINE_CLASS(oc); |
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mc->init = triboard_machine_init; |
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mc->desc = "Infineon AURIX TriBoard TC277 (D-Step)"; |
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mc->max_cpus = 1; |
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amc->soc_name = "tc277d-soc"; |
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}; |
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static const TypeInfo triboard_machine_types[] = { |
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{ |
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.name = MACHINE_TYPE_NAME("KIT_AURIX_TC277_TRB"), |
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.parent = TYPE_TRIBOARD_MACHINE, |
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.class_init = triboard_machine_tc277d_class_init, |
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}, { |
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.name = TYPE_TRIBOARD_MACHINE, |
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.parent = TYPE_MACHINE, |
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.instance_size = sizeof(TriBoardMachineState), |
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.class_size = sizeof(TriBoardMachineClass), |
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.abstract = true, |
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}, |
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}; |
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|
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DEFINE_TYPES(triboard_machine_types) |
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@ -0,0 +1,129 @@ |
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/*
|
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* Infineon tc27x SoC System emulation. |
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* |
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* Copyright (c) 2020 Andreas Konopik <andreas.konopik@efs-auto.de> |
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* Copyright (c) 2020 David Brenken <david.brenken@efs-auto.de> |
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* |
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* This library is free software; you can redistribute it and/or |
|||
* modify it under the terms of the GNU Lesser General Public |
|||
* License as published by the Free Software Foundation; either |
|||
* version 2 of the License, or (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
|||
* Lesser General Public License for more details. |
|||
* |
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* You should have received a copy of the GNU Lesser General Public |
|||
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
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*/ |
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|
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#ifndef TC27X_SoC_H |
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#define TC27X_SoC_H |
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|
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#include "hw/sysbus.h" |
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#include "target/tricore/cpu.h" |
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#include "qom/object.h" |
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|
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#define TYPE_TC27X_SOC ("tc27x-soc") |
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OBJECT_DECLARE_TYPE(TC27XSoCState, TC27XSoCClass, TC27X_SOC) |
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|
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typedef struct TC27XSoCCPUMemState { |
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|
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MemoryRegion dspr; |
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MemoryRegion pspr; |
|||
|
|||
MemoryRegion dcache; |
|||
MemoryRegion dtag; |
|||
MemoryRegion pcache; |
|||
MemoryRegion ptag; |
|||
|
|||
} TC27XSoCCPUMemState; |
|||
|
|||
typedef struct TC27XSoCFlashMemState { |
|||
|
|||
MemoryRegion pflash0_c; |
|||
MemoryRegion pflash1_c; |
|||
MemoryRegion pflash0_u; |
|||
MemoryRegion pflash1_u; |
|||
MemoryRegion dflash0; |
|||
MemoryRegion dflash1; |
|||
MemoryRegion olda_c; |
|||
MemoryRegion olda_u; |
|||
MemoryRegion brom_c; |
|||
MemoryRegion brom_u; |
|||
MemoryRegion lmuram_c; |
|||
MemoryRegion lmuram_u; |
|||
MemoryRegion emem_c; |
|||
MemoryRegion emem_u; |
|||
|
|||
} TC27XSoCFlashMemState; |
|||
|
|||
typedef struct TC27XSoCState { |
|||
/*< private >*/ |
|||
SysBusDevice parent_obj; |
|||
|
|||
/*< public >*/ |
|||
TriCoreCPU cpu; |
|||
|
|||
MemoryRegion dsprX; |
|||
MemoryRegion psprX; |
|||
|
|||
TC27XSoCCPUMemState cpu0mem; |
|||
TC27XSoCCPUMemState cpu1mem; |
|||
TC27XSoCCPUMemState cpu2mem; |
|||
|
|||
TC27XSoCFlashMemState flashmem; |
|||
|
|||
} TC27XSoCState; |
|||
|
|||
typedef struct MemmapEntry { |
|||
hwaddr base; |
|||
hwaddr size; |
|||
} MemmapEntry; |
|||
|
|||
typedef struct TC27XSoCClass { |
|||
DeviceClass parent_class; |
|||
|
|||
const char *name; |
|||
const char *cpu_type; |
|||
const MemmapEntry *memmap; |
|||
uint32_t num_cpus; |
|||
} TC27XSoCClass; |
|||
|
|||
enum { |
|||
TC27XD_DSPR2, |
|||
TC27XD_DCACHE2, |
|||
TC27XD_DTAG2, |
|||
TC27XD_PSPR2, |
|||
TC27XD_PCACHE2, |
|||
TC27XD_PTAG2, |
|||
TC27XD_DSPR1, |
|||
TC27XD_DCACHE1, |
|||
TC27XD_DTAG1, |
|||
TC27XD_PSPR1, |
|||
TC27XD_PCACHE1, |
|||
TC27XD_PTAG1, |
|||
TC27XD_DSPR0, |
|||
TC27XD_PSPR0, |
|||
TC27XD_PCACHE0, |
|||
TC27XD_PTAG0, |
|||
TC27XD_PFLASH0_C, |
|||
TC27XD_PFLASH1_C, |
|||
TC27XD_OLDA_C, |
|||
TC27XD_BROM_C, |
|||
TC27XD_LMURAM_C, |
|||
TC27XD_EMEM_C, |
|||
TC27XD_PFLASH0_U, |
|||
TC27XD_PFLASH1_U, |
|||
TC27XD_DFLASH0, |
|||
TC27XD_DFLASH1, |
|||
TC27XD_OLDA_U, |
|||
TC27XD_BROM_U, |
|||
TC27XD_LMURAM_U, |
|||
TC27XD_EMEM_U, |
|||
TC27XD_PSPRX, |
|||
TC27XD_DSPRX, |
|||
}; |
|||
|
|||
#endif |
|||
@ -0,0 +1,50 @@ |
|||
/*
|
|||
* Infineon TriBoard System emulation. |
|||
* |
|||
* Copyright (c) 2020 Andreas Konopik <andreas.konopik@efs-auto.de> |
|||
* Copyright (c) 2020 David Brenken <david.brenken@efs-auto.de> |
|||
* |
|||
* This library is free software; you can redistribute it and/or |
|||
* modify it under the terms of the GNU Lesser General Public |
|||
* License as published by the Free Software Foundation; either |
|||
* version 2 of the License, or (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
|||
* Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public |
|||
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include "qemu/osdep.h" |
|||
#include "qapi/error.h" |
|||
#include "hw/boards.h" |
|||
#include "hw/arm/boot.h" |
|||
#include "sysemu/sysemu.h" |
|||
#include "exec/address-spaces.h" |
|||
#include "qom/object.h" |
|||
|
|||
#include "hw/tricore/tc27x_soc.h" |
|||
|
|||
#define TYPE_TRIBOARD_MACHINE MACHINE_TYPE_NAME("triboard") |
|||
typedef struct TriBoardMachineState TriBoardMachineState; |
|||
typedef struct TriBoardMachineClass TriBoardMachineClass; |
|||
DECLARE_OBJ_CHECKERS(TriBoardMachineState, TriBoardMachineClass, |
|||
TRIBOARD_MACHINE, TYPE_TRIBOARD_MACHINE) |
|||
|
|||
|
|||
struct TriBoardMachineState { |
|||
MachineState parent; |
|||
|
|||
TC27XSoCState tc27x_soc; |
|||
}; |
|||
|
|||
struct TriBoardMachineClass { |
|||
MachineClass parent_obj; |
|||
|
|||
const char *name; |
|||
const char *desc; |
|||
const char *soc_name; |
|||
}; |
|||
Loading…
Reference in new issue