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@ -80,6 +80,7 @@ typedef struct APICState APICState; |
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struct APICState { |
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SysBusDevice busdev; |
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MemoryRegion io_memory; |
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void *cpu_env; |
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uint32_t apicbase; |
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uint8_t id; |
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@ -979,31 +980,25 @@ static void apic_reset(DeviceState *d) |
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} |
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} |
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static CPUReadMemoryFunc * const apic_mem_read[3] = { |
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apic_mem_readb, |
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apic_mem_readw, |
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apic_mem_readl, |
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}; |
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static CPUWriteMemoryFunc * const apic_mem_write[3] = { |
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apic_mem_writeb, |
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apic_mem_writew, |
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apic_mem_writel, |
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static const MemoryRegionOps apic_io_ops = { |
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.old_mmio = { |
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.read = { apic_mem_readb, apic_mem_readw, apic_mem_readl, }, |
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.write = { apic_mem_writeb, apic_mem_writew, apic_mem_writel, }, |
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}, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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}; |
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static int apic_init1(SysBusDevice *dev) |
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{ |
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APICState *s = FROM_SYSBUS(APICState, dev); |
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int apic_io_memory; |
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static int last_apic_idx; |
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if (last_apic_idx >= MAX_APICS) { |
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return -1; |
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} |
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apic_io_memory = cpu_register_io_memory(apic_mem_read, |
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apic_mem_write, NULL, |
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DEVICE_NATIVE_ENDIAN); |
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sysbus_init_mmio(dev, MSI_ADDR_SIZE, apic_io_memory); |
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memory_region_init_io(&s->io_memory, &apic_io_ops, s, "apic", |
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MSI_ADDR_SIZE); |
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sysbus_init_mmio_region(dev, &s->io_memory); |
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s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s); |
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s->idx = last_apic_idx++; |
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