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ppc/xics: Replace "icp" with "xics" in most places 

The "ICP" is a different object than the "XICS". For historical reasons,
we have a number of places where we name a variable "icp" while it contains
a XICSState pointer. There *is* an ICPState structure too so this makes
the code really confusing.

This is a mechanical replacement of all those instances to use the name
"xics" instead. There should be no functional change.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[spapr_cpu_init has been moved to spapr_cpu_core.c, change there]
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
pull/42/head
Benjamin Herrenschmidt 10 years ago
committed by David Gibson
parent
1cbd222055
commit
27f2458245
12 changed files with 154 additions and 149 deletions
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  1. 120
      hw/intc/xics.c
  2. 57
      hw/intc/xics_kvm.c
  3. 73
      hw/intc/xics_spapr.c
  4. 20
      hw/ppc/spapr.c
  5. 4
      hw/ppc/spapr_cpu_core.c
  6. 8
      hw/ppc/spapr_events.c
  7. 11
      hw/ppc/spapr_pci.c
  8. 2
      hw/ppc/spapr_vio.c
  9. 2
      include/hw/pci-host/spapr.h
  10. 2
      include/hw/ppc/spapr.h
  11. 2
      include/hw/ppc/spapr_vio.h
  12. 2
      include/hw/ppc/xics.h

120
hw/intc/xics.c
View File

@ -47,31 +47,31 @@ int xics_get_cpu_index_by_dt_id(int cpu_dt_id)
return -1;
}
void xics_cpu_destroy(XICSState *icp, PowerPCCPU *cpu)
void xics_cpu_destroy(XICSState *xics, PowerPCCPU *cpu)
{
CPUState *cs = CPU(cpu);
ICPState *ss = &icp->ss[cs->cpu_index];
ICPState *ss = &xics->ss[cs->cpu_index];
assert(cs->cpu_index < icp->nr_servers);
assert(cs->cpu_index < xics->nr_servers);
assert(cs == ss->cs);
ss->output = NULL;
ss->cs = NULL;
}
void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
void xics_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
{
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
ICPState *ss = &icp->ss[cs->cpu_index];
XICSStateClass *info = XICS_COMMON_GET_CLASS(icp);
ICPState *ss = &xics->ss[cs->cpu_index];
XICSStateClass *info = XICS_COMMON_GET_CLASS(xics);
assert(cs->cpu_index < icp->nr_servers);
assert(cs->cpu_index < xics->nr_servers);
ss->cs = cs;
if (info->cpu_setup) {
info->cpu_setup(icp, cpu);
info->cpu_setup(xics, cpu);
}
switch (PPC_INPUT(env)) {
@ -95,21 +95,21 @@ void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
*/
static void xics_common_reset(DeviceState *d)
{
XICSState *icp = XICS_COMMON(d);
XICSState *xics = XICS_COMMON(d);
int i;
for (i = 0; i < icp->nr_servers; i++) {
device_reset(DEVICE(&icp->ss[i]));
for (i = 0; i < xics->nr_servers; i++) {
device_reset(DEVICE(&xics->ss[i]));
}
device_reset(DEVICE(icp->ics));
device_reset(DEVICE(xics->ics));
}
static void xics_prop_get_nr_irqs(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
XICSState *icp = XICS_COMMON(obj);
int64_t value = icp->nr_irqs;
XICSState *xics = XICS_COMMON(obj);
int64_t value = xics->nr_irqs;
visit_type_int(v, name, &value, errp);
}
@ -117,8 +117,8 @@ static void xics_prop_get_nr_irqs(Object *obj, Visitor *v, const char *name,
static void xics_prop_set_nr_irqs(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
XICSState *icp = XICS_COMMON(obj);
XICSStateClass *info = XICS_COMMON_GET_CLASS(icp);
XICSState *xics = XICS_COMMON(obj);
XICSStateClass *info = XICS_COMMON_GET_CLASS(xics);
Error *error = NULL;
int64_t value;
@ -127,23 +127,23 @@ static void xics_prop_set_nr_irqs(Object *obj, Visitor *v, const char *name,
error_propagate(errp, error);
return;
}
if (icp->nr_irqs) {
if (xics->nr_irqs) {
error_setg(errp, "Number of interrupts is already set to %u",
icp->nr_irqs);
xics->nr_irqs);
return;
}
assert(info->set_nr_irqs);
assert(icp->ics);
info->set_nr_irqs(icp, value, errp);
assert(xics->ics);
info->set_nr_irqs(xics, value, errp);
}
static void xics_prop_get_nr_servers(Object *obj, Visitor *v,
const char *name, void *opaque,
Error **errp)
{
XICSState *icp = XICS_COMMON(obj);
int64_t value = icp->nr_servers;
XICSState *xics = XICS_COMMON(obj);
int64_t value = xics->nr_servers;
visit_type_int(v, name, &value, errp);
}
@ -152,8 +152,8 @@ static void xics_prop_set_nr_servers(Object *obj, Visitor *v,
const char *name, void *opaque,
Error **errp)
{
XICSState *icp = XICS_COMMON(obj);
XICSStateClass *info = XICS_COMMON_GET_CLASS(icp);
XICSState *xics = XICS_COMMON(obj);
XICSStateClass *info = XICS_COMMON_GET_CLASS(xics);
Error *error = NULL;
int64_t value;
@ -162,14 +162,14 @@ static void xics_prop_set_nr_servers(Object *obj, Visitor *v,
error_propagate(errp, error);
return;
}
if (icp->nr_servers) {
if (xics->nr_servers) {
error_setg(errp, "Number of servers is already set to %u",
icp->nr_servers);
xics->nr_servers);
return;
}
assert(info->set_nr_servers);
info->set_nr_servers(icp, value, errp);
info->set_nr_servers(xics, value, errp);
}
static void xics_common_initfn(Object *obj)
@ -212,9 +212,9 @@ static void ics_reject(ICSState *ics, int nr);
static void ics_resend(ICSState *ics);
static void ics_eoi(ICSState *ics, int nr);
static void icp_check_ipi(XICSState *icp, int server)
static void icp_check_ipi(XICSState *xics, int server)
{
ICPState *ss = icp->ss + server;
ICPState *ss = xics->ss + server;
if (XISR(ss) && (ss->pending_priority <= ss->mfrr)) {
return;
@ -223,7 +223,7 @@ static void icp_check_ipi(XICSState *icp, int server)
trace_xics_icp_check_ipi(server, ss->mfrr);
if (XISR(ss)) {
ics_reject(icp->ics, XISR(ss));
ics_reject(xics->ics, XISR(ss));
}
ss->xirr = (ss->xirr & ~XISR_MASK) | XICS_IPI;
@ -231,19 +231,19 @@ static void icp_check_ipi(XICSState *icp, int server)
qemu_irq_raise(ss->output);
}
static void icp_resend(XICSState *icp, int server)
static void icp_resend(XICSState *xics, int server)
{
ICPState *ss = icp->ss + server;
ICPState *ss = xics->ss + server;
if (ss->mfrr < CPPR(ss)) {
icp_check_ipi(icp, server);
icp_check_ipi(xics, server);
}
ics_resend(icp->ics);
ics_resend(xics->ics);
}
void icp_set_cppr(XICSState *icp, int server, uint8_t cppr)
void icp_set_cppr(XICSState *xics, int server, uint8_t cppr)
{
ICPState *ss = icp->ss + server;
ICPState *ss = xics->ss + server;
uint8_t old_cppr;
uint32_t old_xisr;
@ -256,22 +256,22 @@ void icp_set_cppr(XICSState *icp, int server, uint8_t cppr)
ss->xirr &= ~XISR_MASK; /* Clear XISR */
ss->pending_priority = 0xff;
qemu_irq_lower(ss->output);
ics_reject(icp->ics, old_xisr);
ics_reject(xics->ics, old_xisr);
}
} else {
if (!XISR(ss)) {
icp_resend(icp, server);
icp_resend(xics, server);
}
}
}
void icp_set_mfrr(XICSState *icp, int server, uint8_t mfrr)
void icp_set_mfrr(XICSState *xics, int server, uint8_t mfrr)
{
ICPState *ss = icp->ss + server;
ICPState *ss = xics->ss + server;
ss->mfrr = mfrr;
if (mfrr < CPPR(ss)) {
icp_check_ipi(icp, server);
icp_check_ipi(xics, server);
}
}
@ -296,31 +296,31 @@ uint32_t icp_ipoll(ICPState *ss, uint32_t *mfrr)
return ss->xirr;
}
void icp_eoi(XICSState *icp, int server, uint32_t xirr)
void icp_eoi(XICSState *xics, int server, uint32_t xirr)
{
ICPState *ss = icp->ss + server;
ICPState *ss = xics->ss + server;
/* Send EOI -> ICS */
ss->xirr = (ss->xirr & ~CPPR_MASK) | (xirr & CPPR_MASK);
trace_xics_icp_eoi(server, xirr, ss->xirr);
ics_eoi(icp->ics, xirr & XISR_MASK);
ics_eoi(xics->ics, xirr & XISR_MASK);
if (!XISR(ss)) {
icp_resend(icp, server);
icp_resend(xics, server);
}
}
static void icp_irq(XICSState *icp, int server, int nr, uint8_t priority)
static void icp_irq(XICSState *xics, int server, int nr, uint8_t priority)
{
ICPState *ss = icp->ss + server;
ICPState *ss = xics->ss + server;
trace_xics_icp_irq(server, nr, priority);
if ((priority >= CPPR(ss))
|| (XISR(ss) && (ss->pending_priority <= priority))) {
ics_reject(icp->ics, nr);
ics_reject(xics->ics, nr);
} else {
if (XISR(ss)) {
ics_reject(icp->ics, XISR(ss));
ics_reject(xics->ics, XISR(ss));
}
ss->xirr = (ss->xirr & ~XISR_MASK) | (nr & XISR_MASK);
ss->pending_priority = priority;
@ -405,7 +405,7 @@ static void resend_msi(ICSState *ics, int srcno)
if (irq->status & XICS_STATUS_REJECTED) {
irq->status &= ~XICS_STATUS_REJECTED;
if (irq->priority != 0xff) {
icp_irq(ics->icp, irq->server, srcno + ics->offset,
icp_irq(ics->xics, irq->server, srcno + ics->offset,
irq->priority);
}
}
@ -419,7 +419,7 @@ static void resend_lsi(ICSState *ics, int srcno)
&& (irq->status & XICS_STATUS_ASSERTED)
&& !(irq->status & XICS_STATUS_SENT)) {
irq->status |= XICS_STATUS_SENT;
icp_irq(ics->icp, irq->server, srcno + ics->offset, irq->priority);
icp_irq(ics->xics, irq->server, srcno + ics->offset, irq->priority);
}
}
@ -434,7 +434,7 @@ static void set_irq_msi(ICSState *ics, int srcno, int val)
irq->status |= XICS_STATUS_MASKED_PENDING;
trace_xics_masked_pending();
} else {
icp_irq(ics->icp, irq->server, srcno + ics->offset, irq->priority);
icp_irq(ics->xics, irq->server, srcno + ics->offset, irq->priority);
}
}
}
@ -473,7 +473,7 @@ static void write_xive_msi(ICSState *ics, int srcno)
}
irq->status &= ~XICS_STATUS_MASKED_PENDING;
icp_irq(ics->icp, irq->server, srcno + ics->offset, irq->priority);
icp_irq(ics->xics, irq->server, srcno + ics->offset, irq->priority);
}
static void write_xive_lsi(ICSState *ics, int srcno)
@ -558,8 +558,8 @@ static int ics_post_load(ICSState *ics, int version_id)
{
int i;
for (i = 0; i < ics->icp->nr_servers; i++) {
icp_resend(ics->icp, i);
for (i = 0; i < ics->xics->nr_servers; i++) {
icp_resend(ics->xics, i);
}
return 0;
@ -659,14 +659,14 @@ static const TypeInfo ics_info = {
/*
* Exported functions
*/
int xics_find_source(XICSState *icp, int irq)
int xics_find_source(XICSState *xics, int irq)
{
int sources = 1;
int src;
/* FIXME: implement multiple sources */
for (src = 0; src < sources; ++src) {
ICSState *ics = &icp->ics[src];
ICSState *ics = &xics->ics[src];
if (ics_valid_irq(ics, irq)) {
return src;
}
@ -675,12 +675,12 @@ int xics_find_source(XICSState *icp, int irq)
return -1;
}
qemu_irq xics_get_qirq(XICSState *icp, int irq)
qemu_irq xics_get_qirq(XICSState *xics, int irq)
{
int src = xics_find_source(icp, irq);
int src = xics_find_source(xics, irq);
if (src >= 0) {
ICSState *ics = &icp->ics[src];
ICSState *ics = &xics->ics[src];
return ics->qirqs[irq - ics->offset];
}

57
hw/intc/xics_kvm.c
View File

@ -145,7 +145,7 @@ static const TypeInfo icp_kvm_info = {
*/
static void ics_get_kvm_state(ICSState *ics)
{
KVMXICSState *icpkvm = XICS_SPAPR_KVM(ics->icp);
KVMXICSState *xicskvm = XICS_SPAPR_KVM(ics->xics);
uint64_t state;
struct kvm_device_attr attr = {
.flags = 0,
@ -160,7 +160,7 @@ static void ics_get_kvm_state(ICSState *ics)
attr.attr = i + ics->offset;
ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
ret = ioctl(xicskvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
if (ret != 0) {
error_report("Unable to retrieve KVM interrupt controller state"
" for IRQ %d: %s", i + ics->offset, strerror(errno));
@ -204,7 +204,7 @@ static void ics_get_kvm_state(ICSState *ics)
static int ics_set_kvm_state(ICSState *ics, int version_id)
{
KVMXICSState *icpkvm = XICS_SPAPR_KVM(ics->icp);
KVMXICSState *xicskvm = XICS_SPAPR_KVM(ics->xics);
uint64_t state;
struct kvm_device_attr attr = {
.flags = 0,
@ -238,7 +238,7 @@ static int ics_set_kvm_state(ICSState *ics, int version_id)
}
}
ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
ret = ioctl(xicskvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
if (ret != 0) {
error_report("Unable to restore KVM interrupt controller state"
" for IRQs %d: %s", i + ics->offset, strerror(errno));
@ -324,17 +324,17 @@ static const TypeInfo ics_kvm_info = {
/*
* XICS-KVM
*/
static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
static void xics_kvm_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
{
CPUState *cs;
ICPState *ss;
KVMXICSState *icpkvm = XICS_SPAPR_KVM(icp);
KVMXICSState *xicskvm = XICS_SPAPR_KVM(xics);
cs = CPU(cpu);
ss = &icp->ss[cs->cpu_index];
ss = &xics->ss[cs->cpu_index];
assert(cs->cpu_index < icp->nr_servers);
if (icpkvm->kernel_xics_fd == -1) {
assert(cs->cpu_index < xics->nr_servers);
if (xicskvm->kernel_xics_fd == -1) {
abort();
}
@ -347,11 +347,12 @@ static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
return;
}
if (icpkvm->kernel_xics_fd != -1) {
if (xicskvm->kernel_xics_fd != -1) {
int ret;
ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
xicskvm->kernel_xics_fd,
kvm_arch_vcpu_id(cs));
if (ret < 0) {
error_report("Unable to connect CPU%ld to kernel XICS: %s",
kvm_arch_vcpu_id(cs), strerror(errno));
@ -361,24 +362,25 @@ static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
}
}
static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp)
static void xics_kvm_set_nr_irqs(XICSState *xics, uint32_t nr_irqs,
Error **errp)
{
icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
xics->nr_irqs = xics->ics->nr_irqs = nr_irqs;
}
static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers,
static void xics_kvm_set_nr_servers(XICSState *xics, uint32_t nr_servers,
Error **errp)
{
int i;
icp->nr_servers = nr_servers;
xics->nr_servers = nr_servers;
icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
for (i = 0; i < icp->nr_servers; i++) {
xics->ss = g_malloc0(xics->nr_servers * sizeof(ICPState));
for (i = 0; i < xics->nr_servers; i++) {
char buffer[32];
object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP);
object_initialize(&xics->ss[i], sizeof(xics->ss[i]), TYPE_KVM_ICP);
snprintf(buffer, sizeof(buffer), "icp[%d]", i);
object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
object_property_add_child(OBJECT(xics), buffer, OBJECT(&xics->ss[i]),
errp);
}
}
@ -394,8 +396,8 @@ static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
static void xics_kvm_realize(DeviceState *dev, Error **errp)
{
KVMXICSState *icpkvm = XICS_SPAPR_KVM(dev);
XICSState *icp = XICS_COMMON(dev);
KVMXICSState *xicskvm = XICS_SPAPR_KVM(dev);
XICSState *xics = XICS_COMMON(dev);
int i, rc;
Error *error = NULL;
struct kvm_create_device xics_create_device = {
@ -445,17 +447,18 @@ static void xics_kvm_realize(DeviceState *dev, Error **errp)
goto fail;
}
icpkvm->kernel_xics_fd = xics_create_device.fd;
xicskvm->kernel_xics_fd = xics_create_device.fd;
object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
object_property_set_bool(OBJECT(xics->ics), true, "realized", &error);
if (error) {
error_propagate(errp, error);
goto fail;
}
assert(icp->nr_servers);
for (i = 0; i < icp->nr_servers; i++) {
object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
assert(xics->nr_servers);
for (i = 0; i < xics->nr_servers; i++) {
object_property_set_bool(OBJECT(&xics->ss[i]), true, "realized",
&error);
if (error) {
error_propagate(errp, error);
goto fail;
@ -481,7 +484,7 @@ static void xics_kvm_initfn(Object *obj)
xics->ics = ICS(object_new(TYPE_KVM_ICS));
object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
xics->ics->icp = xics;
xics->ics->xics = xics;
}
static void xics_kvm_class_init(ObjectClass *oc, void *data)

73
hw/intc/xics_spapr.c
View File

@ -45,7 +45,7 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
CPUState *cs = CPU(cpu);
target_ulong cppr = args[0];
icp_set_cppr(spapr->icp, cs->cpu_index, cppr);
icp_set_cppr(spapr->xics, cs->cpu_index, cppr);
return H_SUCCESS;
}
@ -55,11 +55,11 @@ static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
target_ulong server = xics_get_cpu_index_by_dt_id(args[0]);
target_ulong mfrr = args[1];
if (server >= spapr->icp->nr_servers) {
if (server >= spapr->xics->nr_servers) {
return H_PARAMETER;
}
icp_set_mfrr(spapr->icp, server, mfrr);
icp_set_mfrr(spapr->xics, server, mfrr);
return H_SUCCESS;
}
@ -67,7 +67,7 @@ static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
CPUState *cs = CPU(cpu);
uint32_t xirr = icp_accept(spapr->icp->ss + cs->cpu_index);
uint32_t xirr = icp_accept(spapr->xics->ss + cs->cpu_index);
args[0] = xirr;
return H_SUCCESS;
@ -77,7 +77,7 @@ static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
CPUState *cs = CPU(cpu);
ICPState *ss = &spapr->icp->ss[cs->cpu_index];
ICPState *ss = &spapr->xics->ss[cs->cpu_index];
uint32_t xirr = icp_accept(ss);
args[0] = xirr;
@ -91,7 +91,7 @@ static target_ulong h_eoi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
CPUState *cs = CPU(cpu);
target_ulong xirr = args[0];
icp_eoi(spapr->icp, cs->cpu_index, xirr);
icp_eoi(spapr->xics, cs->cpu_index, xirr);
return H_SUCCESS;
}
@ -100,7 +100,7 @@ static target_ulong h_ipoll(PowerPCCPU *cpu, sPAPRMachineState *spapr,
{
CPUState *cs = CPU(cpu);
uint32_t mfrr;
uint32_t xirr = icp_ipoll(spapr->icp->ss + cs->cpu_index, &mfrr);
uint32_t xirr = icp_ipoll(spapr->xics->ss + cs->cpu_index, &mfrr);
args[0] = xirr;
args[1] = mfrr;
@ -113,7 +113,7 @@ static void rtas_set_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t nargs, target_ulong args,
uint32_t nret, target_ulong rets)
{
ICSState *ics = spapr->icp->ics;
ICSState *ics = spapr->xics->ics;
uint32_t nr, server, priority;
if ((nargs != 3) || (nret != 1)) {
@ -125,7 +125,7 @@ static void rtas_set_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr,
server = xics_get_cpu_index_by_dt_id(rtas_ld(args, 1));
priority = rtas_ld(args, 2);
if (!ics_valid_irq(ics, nr) || (server >= ics->icp->nr_servers)
if (!ics_valid_irq(ics, nr) || (server >= ics->xics->nr_servers)
|| (priority > 0xff)) {
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
return;
@ -141,7 +141,7 @@ static void rtas_get_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t nargs, target_ulong args,
uint32_t nret, target_ulong rets)
{
ICSState *ics = spapr->icp->ics;
ICSState *ics = spapr->xics->ics;
uint32_t nr;
if ((nargs != 1) || (nret != 3)) {
@ -166,7 +166,7 @@ static void rtas_int_off(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t nargs, target_ulong args,
uint32_t nret, target_ulong rets)
{
ICSState *ics = spapr->icp->ics;
ICSState *ics = spapr->xics->ics;
uint32_t nr;
if ((nargs != 1) || (nret != 1)) {
@ -192,7 +192,7 @@ static void rtas_int_on(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t nargs, target_ulong args,
uint32_t nret, target_ulong rets)
{
ICSState *ics = spapr->icp->ics;
ICSState *ics = spapr->xics->ics;
uint32_t nr;
if ((nargs != 1) || (nret != 1)) {
@ -214,36 +214,36 @@ static void rtas_int_on(PowerPCCPU *cpu, sPAPRMachineState *spapr,
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}
static void xics_spapr_set_nr_irqs(XICSState *icp, uint32_t nr_irqs,
static void xics_spapr_set_nr_irqs(XICSState *xics, uint32_t nr_irqs,
Error **errp)
{
icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
xics->nr_irqs = xics->ics->nr_irqs = nr_irqs;
}
static void xics_spapr_set_nr_servers(XICSState *icp, uint32_t nr_servers,
static void xics_spapr_set_nr_servers(XICSState *xics, uint32_t nr_servers,
Error **errp)
{
int i;
icp->nr_servers = nr_servers;
xics->nr_servers = nr_servers;
icp->ss = g_malloc0(icp->nr_servers * sizeof(ICPState));
for (i = 0; i < icp->nr_servers; i++) {
xics->ss = g_malloc0(xics->nr_servers * sizeof(ICPState));
for (i = 0; i < xics->nr_servers; i++) {
char buffer[32];
object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_ICP);
object_initialize(&xics->ss[i], sizeof(xics->ss[i]), TYPE_ICP);
snprintf(buffer, sizeof(buffer), "icp[%d]", i);
object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
object_property_add_child(OBJECT(xics), buffer, OBJECT(&xics->ss[i]),
errp);
}
}
static void xics_spapr_realize(DeviceState *dev, Error **errp)
{
XICSState *icp = XICS_SPAPR(dev);
XICSState *xics = XICS_SPAPR(dev);
Error *error = NULL;
int i;
if (!icp->nr_servers) {
if (!xics->nr_servers) {
error_setg(errp, "Number of servers needs to be greater 0");
return;
}
@ -261,14 +261,15 @@ static void xics_spapr_realize(DeviceState *dev, Error **errp)
spapr_register_hypercall(H_EOI, h_eoi);
spapr_register_hypercall(H_IPOLL, h_ipoll);
object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
object_property_set_bool(OBJECT(xics->ics), true, "realized", &error);
if (error) {
error_propagate(errp, error);
return;
}
for (i = 0; i < icp->nr_servers; i++) {
object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
for (i = 0; i < xics->nr_servers; i++) {
object_property_set_bool(OBJECT(&xics->ss[i]), true, "realized",
&error);
if (error) {
error_propagate(errp, error);
return;
@ -282,7 +283,7 @@ static void xics_spapr_initfn(Object *obj)
xics->ics = ICS(object_new(TYPE_ICS));
object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
xics->ics->icp = xics;
xics->ics->xics = xics;
}
static void xics_spapr_class_init(ObjectClass *oc, void *data)
@ -328,14 +329,14 @@ static int ics_find_free_block(ICSState *ics, int num, int alignnum)
return -1;
}
int xics_spapr_alloc(XICSState *icp, int src, int irq_hint, bool lsi,
int xics_spapr_alloc(XICSState *xics, int src, int irq_hint, bool lsi,
Error **errp)
{
ICSState *ics = &icp->ics[src];
ICSState *ics = &xics->ics[src];
int irq;
if (irq_hint) {
assert(src == xics_find_source(icp, irq_hint));
assert(src == xics_find_source(xics, irq_hint));
if (!ICS_IRQ_FREE(ics, irq_hint - ics->offset)) {
error_setg(errp, "can't allocate IRQ %d: already in use", irq_hint);
return -1;
@ -360,11 +361,11 @@ int xics_spapr_alloc(XICSState *icp, int src, int irq_hint, bool lsi,
* Allocate block of consecutive IRQs, and return the number of the first IRQ in
* the block. If align==true, aligns the first IRQ number to num.
*/
int xics_spapr_alloc_block(XICSState *icp, int src, int num, bool lsi,
int xics_spapr_alloc_block(XICSState *xics, int src, int num, bool lsi,
bool align, Error **errp)
{
int i, first = -1;
ICSState *ics = &icp->ics[src];
ICSState *ics = &xics->ics[src];
assert(src == 0);
/*
@ -404,23 +405,23 @@ static void ics_free(ICSState *ics, int srcno, int num)
for (i = srcno; i < srcno + num; ++i) {
if (ICS_IRQ_FREE(ics, i)) {
trace_xics_ics_free_warn(ics - ics->icp->ics, i + ics->offset);
trace_xics_ics_free_warn(ics - ics->xics->ics, i + ics->offset);
}
memset(&ics->irqs[i], 0, sizeof(ICSIRQState));
}
}
void xics_spapr_free(XICSState *icp, int irq, int num)
void xics_spapr_free(XICSState *xics, int irq, int num)
{
int src = xics_find_source(icp, irq);
int src = xics_find_source(xics, irq);
if (src >= 0) {
ICSState *ics = &icp->ics[src];
ICSState *ics = &xics->ics[src];
/* FIXME: implement multiple sources */
assert(src == 0);
trace_xics_ics_free(ics - icp->ics, irq, num);
trace_xics_ics_free(ics - xics->ics, irq, num);
ics_free(ics, irq - ics->offset, num);
}
}

20
hw/ppc/spapr.c
View File

@ -116,16 +116,16 @@ static XICSState *try_create_xics(const char *type, int nr_servers,
static XICSState *xics_system_init(MachineState *machine,
int nr_servers, int nr_irqs, Error **errp)
{
XICSState *icp = NULL;
XICSState *xics = NULL;
if (kvm_enabled()) {
Error *err = NULL;
if (machine_kernel_irqchip_allowed(machine)) {
icp = try_create_xics(TYPE_XICS_SPAPR_KVM, nr_servers, nr_irqs,
&err);
xics = try_create_xics(TYPE_XICS_SPAPR_KVM, nr_servers, nr_irqs,
&err);
}
if (machine_kernel_irqchip_required(machine) && !icp) {
if (machine_kernel_irqchip_required(machine) && !xics) {
error_reportf_err(err,
"kernel_irqchip requested but unavailable: ");
} else {
@ -133,11 +133,11 @@ static XICSState *xics_system_init(MachineState *machine,
}
}
if (!icp) {
icp = try_create_xics(TYPE_XICS_SPAPR, nr_servers, nr_irqs, errp);
if (!xics) {
xics = try_create_xics(TYPE_XICS_SPAPR, nr_servers, nr_irqs, errp);
}
return icp;
return xics;
}
static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
@ -1783,9 +1783,9 @@ static void ppc_spapr_init(MachineState *machine)
load_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD;
/* Set up Interrupt Controller before we create the VCPUs */
spapr->icp = xics_system_init(machine,
DIV_ROUND_UP(max_cpus * smt, smp_threads),
XICS_IRQS_SPAPR, &error_fatal);
spapr->xics = xics_system_init(machine,
DIV_ROUND_UP(max_cpus * smt, smp_threads),
XICS_IRQS_SPAPR, &error_fatal);
if (smc->dr_lmb_enabled) {
spapr_validate_node_memory(machine, &error_fatal);

4
hw/ppc/spapr_cpu_core.c
View File

@ -42,7 +42,7 @@ static void spapr_cpu_destroy(PowerPCCPU *cpu)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
xics_cpu_destroy(spapr->icp, cpu);
xics_cpu_destroy(spapr->xics, cpu);
qemu_unregister_reset(spapr_cpu_reset, cpu);
}
@ -76,7 +76,7 @@ void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp)
}
}
xics_cpu_setup(spapr->icp, cpu);
xics_cpu_setup(spapr->xics, cpu);
qemu_register_reset(spapr_cpu_reset, cpu);
spapr_cpu_reset(cpu);

8
hw/ppc/spapr_events.c
View File

@ -386,7 +386,7 @@ static void spapr_powerdown_req(Notifier *n, void *opaque)
rtas_event_log_queue(RTAS_LOG_TYPE_EPOW, new_epow, true);
qemu_irq_pulse(xics_get_qirq(spapr->icp, spapr->check_exception_irq));
qemu_irq_pulse(xics_get_qirq(spapr->xics, spapr->check_exception_irq));
}
static void spapr_hotplug_set_signalled(uint32_t drc_index)
@ -468,7 +468,7 @@ static void spapr_hotplug_req_event(uint8_t hp_id, uint8_t hp_action,
rtas_event_log_queue(RTAS_LOG_TYPE_HOTPLUG, new_hp, true);
qemu_irq_pulse(xics_get_qirq(spapr->icp, spapr->check_exception_irq));
qemu_irq_pulse(xics_get_qirq(spapr->xics, spapr->check_exception_irq));
}
void spapr_hotplug_req_add_by_index(sPAPRDRConnector *drc)
@ -551,7 +551,7 @@ static void check_exception(PowerPCCPU *cpu, sPAPRMachineState *spapr,
* interrupts.
*/
if (rtas_event_log_contains(mask, true)) {
qemu_irq_pulse(xics_get_qirq(spapr->icp, spapr->check_exception_irq));
qemu_irq_pulse(xics_get_qirq(spapr->xics, spapr->check_exception_irq));
}
return;
@ -603,7 +603,7 @@ out_no_events:
void spapr_events_init(sPAPRMachineState *spapr)
{
QTAILQ_INIT(&spapr->pending_events);
spapr->check_exception_irq = xics_spapr_alloc(spapr->icp, 0, 0, false,
spapr->check_exception_irq = xics_spapr_alloc(spapr->xics, 0, 0, false,
&error_fatal);
spapr->epow_notifier.notify = spapr_powerdown_req;
qemu_register_powerdown_notifier(&spapr->epow_notifier);

11
hw/ppc/spapr_pci.c
View File

@ -322,7 +322,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
return;
}
xics_spapr_free(spapr->icp, msi->first_irq, msi->num);
xics_spapr_free(spapr->xics, msi->first_irq, msi->num);
if (msi_present(pdev)) {
spapr_msi_setmsg(pdev, 0, false, 0, 0);
}
@ -360,7 +360,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
}
/* Allocate MSIs */
irq = xics_spapr_alloc_block(spapr->icp, 0, req_num, false,
irq = xics_spapr_alloc_block(spapr->xics, 0, req_num, false,
ret_intr_type == RTAS_TYPE_MSI, &err);
if (err) {
error_reportf_err(err, "Can't allocate MSIs for device %x: ",
@ -371,7 +371,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
/* Release previous MSIs */
if (msi) {
xics_spapr_free(spapr->icp, msi->first_irq, msi->num);
xics_spapr_free(spapr->xics, msi->first_irq, msi->num);
g_hash_table_remove(phb->msi, &config_addr);
}
@ -733,7 +733,7 @@ static void spapr_msi_write(void *opaque, hwaddr addr,
trace_spapr_pci_msi_write(addr, data, irq);
qemu_irq_pulse(xics_get_qirq(spapr->icp, irq));
qemu_irq_pulse(xics_get_qirq(spapr->xics, irq));
}
static const MemoryRegionOps spapr_msi_ops = {
@ -1442,7 +1442,8 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
uint32_t irq;
Error *local_err = NULL;
irq = xics_spapr_alloc_block(spapr->icp, 0, 1, true, false, &local_err);
irq = xics_spapr_alloc_block(spapr->xics, 0, 1, true, false,
&local_err);
if (local_err) {
error_propagate(errp, local_err);
error_prepend(errp, "can't allocate LSIs: ");

2
hw/ppc/spapr_vio.c
View File

@ -463,7 +463,7 @@ static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
dev->qdev.id = id;
}
dev->irq = xics_spapr_alloc(spapr->icp, 0, dev->irq, false, &local_err);
dev->irq = xics_spapr_alloc(spapr->xics, 0, dev->irq, false, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;

2
include/hw/pci-host/spapr.h
View File

@ -93,7 +93,7 @@ static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq);
return xics_get_qirq(spapr->xics, phb->lsi_table[pin].irq);
}
PCIHostState *spapr_create_phb(sPAPRMachineState *spapr, int index);

2
include/hw/ppc/spapr.h
View File

@ -52,7 +52,7 @@ struct sPAPRMachineState {
struct VIOsPAPRBus *vio_bus;
QLIST_HEAD(, sPAPRPHBState) phbs;
struct sPAPRNVRAM *nvram;
XICSState *icp;
XICSState *xics;
DeviceState *rtc;
void *htab;

2
include/hw/ppc/spapr_vio.h
View File

@ -90,7 +90,7 @@ static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
return xics_get_qirq(spapr->icp, dev->irq);
return xics_get_qirq(spapr->xics, dev->irq);
}
static inline bool spapr_vio_dma_valid(VIOsPAPRDevice *dev, uint64_t taddr,

2
include/hw/ppc/xics.h
View File

@ -143,7 +143,7 @@ struct ICSState {
uint32_t offset;
qemu_irq *qirqs;
ICSIRQState *irqs;
XICSState *icp;
XICSState *xics;
};
static inline bool ics_valid_irq(ICSState *ics, uint32_t nr)

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