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@ -44,6 +44,7 @@ typedef struct PicState { |
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uint8_t rotate_on_auto_eoi; |
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uint8_t special_fully_nested_mode; |
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uint8_t init4; /* true if 4 byte init */ |
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uint8_t single_mode; /* true if slave pic is not initialized */ |
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uint8_t elcr; /* PIIX edge/trigger selection*/ |
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uint8_t elcr_mask; |
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PicState2 *pics_state; |
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@ -278,6 +279,7 @@ static void pic_reset(void *opaque) |
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s->rotate_on_auto_eoi = 0; |
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s->special_fully_nested_mode = 0; |
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s->init4 = 0; |
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s->single_mode = 0; |
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/* Note: ELCR is not reset */ |
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} |
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@ -298,8 +300,7 @@ static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
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s->pics_state->irq_request(s->pics_state->irq_request_opaque, 0); |
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s->init_state = 1; |
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s->init4 = val & 1; |
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if (val & 0x02) |
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hw_error("single mode not supported"); |
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s->single_mode = val & 2; |
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if (val & 0x08) |
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hw_error("level sensitive irq not supported"); |
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} else if (val & 0x08) { |
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@ -356,7 +357,7 @@ static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
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break; |
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case 1: |
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s->irq_base = val & 0xf8; |
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s->init_state = 2; |
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s->init_state = s->single_mode && s->init4 ? 3 : 2; |
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break; |
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case 2: |
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if (s->init4) { |
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@ -468,6 +469,7 @@ static void pic_save(QEMUFile *f, void *opaque) |
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qemu_put_8s(f, &s->rotate_on_auto_eoi); |
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qemu_put_8s(f, &s->special_fully_nested_mode); |
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qemu_put_8s(f, &s->init4); |
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qemu_put_8s(f, &s->single_mode); |
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qemu_put_8s(f, &s->elcr); |
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} |
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@ -492,6 +494,7 @@ static int pic_load(QEMUFile *f, void *opaque, int version_id) |
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qemu_get_8s(f, &s->rotate_on_auto_eoi); |
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qemu_get_8s(f, &s->special_fully_nested_mode); |
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qemu_get_8s(f, &s->init4); |
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qemu_get_8s(f, &s->single_mode); |
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qemu_get_8s(f, &s->elcr); |
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return 0; |
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} |
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