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@ -40,6 +40,7 @@ enum pl110_version |
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typedef struct { |
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SysBusDevice busdev; |
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MemoryRegion iomem; |
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DisplayState *ds; |
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int version; |
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@ -301,7 +302,8 @@ static void pl110_update(pl110_state *s) |
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/* TODO: Implement interrupts. */ |
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} |
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static uint32_t pl110_read(void *opaque, target_phys_addr_t offset) |
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static uint64_t pl110_read(void *opaque, target_phys_addr_t offset, |
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unsigned size) |
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{ |
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pl110_state *s = (pl110_state *)opaque; |
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@ -350,7 +352,7 @@ static uint32_t pl110_read(void *opaque, target_phys_addr_t offset) |
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} |
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static void pl110_write(void *opaque, target_phys_addr_t offset, |
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uint32_t val) |
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uint64_t val, unsigned size) |
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{ |
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pl110_state *s = (pl110_state *)opaque; |
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int n; |
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@ -416,16 +418,10 @@ static void pl110_write(void *opaque, target_phys_addr_t offset, |
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} |
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} |
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static CPUReadMemoryFunc * const pl110_readfn[] = { |
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pl110_read, |
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pl110_read, |
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pl110_read |
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}; |
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static CPUWriteMemoryFunc * const pl110_writefn[] = { |
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pl110_write, |
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pl110_write, |
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pl110_write |
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static const MemoryRegionOps pl110_ops = { |
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.read = pl110_read, |
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.write = pl110_write, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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}; |
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static void pl110_mux_ctrl_set(void *opaque, int line, int level) |
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@ -437,12 +433,9 @@ static void pl110_mux_ctrl_set(void *opaque, int line, int level) |
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static int pl110_init(SysBusDevice *dev) |
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{ |
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pl110_state *s = FROM_SYSBUS(pl110_state, dev); |
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int iomemtype; |
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iomemtype = cpu_register_io_memory(pl110_readfn, |
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pl110_writefn, s, |
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DEVICE_NATIVE_ENDIAN); |
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sysbus_init_mmio(dev, 0x1000, iomemtype); |
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memory_region_init_io(&s->iomem, &pl110_ops, s, "pl110", 0x1000); |
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sysbus_init_mmio_region(dev, &s->iomem); |
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sysbus_init_irq(dev, &s->irq); |
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qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1); |
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s->ds = graphic_console_init(pl110_update_display, |
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