|
|
|
@ -8271,8 +8271,7 @@ out: |
|
|
|
return pow2ceil(bar_size); |
|
|
|
} |
|
|
|
|
|
|
|
static bool nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset, |
|
|
|
Error **errp) |
|
|
|
static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset) |
|
|
|
{ |
|
|
|
uint16_t vf_dev_id = n->params.use_intel_id ? |
|
|
|
PCI_DEVICE_ID_INTEL_NVME : PCI_DEVICE_ID_REDHAT_NVME; |
|
|
|
@ -8281,17 +8280,12 @@ static bool nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset, |
|
|
|
le16_to_cpu(cap->vifrsm), |
|
|
|
NULL, NULL); |
|
|
|
|
|
|
|
if (!pcie_sriov_pf_init(pci_dev, offset, "nvme", vf_dev_id, |
|
|
|
n->params.sriov_max_vfs, n->params.sriov_max_vfs, |
|
|
|
NVME_VF_OFFSET, NVME_VF_STRIDE, |
|
|
|
errp)) { |
|
|
|
return false; |
|
|
|
} |
|
|
|
pcie_sriov_pf_init(pci_dev, offset, "nvme", vf_dev_id, |
|
|
|
n->params.sriov_max_vfs, n->params.sriov_max_vfs, |
|
|
|
NVME_VF_OFFSET, NVME_VF_STRIDE); |
|
|
|
|
|
|
|
pcie_sriov_pf_init_vf_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | |
|
|
|
PCI_BASE_ADDRESS_MEM_TYPE_64, bar_size); |
|
|
|
|
|
|
|
return true; |
|
|
|
} |
|
|
|
|
|
|
|
static int nvme_add_pm_capability(PCIDevice *pci_dev, uint8_t offset) |
|
|
|
@ -8416,12 +8410,6 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp) |
|
|
|
return false; |
|
|
|
} |
|
|
|
|
|
|
|
if (!pci_is_vf(pci_dev) && n->params.sriov_max_vfs && |
|
|
|
!nvme_init_sriov(n, pci_dev, 0x120, errp)) { |
|
|
|
msix_uninit(pci_dev, &n->bar0, &n->bar0); |
|
|
|
return false; |
|
|
|
} |
|
|
|
|
|
|
|
nvme_update_msixcap_ts(pci_dev, n->conf_msix_qsize); |
|
|
|
|
|
|
|
pcie_cap_deverr_init(pci_dev); |
|
|
|
@ -8451,6 +8439,10 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp) |
|
|
|
nvme_init_pmr(n, pci_dev); |
|
|
|
} |
|
|
|
|
|
|
|
if (!pci_is_vf(pci_dev) && n->params.sriov_max_vfs) { |
|
|
|
nvme_init_sriov(n, pci_dev, 0x120); |
|
|
|
} |
|
|
|
|
|
|
|
return true; |
|
|
|
} |
|
|
|
|
|
|
|
|