sysbus: Drop sysbus_from_qdev() cast macro

Replace by SYS_BUS_DEVICE() QOM cast macro using a scripted conversion. Avoids the old macro creeping into new code. Resolve a Coding Style warning in openpic code. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
13 years ago · 1356b98d3e
76 changed files with 214 additions and 215 deletions
--- a/hw/a15mpcore.c
+++ b/hw/a15mpcore.c
@ -46,7 +46,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
    qdev_prop_set_uint32(s->gic, "num-irq", s->num_irq);
    qdev_prop_set_uint32(s->gic, "revision", 2);
    qdev_init_nofail(s->gic);
-    busdev = sysbus_from_qdev(s->gic);
+    busdev = SYS_BUS_DEVICE(s->gic);

    /* Pass through outbound IRQ lines from the GIC */
    sysbus_pass_irq(dev, busdev);
--- a/hw/a9mpcore.c
+++ b/hw/a9mpcore.c
@ -112,7 +112,7 @@ static const MemoryRegionOps a9_scu_ops = {

 static void a9mp_priv_reset(DeviceState *dev)
 {
-    a9mp_priv_state *s = FROM_SYSBUS(a9mp_priv_state, sysbus_from_qdev(dev));
+    a9mp_priv_state *s = FROM_SYSBUS(a9mp_priv_state, SYS_BUS_DEVICE(dev));
    int i;
    s->scu_control = 0;
    for (i = 0; i < ARRAY_SIZE(s->old_timer_status); i++) {
@ -136,7 +136,7 @@ static int a9mp_priv_init(SysBusDevice *dev)
    qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu);
    qdev_prop_set_uint32(s->gic, "num-irq", s->num_irq);
    qdev_init_nofail(s->gic);
-    gicbusdev = sysbus_from_qdev(s->gic);
+    gicbusdev = SYS_BUS_DEVICE(s->gic);

    /* Pass through outbound IRQ lines from the GIC */
    sysbus_pass_irq(dev, gicbusdev);
@ -147,7 +147,7 @@ static int a9mp_priv_init(SysBusDevice *dev)
    s->mptimer = qdev_create(NULL, "arm_mptimer");
    qdev_prop_set_uint32(s->mptimer, "num-cpu", s->num_cpu);
    qdev_init_nofail(s->mptimer);
-    busdev = sysbus_from_qdev(s->mptimer);
+    busdev = SYS_BUS_DEVICE(s->mptimer);

    /* Memory map (addresses are offsets from PERIPHBASE):
     *  0x0000-0x00ff -- Snoop Control Unit
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@ -365,7 +365,7 @@ PCIBus *pci_apb_init(hwaddr special_base,
    /* Ultrasparc PBM main bus */
    dev = qdev_create(NULL, "pbm");
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    /* apb_config */
    sysbus_mmio_map(s, 0, special_base);
    /* PCI configuration space */
--- a/hw/arm11mpcore.c
+++ b/hw/arm11mpcore.c
@ -83,8 +83,8 @@ static void mpcore_priv_set_irq(void *opaque, int irq, int level)
 static void mpcore_priv_map_setup(mpcore_priv_state *s)
 {
    int i;
-    SysBusDevice *gicbusdev = sysbus_from_qdev(s->gic);
-    SysBusDevice *busdev = sysbus_from_qdev(s->mptimer);
+    SysBusDevice *gicbusdev = SYS_BUS_DEVICE(s->gic);
+    SysBusDevice *busdev = SYS_BUS_DEVICE(s->mptimer);
    memory_region_init(&s->container, "mpcode-priv-container", 0x2000);
    memory_region_init_io(&s->iomem, &mpcore_scu_ops, s, "mpcore-scu", 0x100);
    memory_region_add_subregion(&s->container, 0, &s->iomem);
@ -131,7 +131,7 @@ static int mpcore_priv_init(SysBusDevice *dev)
    qdev_init_nofail(s->gic);

    /* Pass through outbound IRQ lines from the GIC */
-    sysbus_pass_irq(dev, sysbus_from_qdev(s->gic));
+    sysbus_pass_irq(dev, SYS_BUS_DEVICE(s->gic));

    /* Pass through inbound GPIO lines to the GIC */
    qdev_init_gpio_in(&s->busdev.qdev, mpcore_priv_set_irq, s->num_irq - 32);
@ -190,7 +190,7 @@ static int realview_mpcore_init(SysBusDevice *dev)
    priv = qdev_create(NULL, "arm11mpcore_priv");
    qdev_prop_set_uint32(priv, "num-cpu", s->num_cpu);
    qdev_init_nofail(priv);
-    s->priv = sysbus_from_qdev(priv);
+    s->priv = SYS_BUS_DEVICE(priv);
    sysbus_pass_irq(dev, s->priv);
    for (i = 0; i < 32; i++) {
        s->cpuic[i] = qdev_get_gpio_in(priv, i);
--- a/hw/arm_gic_common.c
+++ b/hw/arm_gic_common.c
@ -123,7 +123,7 @@ static int arm_gic_common_init(SysBusDevice *dev)

 static void arm_gic_common_reset(DeviceState *dev)
 {
-    GICState *s = FROM_SYSBUS(GICState, sysbus_from_qdev(dev));
+    GICState *s = FROM_SYSBUS(GICState, SYS_BUS_DEVICE(dev));
    int i;
    memset(s->irq_state, 0, GIC_MAXIRQ * sizeof(gic_irq_state));
    for (i = 0 ; i < s->num_cpu; i++) {
--- a/hw/arm_mptimer.c
+++ b/hw/arm_mptimer.c
@ -238,7 +238,7 @@ static void timerblock_reset(timerblock *tb)
 static void arm_mptimer_reset(DeviceState *dev)
 {
    arm_mptimer_state *s =
-        FROM_SYSBUS(arm_mptimer_state, sysbus_from_qdev(dev));
+        FROM_SYSBUS(arm_mptimer_state, SYS_BUS_DEVICE(dev));
    int i;
    /* We reset every timer in the array, not just the ones we're using,
     * because vmsave will look at every array element.
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@ -75,7 +75,7 @@ static int board_id(arm_sysctl_state *s)

 static void arm_sysctl_reset(DeviceState *d)
 {
-    arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, sysbus_from_qdev(d));
+    arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, SYS_BUS_DEVICE(d));

    s->leds = 0;
    s->lockval = 0;
--- a/hw/armv7m.c
+++ b/hw/armv7m.c
@ -137,12 +137,12 @@ static void armv7m_bitband_init(void)
    dev = qdev_create(NULL, "ARM,bitband-memory");
    qdev_prop_set_uint32(dev, "base", 0x20000000);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x22000000);

    dev = qdev_create(NULL, "ARM,bitband-memory");
    qdev_prop_set_uint32(dev, "base", 0x40000000);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x42000000);
 }

 /* Board init.  */
@ -216,7 +216,7 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
    env->nvic = nvic;
    qdev_init_nofail(nvic);
    cpu_pic = arm_pic_init_cpu(cpu);
-    sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
+    sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
    for (i = 0; i < 64; i++) {
        pic[i] = qdev_get_gpio_in(nvic, i);
    }
--- a/hw/axis_dev88.c
+++ b/hw/axis_dev88.c
@ -300,7 +300,7 @@ void axisdev88_init(QEMUMachineInitArgs *args)
    /* FIXME: Is there a proper way to signal vectors to the CPU core?  */
    qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(s, 0, 0x3001c000);
    sysbus_connect_irq(s, 0, cpu_irq[0]);
    sysbus_connect_irq(s, 1, cpu_irq[1]);
--- a/hw/cadence_gem.c
+++ b/hw/cadence_gem.c
@ -959,7 +959,7 @@ static void gem_phy_reset(GemState *s)

 static void gem_reset(DeviceState *d)
 {
-    GemState *s = FROM_SYSBUS(GemState, sysbus_from_qdev(d));
+    GemState *s = FROM_SYSBUS(GemState, SYS_BUS_DEVICE(d));

    DB_PRINT("\n");

--- a/hw/empty_slot.c
+++ b/hw/empty_slot.c
@ -56,7 +56,7 @@ void empty_slot_init(hwaddr addr, uint64_t slot_size)
        EmptySlot *e;

        dev = qdev_create(NULL, "empty_slot");
-        s = sysbus_from_qdev(dev);
+        s = SYS_BUS_DEVICE(dev);
        e = FROM_SYSBUS(EmptySlot, s);
        e->size = slot_size;

--- a/hw/escc.c
+++ b/hw/escc.c
@ -700,7 +700,7 @@ MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB,
    qdev_prop_set_uint32(dev, "chnBtype", ser);
    qdev_prop_set_uint32(dev, "chnAtype", ser);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, irqB);
    sysbus_connect_irq(s, 1, irqA);
    if (base) {
@ -861,7 +861,7 @@ void slavio_serial_ms_kbd_init(hwaddr base, qemu_irq irq,
    qdev_prop_set_uint32(dev, "chnBtype", mouse);
    qdev_prop_set_uint32(dev, "chnAtype", kbd);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, irq);
    sysbus_connect_irq(s, 1, irq);
    sysbus_mmio_map(s, 0, base);
--- a/hw/esp.c
+++ b/hw/esp.c
@ -633,7 +633,7 @@ void esp_init(hwaddr espaddr, int it_shift,
    /* XXX for now until rc4030 has been changed to use DMA enable signal */
    esp->dma_enabled = 1;
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, irq);
    sysbus_mmio_map(s, 0, espaddr);
    *reset = qdev_get_gpio_in(dev, 0);
--- a/hw/etraxfs.h
+++ b/hw/etraxfs.h
@ -44,7 +44,7 @@ etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr,
    qdev_prop_set_ptr(dev, "dma_out", dma_out);
    qdev_prop_set_ptr(dev, "dma_in", dma_in);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
    return dev;
 }

--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@ -154,7 +154,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
        for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) {
            gate_irq[i][n] = qdev_get_gpio_in(dev, n);
        }
-        busdev = sysbus_from_qdev(dev);
+        busdev = SYS_BUS_DEVICE(dev);

        /* Connect IRQ Gate output to cpu_irq */
        sysbus_connect_irq(busdev, 0, cpu_irq[i]);
@ -164,7 +164,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
    dev = qdev_create(NULL, "a9mpcore_priv");
    qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR);
    for (n = 0; n < EXYNOS4210_NCPUS; n++) {
        sysbus_connect_irq(busdev, n, gate_irq[n][0]);
@ -180,7 +180,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
    dev = qdev_create(NULL, "exynos4210.gic");
    qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    /* Map CPU interface */
    sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_GIC_CPU_BASE_ADDR);
    /* Map Distributer interface */
@ -195,7 +195,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
    /* Internal Interrupt Combiner */
    dev = qdev_create(NULL, "exynos4210.combiner");
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
        sysbus_connect_irq(busdev, n, s->irqs.int_gic_irq[n]);
    }
@ -206,7 +206,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
    dev = qdev_create(NULL, "exynos4210.combiner");
    qdev_prop_set_uint32(dev, "external", 1);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
        sysbus_connect_irq(busdev, n, s->irqs.ext_gic_irq[n]);
    }
@ -285,7 +285,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
    /* Multi Core Timer */
    dev = qdev_create(NULL, "exynos4210.mct");
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    for (n = 0; n < 4; n++) {
        /* Connect global timer interrupts to Combiner gpio_in */
        sysbus_connect_irq(busdev, n,
@ -311,7 +311,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,

        dev = qdev_create(NULL, "exynos4210.i2c");
        qdev_init_nofail(dev);
-        busdev = sysbus_from_qdev(dev);
+        busdev = SYS_BUS_DEVICE(dev);
        sysbus_connect_irq(busdev, 0, i2c_irq);
        sysbus_mmio_map(busdev, 0, addr);
        s->i2c_if[n] = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
--- a/hw/exynos4210_gic.c
+++ b/hw/exynos4210_gic.c
@ -290,7 +290,7 @@ static int exynos4210_gic_init(SysBusDevice *dev)
    qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu);
    qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ);
    qdev_init_nofail(s->gic);
-    busdev = sysbus_from_qdev(s->gic);
+    busdev = SYS_BUS_DEVICE(s->gic);

    /* Pass through outbound IRQ lines from the GIC */
    sysbus_pass_irq(dev, busdev);
--- a/hw/exynos4210_uart.c
+++ b/hw/exynos4210_uart.c
@ -615,7 +615,7 @@ DeviceState *exynos4210_uart_create(hwaddr addr,
    qdev_prop_set_uint32(dev, "rx-size", fifo_size);
    qdev_prop_set_uint32(dev, "tx-size", fifo_size);

-    bus = sysbus_from_qdev(dev);
+    bus = SYS_BUS_DEVICE(dev);
    qdev_init_nofail(dev);
    if (addr != (hwaddr)-1) {
        sysbus_mmio_map(bus, 0, addr);
--- a/hw/exynos4_boards.c
+++ b/hw/exynos4_boards.c
@ -87,7 +87,7 @@ static void lan9215_init(uint32_t base, qemu_irq irq)
        qdev_set_nic_properties(dev, &nd_table[0]);
        qdev_prop_set_uint32(dev, "mode_16bit", 1);
        qdev_init_nofail(dev);
-        s = sysbus_from_qdev(dev);
+        s = SYS_BUS_DEVICE(dev);
        sysbus_mmio_map(s, 0, base);
        sysbus_connect_irq(s, 0, irq);
    }
--- a/hw/fw_cfg.c
+++ b/hw/fw_cfg.c
@ -489,7 +489,7 @@ FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
    qdev_prop_set_uint32(dev, "ctl_iobase", ctl_port);
    qdev_prop_set_uint32(dev, "data_iobase", data_port);
    qdev_init_nofail(dev);
-    d = sysbus_from_qdev(dev);
+    d = SYS_BUS_DEVICE(dev);

    s = DO_UPCAST(FWCfgState, busdev.qdev, dev);

--- a/hw/grlib.h
+++ b/hw/grlib.h
@ -61,7 +61,7 @@ DeviceState *grlib_irqmp_create(hwaddr   base,

    env->irq_manager = dev;

-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    *cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq,
                                   dev,
@ -91,10 +91,10 @@ DeviceState *grlib_gptimer_create(hwaddr  base,
        return NULL;
    }

-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    for (i = 0; i < nr_timers; i++) {
-        sysbus_connect_irq(sysbus_from_qdev(dev), i, cpu_irqs[base_irq + i]);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, cpu_irqs[base_irq + i]);
    }

    return dev;
@ -116,9 +116,9 @@ DeviceState *grlib_apbuart_create(hwaddr  base,
        return NULL;
    }

-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

    return dev;
 }
--- a/hw/grlib_irqmp.c
+++ b/hw/grlib_irqmp.c
@ -109,7 +109,7 @@ void grlib_irqmp_ack(DeviceState *dev, int intno)

    assert(dev != NULL);

-    sdev = sysbus_from_qdev(dev);
+    sdev = SYS_BUS_DEVICE(dev);
    assert(sdev != NULL);

    irqmp = FROM_SYSBUS(typeof(*irqmp), sdev);
@ -138,7 +138,7 @@ void grlib_irqmp_set_irq(void *opaque, int irq, int level)

    assert(opaque != NULL);

-    irqmp = FROM_SYSBUS(typeof(*irqmp), sysbus_from_qdev(opaque));
+    irqmp = FROM_SYSBUS(typeof(*irqmp), SYS_BUS_DEVICE(opaque));
    assert(irqmp != NULL);

    s = irqmp->state;
--- a/hw/highbank.c
+++ b/hw/highbank.c
@ -136,7 +136,7 @@ static VMStateDescription vmstate_highbank_regs = {

 static void highbank_regs_reset(DeviceState *dev)
 {
-    SysBusDevice *sys_dev = sysbus_from_qdev(dev);
+    SysBusDevice *sys_dev = SYS_BUS_DEVICE(dev);
    HighbankRegsState *s = FROM_SYSBUS(HighbankRegsState, sys_dev);

    s->regs[0x40] = 0x05F20121;
@ -251,7 +251,7 @@ static void highbank_init(QEMUMachineInitArgs *args)
    qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
    qdev_prop_set_uint32(dev, "num-irq", NIRQ_GIC);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, GIC_BASE_ADDR);
    for (n = 0; n < smp_cpus; n++) {
        sysbus_connect_irq(busdev, n, cpu_irq[n]);
@ -263,21 +263,21 @@ static void highbank_init(QEMUMachineInitArgs *args)

    dev = qdev_create(NULL, "l2x0");
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, 0xfff12000);

    dev = qdev_create(NULL, "sp804");
    qdev_prop_set_uint32(dev, "freq0", 150000000);
    qdev_prop_set_uint32(dev, "freq1", 150000000);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, 0xfff34000);
    sysbus_connect_irq(busdev, 0, pic[18]);
    sysbus_create_simple("pl011", 0xfff36000, pic[20]);

    dev = qdev_create(NULL, "highbank-regs");
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, 0xfff3c000);

    sysbus_create_simple("pl061", 0xfff30000, pic[14]);
@ -294,19 +294,19 @@ static void highbank_init(QEMUMachineInitArgs *args)
        dev = qdev_create(NULL, "xgmac");
        qdev_set_nic_properties(dev, &nd_table[0]);
        qdev_init_nofail(dev);
-        sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0xfff50000);
-        sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[77]);
-        sysbus_connect_irq(sysbus_from_qdev(dev), 1, pic[78]);
-        sysbus_connect_irq(sysbus_from_qdev(dev), 2, pic[79]);
+        sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff50000);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[77]);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[78]);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, pic[79]);

        qemu_check_nic_model(&nd_table[1], "xgmac");
        dev = qdev_create(NULL, "xgmac");
        qdev_set_nic_properties(dev, &nd_table[1]);
        qdev_init_nofail(dev);
-        sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0xfff51000);
-        sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[80]);
-        sysbus_connect_irq(sysbus_from_qdev(dev), 1, pic[81]);
-        sysbus_connect_irq(sysbus_from_qdev(dev), 2, pic[82]);
+        sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff51000);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[80]);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[81]);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, pic[82]);
    }

    highbank_binfo.ram_size = ram_size;
--- a/hw/hpet.c
+++ b/hw/hpet.c
@ -634,7 +634,7 @@ static const MemoryRegionOps hpet_ram_ops = {

 static void hpet_reset(DeviceState *d)
 {
-    HPETState *s = FROM_SYSBUS(HPETState, sysbus_from_qdev(d));
+    HPETState *s = FROM_SYSBUS(HPETState, SYS_BUS_DEVICE(d));
    int i;

    for (i = 0; i < s->num_timers; i++) {
@ -657,7 +657,7 @@ static void hpet_reset(DeviceState *d)
    s->hpet_offset = 0ULL;
    s->config = 0ULL;
    hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability;
-    hpet_cfg.hpet[s->hpet_id].address = sysbus_from_qdev(d)->mmio[0].addr;
+    hpet_cfg.hpet[s->hpet_id].address = SYS_BUS_DEVICE(d)->mmio[0].addr;

    /* to document that the RTC lowers its output on reset as well */
    s->rtc_irq_level = 0;
--- a/hw/imx_serial.c
+++ b/hw/imx_serial.c
@ -425,7 +425,7 @@ void imx_serial_create(int uart, const hwaddr addr, qemu_irq irq)
    }

    qdev_prop_set_chr(dev, "chardev", chr);
-    bus = sysbus_from_qdev(dev);
+    bus = SYS_BUS_DEVICE(dev);
    qdev_init_nofail(dev);
    if (addr != (hwaddr)-1) {
        sysbus_mmio_map(bus, 0, addr);
--- a/hw/lan9118.c
+++ b/hw/lan9118.c
@ -401,7 +401,7 @@ static void phy_reset(lan9118_state *s)

 static void lan9118_reset(DeviceState *d)
 {
-    lan9118_state *s = FROM_SYSBUS(lan9118_state, sysbus_from_qdev(d));
+    lan9118_state *s = FROM_SYSBUS(lan9118_state, SYS_BUS_DEVICE(d));
    s->irq_cfg &= (IRQ_TYPE | IRQ_POL);
    s->int_sts = 0;
    s->int_en = 0;
@ -1391,7 +1391,7 @@ void lan9118_init(NICInfo *nd, uint32_t base, qemu_irq irq)
    dev = qdev_create(NULL, "lan9118");
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(s, 0, base);
    sysbus_connect_irq(s, 0, irq);
 }
--- a/hw/lm32.h
+++ b/hw/lm32.h
@ -11,7 +11,7 @@ static inline DeviceState *lm32_pic_init(qemu_irq cpu_irq)

    dev = qdev_create(NULL, "lm32-pic");
    qdev_init_nofail(dev);
-    d = sysbus_from_qdev(dev);
+    d = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(d, 0, cpu_irq);

    return dev;
--- a/hw/m48t59.c
+++ b/hw/m48t59.c
@ -646,7 +646,7 @@ M48t59State *m48t59_init(qemu_irq IRQ, hwaddr mem_base,
    qdev_prop_set_uint32(dev, "size", size);
    qdev_prop_set_uint32(dev, "io_base", io_base);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    d = FROM_SYSBUS(M48t59SysBusState, s);
    state = &d->state;
    sysbus_connect_irq(s, 0, IRQ);
--- a/hw/marvell_88w8618_audio.c
+++ b/hw/marvell_88w8618_audio.c
@ -222,7 +222,7 @@ static void mv88w8618_audio_write(void *opaque, hwaddr offset,
 static void mv88w8618_audio_reset(DeviceState *d)
 {
    mv88w8618_audio_state *s = FROM_SYSBUS(mv88w8618_audio_state,
-                                           sysbus_from_qdev(d));
+                                           SYS_BUS_DEVICE(d));

    s->playback_mode = 0;
    s->status = 0;
--- a/hw/milkymist-hw.h
+++ b/hw/milkymist-hw.h
@ -12,8 +12,8 @@ static inline DeviceState *milkymist_uart_create(hwaddr base,

    dev = qdev_create(NULL, "milkymist-uart");
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

    return dev;
 }
@ -24,7 +24,7 @@ static inline DeviceState *milkymist_hpdmc_create(hwaddr base)

    dev = qdev_create(NULL, "milkymist-hpdmc");
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    return dev;
 }
@ -35,7 +35,7 @@ static inline DeviceState *milkymist_memcard_create(hwaddr base)

    dev = qdev_create(NULL, "milkymist-memcard");
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    return dev;
 }
@ -49,7 +49,7 @@ static inline DeviceState *milkymist_vgafb_create(hwaddr base,
    qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
    qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    return dev;
 }
@ -67,10 +67,10 @@ static inline DeviceState *milkymist_sysctl_create(hwaddr base,
    qdev_prop_set_uint32(dev, "capabilities", capabilities);
    qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, gpio_irq);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 1, timer0_irq);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 2, timer1_irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq);

    return dev;
 }
@ -82,8 +82,8 @@ static inline DeviceState *milkymist_pfpu_create(hwaddr base,

    dev = qdev_create(NULL, "milkymist-pfpu");
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
    return dev;
 }

@ -144,8 +144,8 @@ static inline DeviceState *milkymist_tmu2_create(hwaddr base,

    dev = qdev_create(NULL, "milkymist-tmu2");
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

    return dev;
 #else
@ -161,11 +161,11 @@ static inline DeviceState *milkymist_ac97_create(hwaddr base,

    dev = qdev_create(NULL, "milkymist-ac97");
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, crrequest_irq);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 1, crreply_irq);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 2, dmar_irq);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 3, dmaw_irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq);

    return dev;
 }
@ -179,9 +179,9 @@ static inline DeviceState *milkymist_minimac_create(hwaddr base,
    dev = qdev_create(NULL, "milkymist-minimac");
    qdev_set_nic_properties(dev, &nd_table[0]);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);

    return dev;
 }
@ -196,9 +196,9 @@ static inline DeviceState *milkymist_minimac2_create(hwaddr base,
    qdev_prop_set_taddr(dev, "buffers_base", buffers_base);
    qdev_set_nic_properties(dev, &nd_table[0]);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);

    return dev;
 }
@ -215,8 +215,8 @@ static inline DeviceState *milkymist_softusb_create(hwaddr base,
    qdev_prop_set_uint32(dev, "dmem_base", dmem_base);
    qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

    return dev;
 }
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@ -209,7 +209,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
    case JAZZ_MAGNUM:
        dev = qdev_create(NULL, "sysbus-g364");
        qdev_init_nofail(dev);
-        sysbus = sysbus_from_qdev(dev);
+        sysbus = SYS_BUS_DEVICE(dev);
        sysbus_mmio_map(sysbus, 0, 0x60080000);
        sysbus_mmio_map(sysbus, 1, 0x40000000);
        sysbus_connect_irq(sysbus, 0, rc4030[3]);
@ -295,7 +295,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
    /* NVRAM */
    dev = qdev_create(NULL, "ds1225y");
    qdev_init_nofail(dev);
-    sysbus = sysbus_from_qdev(dev);
+    sysbus = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(sysbus, 0, 0x80009000);

    /* LED indicator */
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@ -123,7 +123,7 @@ static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);

-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, irq);
    memory_region_add_subregion(get_system_io(),
                                base,
--- a/hw/mpc8544_guts.c
+++ b/hw/mpc8544_guts.c
@ -112,7 +112,7 @@ static int mpc8544_guts_initfn(SysBusDevice *dev)
 {
    GutsState *s;

-    s = FROM_SYSBUS(GutsState, sysbus_from_qdev(dev));
+    s = FROM_SYSBUS(GutsState, SYS_BUS_DEVICE(dev));

    memory_region_init_io(&s->iomem, &mpc8544_guts_ops, s,
                          "mpc6544.guts", MPC8544_GUTS_MMIO_SIZE);
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@ -716,7 +716,7 @@ static void mv88w8618_pic_write(void *opaque, hwaddr offset,
 static void mv88w8618_pic_reset(DeviceState *d)
 {
    mv88w8618_pic_state *s = FROM_SYSBUS(mv88w8618_pic_state,
-                                         sysbus_from_qdev(d));
+                                         SYS_BUS_DEVICE(d));

    s->level = 0;
    s->enabled = 0;
@ -873,7 +873,7 @@ static void mv88w8618_pit_write(void *opaque, hwaddr offset,
 static void mv88w8618_pit_reset(DeviceState *d)
 {
    mv88w8618_pit_state *s = FROM_SYSBUS(mv88w8618_pit_state,
-                                         sysbus_from_qdev(d));
+                                         SYS_BUS_DEVICE(d));
    int i;

    for (i = 0; i < 4; i++) {
@ -1288,7 +1288,7 @@ static const MemoryRegionOps musicpal_gpio_ops = {
 static void musicpal_gpio_reset(DeviceState *d)
 {
    musicpal_gpio_state *s = FROM_SYSBUS(musicpal_gpio_state,
-                                         sysbus_from_qdev(d));
+                                         SYS_BUS_DEVICE(d));

    s->lcd_brightness = 0;
    s->out_state = 0;
@ -1607,12 +1607,12 @@ static void musicpal_init(QEMUMachineInitArgs *args)
    dev = qdev_create(NULL, "mv88w8618_eth");
    qdev_set_nic_properties(dev, &nd_table[0]);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, MP_ETH_BASE);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[MP_ETH_IRQ]);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[MP_ETH_IRQ]);

    sysbus_create_simple("mv88w8618_wlan", MP_WLAN_BASE, NULL);

-    musicpal_misc_init(sysbus_from_qdev(dev));
+    musicpal_misc_init(SYS_BUS_DEVICE(dev));

    dev = sysbus_create_simple("musicpal_gpio", MP_GPIO_BASE, pic[MP_GPIO_IRQ]);
    i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL);
@ -1641,7 +1641,7 @@ static void musicpal_init(QEMUMachineInitArgs *args)

    wm8750_dev = i2c_create_slave(i2c, "wm8750", MP_WM_ADDR);
    dev = qdev_create(NULL, "mv88w8618_audio");
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    qdev_prop_set_ptr(dev, "wm8750", wm8750_dev);
    qdev_init_nofail(dev);
    sysbus_mmio_map(s, 0, MP_AUDIO_BASE);
--- a/hw/nand.c
+++ b/hw/nand.c
@ -224,7 +224,7 @@ static const struct {

 static void nand_reset(DeviceState *dev)
 {
-    NANDFlashState *s = FROM_SYSBUS(NANDFlashState, sysbus_from_qdev(dev));
+    NANDFlashState *s = FROM_SYSBUS(NANDFlashState, SYS_BUS_DEVICE(dev));
    s->cmd = NAND_CMD_READ0;
    s->addr = 0;
    s->addrlen = 0;
--- a/hw/nseries.c
+++ b/hw/nseries.c
@ -178,10 +178,10 @@ static void n8x0_nand_setup(struct n800_s *s)
        qdev_prop_set_drive_nofail(s->nand, "drive", dinfo->bdrv);
    }
    qdev_init_nofail(s->nand);
-    sysbus_connect_irq(sysbus_from_qdev(s->nand), 0,
+    sysbus_connect_irq(SYS_BUS_DEVICE(s->nand), 0,
                       qdev_get_gpio_in(s->mpu->gpio, N8X0_ONENAND_GPIO));
    omap_gpmc_attach(s->mpu->gpmc, N8X0_ONENAND_CS,
-                     sysbus_mmio_get_region(sysbus_from_qdev(s->nand), 0));
+                     sysbus_mmio_get_region(SYS_BUS_DEVICE(s->nand), 0));
    otp_region = onenand_raw_otp(s->nand);

    memcpy(otp_region + 0x000, n8x0_cal_wlan_mac, sizeof(n8x0_cal_wlan_mac));
@ -783,7 +783,7 @@ static void n8x0_usb_setup(struct n800_s *s)
 {
    SysBusDevice *dev;
    s->usb = qdev_create(NULL, "tusb6010");
-    dev = sysbus_from_qdev(s->usb);
+    dev = SYS_BUS_DEVICE(s->usb);
    qdev_init_nofail(s->usb);
    sysbus_connect_irq(dev, 0,
                       qdev_get_gpio_in(s->mpu->gpio, N8X0_TUSB_INT_GPIO));
--- a/hw/omap1.c
+++ b/hw/omap1.c
@ -3859,7 +3859,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
    qdev_prop_set_uint32(s->ih[0], "size", 0x100);
    qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck"));
    qdev_init_nofail(s->ih[0]);
-    busdev = sysbus_from_qdev(s->ih[0]);
+    busdev = SYS_BUS_DEVICE(s->ih[0]);
    sysbus_connect_irq(busdev, 0, cpu_irq[ARM_PIC_CPU_IRQ]);
    sysbus_connect_irq(busdev, 1, cpu_irq[ARM_PIC_CPU_FIQ]);
    sysbus_mmio_map(busdev, 0, 0xfffecb00);
@ -3867,7 +3867,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
    qdev_prop_set_uint32(s->ih[1], "size", 0x800);
    qdev_prop_set_ptr(s->ih[1], "clk", omap_findclk(s, "arminth_ck"));
    qdev_init_nofail(s->ih[1]);
-    busdev = sysbus_from_qdev(s->ih[1]);
+    busdev = SYS_BUS_DEVICE(s->ih[1]);
    sysbus_connect_irq(busdev, 0,
                       qdev_get_gpio_in(s->ih[0], OMAP_INT_15XX_IH2_IRQ));
    /* The second interrupt controller's FIQ output is not wired up */
@ -3980,9 +3980,9 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
    qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model);
    qdev_prop_set_ptr(s->gpio, "clk", omap_findclk(s, "arm_gpio_ck"));
    qdev_init_nofail(s->gpio);
-    sysbus_connect_irq(sysbus_from_qdev(s->gpio), 0,
+    sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0,
                       qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1));
-    sysbus_mmio_map(sysbus_from_qdev(s->gpio), 0, 0xfffce000);
+    sysbus_mmio_map(SYS_BUS_DEVICE(s->gpio), 0, 0xfffce000);

    s->microwire = omap_uwire_init(system_memory, 0xfffb3000,
                                   qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireTX),
@ -3998,7 +3998,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
    qdev_prop_set_uint8(s->i2c[0], "revision", 0x11);
    qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "mpuper_ck"));
    qdev_init_nofail(s->i2c[0]);
-    busdev = sysbus_from_qdev(s->i2c[0]);
+    busdev = SYS_BUS_DEVICE(s->i2c[0]);
    sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C));
    sysbus_connect_irq(busdev, 1, s->drq[OMAP_DMA_I2C_TX]);
    sysbus_connect_irq(busdev, 2, s->drq[OMAP_DMA_I2C_RX]);
--- a/hw/omap2.c
+++ b/hw/omap2.c
@ -2283,7 +2283,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
    qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk"));
    qdev_prop_set_ptr(s->ih[0], "iclk", omap_findclk(s, "mpu_intc_iclk"));
    qdev_init_nofail(s->ih[0]);
-    busdev = sysbus_from_qdev(s->ih[0]);
+    busdev = SYS_BUS_DEVICE(s->ih[0]);
    sysbus_connect_irq(busdev, 0, cpu_irq[ARM_PIC_CPU_IRQ]);
    sysbus_connect_irq(busdev, 1, cpu_irq[ARM_PIC_CPU_FIQ]);
    sysbus_mmio_map(busdev, 0, 0x480fe000);
@ -2398,7 +2398,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
    qdev_prop_set_ptr(s->i2c[0], "iclk", omap_findclk(s, "i2c1.iclk"));
    qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "i2c1.fclk"));
    qdev_init_nofail(s->i2c[0]);
-    busdev = sysbus_from_qdev(s->i2c[0]);
+    busdev = SYS_BUS_DEVICE(s->i2c[0]);
    sysbus_connect_irq(busdev, 0,
                       qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C1_IRQ));
    sysbus_connect_irq(busdev, 1, s->drq[OMAP24XX_DMA_I2C1_TX]);
@ -2410,7 +2410,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
    qdev_prop_set_ptr(s->i2c[1], "iclk", omap_findclk(s, "i2c2.iclk"));
    qdev_prop_set_ptr(s->i2c[1], "fclk", omap_findclk(s, "i2c2.fclk"));
    qdev_init_nofail(s->i2c[1]);
-    busdev = sysbus_from_qdev(s->i2c[1]);
+    busdev = SYS_BUS_DEVICE(s->i2c[1]);
    sysbus_connect_irq(busdev, 0,
                       qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C2_IRQ));
    sysbus_connect_irq(busdev, 1, s->drq[OMAP24XX_DMA_I2C2_TX]);
@ -2428,7 +2428,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
        qdev_prop_set_ptr(s->gpio, "fclk4", omap_findclk(s, "gpio5_dbclk"));
    }
    qdev_init_nofail(s->gpio);
-    busdev = sysbus_from_qdev(s->gpio);
+    busdev = SYS_BUS_DEVICE(s->gpio);
    sysbus_connect_irq(busdev, 0,
                       qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_GPIO_BANK1));
    sysbus_connect_irq(busdev, 3,
--- a/hw/omap_gpio.c
+++ b/hw/omap_gpio.c
@ -588,7 +588,7 @@ static const MemoryRegionOps omap2_gpio_module_ops = {
 static void omap_gpif_reset(DeviceState *dev)
 {
    struct omap_gpif_s *s = FROM_SYSBUS(struct omap_gpif_s,
-                    sysbus_from_qdev(dev));
+                    SYS_BUS_DEVICE(dev));
    omap_gpio_reset(&s->omap1);
 }

@ -596,7 +596,7 @@ static void omap2_gpif_reset(DeviceState *dev)
 {
    int i;
    struct omap2_gpif_s *s = FROM_SYSBUS(struct omap2_gpif_s,
-                    sysbus_from_qdev(dev));
+                    SYS_BUS_DEVICE(dev));
    for (i = 0; i < s->modulecount; i++) {
        omap2_gpio_module_reset(&s->modules[i]);
    }
--- a/hw/omap_i2c.c
+++ b/hw/omap_i2c.c
@ -131,7 +131,7 @@ static void omap_i2c_fifo_run(OMAPI2CState *s)
 static void omap_i2c_reset(DeviceState *dev)
 {
    OMAPI2CState *s = FROM_SYSBUS(OMAPI2CState,
-                                  sysbus_from_qdev(dev));
+                                  SYS_BUS_DEVICE(dev));
    s->mask = 0;
    s->stat = 0;
    s->dma = 0;
@ -485,7 +485,7 @@ static void omap_i2c_register_types(void)

 i2c_bus *omap_i2c_bus(DeviceState *omap_i2c)
 {
-    OMAPI2CState *s = FROM_SYSBUS(OMAPI2CState, sysbus_from_qdev(omap_i2c));
+    OMAPI2CState *s = FROM_SYSBUS(OMAPI2CState, SYS_BUS_DEVICE(omap_i2c));
    return s->bus;
 }

--- a/hw/omap_intc.c
+++ b/hw/omap_intc.c
@ -329,7 +329,7 @@ static const MemoryRegionOps omap_inth_mem_ops = {
 static void omap_inth_reset(DeviceState *dev)
 {
    struct omap_intr_handler_s *s = FROM_SYSBUS(struct omap_intr_handler_s,
-                                                sysbus_from_qdev(dev));
+                                                SYS_BUS_DEVICE(dev));
    int i;

    for (i = 0; i < s->nbanks; ++i){
--- a/hw/onenand.c
+++ b/hw/onenand.c
@ -224,7 +224,7 @@ static void onenand_reset(OneNANDState *s, int cold)

 static void onenand_system_reset(DeviceState *dev)
 {
-    onenand_reset(FROM_SYSBUS(OneNANDState, sysbus_from_qdev(dev)), 1);
+    onenand_reset(FROM_SYSBUS(OneNANDState, SYS_BUS_DEVICE(dev)), 1);
 }

 static inline int onenand_load_main(OneNANDState *s, int sec, int secn,
@ -835,7 +835,7 @@ static void onenand_register_types(void)

 void *onenand_raw_otp(DeviceState *onenand_device)
 {
-    return FROM_SYSBUS(OneNANDState, sysbus_from_qdev(onenand_device))->otp;
+    return FROM_SYSBUS(OneNANDState, SYS_BUS_DEVICE(onenand_device))->otp;
 }

 type_init(onenand_register_types)
--- a/hw/openpic.c
+++ b/hw/openpic.c
@ -506,7 +506,7 @@ static void openpic_set_irq(void *opaque, int n_IRQ, int level)

 static void openpic_reset(DeviceState *d)
 {
-    OpenPICState *opp = FROM_SYSBUS(typeof (*opp), sysbus_from_qdev(d));
+    OpenPICState *opp = FROM_SYSBUS(typeof(*opp), SYS_BUS_DEVICE(d));
    int i;

    opp->gcr = GCR_RESET;
--- a/hw/openrisc_sim.c
+++ b/hw/openrisc_sim.c
@ -50,7 +50,7 @@ static void openrisc_sim_net_init(MemoryRegion *address_space,
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);

-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, irq);
    memory_region_add_subregion(address_space, base,
                                sysbus_mmio_get_region(s, 0));
--- a/hw/pc.c
+++ b/hw/pc.c
@ -1019,7 +1019,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,

        if (hpet) {
            for (i = 0; i < GSI_NUM_PINS; i++) {
-                sysbus_connect_irq(sysbus_from_qdev(hpet), i, gsi[i]);
+                sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
            }
            pit_isa_irq = -1;
            pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT);
@ -1122,7 +1122,7 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name)
                                  "ioapic", OBJECT(dev), NULL);
    }
    qdev_init_nofail(dev);
-    d = sysbus_from_qdev(dev);
+    d = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(d, 0, 0xfec00000);

    for (i = 0; i < IOAPIC_NUM_PINS; i++) {
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@ -147,7 +147,7 @@ petalogix_ml605_init(QEMUMachineInitArgs *args)
        dev = qdev_create(NULL, "xlnx.xps-spi");
        qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES);
        qdev_init_nofail(dev);
-        busdev = sysbus_from_qdev(dev);
+        busdev = SYS_BUS_DEVICE(dev);
        sysbus_mmio_map(busdev, 0, 0x40a00000);
        sysbus_connect_irq(busdev, 0, irq[4]);

--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@ -729,7 +729,7 @@ pflash_t *pflash_cfi01_register(hwaddr base,
                                uint16_t id2, uint16_t id3, int be)
 {
    DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
-    SysBusDevice *busdev = sysbus_from_qdev(dev);
+    SysBusDevice *busdev = SYS_BUS_DEVICE(dev);
    pflash_t *pfl = (pflash_t *)object_dynamic_cast(OBJECT(dev),
                                                    "cfi.pflash01");

--- a/hw/pflash_cfi02.c
+++ b/hw/pflash_cfi02.c
@ -760,7 +760,7 @@ pflash_t *pflash_cfi02_register(hwaddr base,
                                int be)
 {
    DeviceState *dev = qdev_create(NULL, "cfi.pflash02");
-    SysBusDevice *busdev = sysbus_from_qdev(dev);
+    SysBusDevice *busdev = SYS_BUS_DEVICE(dev);
    pflash_t *pfl = (pflash_t *)object_dynamic_cast(OBJECT(dev),
                                                    "cfi.pflash02");

--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@ -547,7 +547,7 @@ void ppce500_init(PPCE500Params *params)
    qdev_prop_set_uint32(dev, "nb_cpus", smp_cpus);
    qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_FSL_MPIC_20);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    k = 0;
    for (i = 0; i < smp_cpus; i++) {
@ -599,7 +599,7 @@ void ppce500_init(PPCE500Params *params)
    if (!pci_bus)
        printf("couldn't create PCI controller!\n");

-    sysbus_mmio_map(sysbus_from_qdev(dev), 1, MPC8544_PCI_IO);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, MPC8544_PCI_IO);

    if (pci_bus) {
        /* Register network interfaces. */
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@ -329,7 +329,7 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
    dev = qdev_create(NULL, "openpic");
    qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_RAVEN);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    pic_mem = s->mmio[0].memory;
    k = 0;
    for (i = 0; i < smp_cpus; i++) {
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@ -196,7 +196,7 @@ static int ppce500_spin_initfn(SysBusDevice *dev)
 {
    SpinState *s;

-    s = FROM_SYSBUS(SpinState, sysbus_from_qdev(dev));
+    s = FROM_SYSBUS(SpinState, SYS_BUS_DEVICE(dev));

    memory_region_init_io(&s->iomem, &spin_rw_ops, s, "e500 spin pv device",
                          sizeof(SpinInfo) * MAX_CPUS);
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@ -1456,7 +1456,7 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base,
    SysBusDevice *i2c_dev;
    PXA2xxI2CState *s;

-    i2c_dev = sysbus_from_qdev(qdev_create(NULL, "pxa2xx_i2c"));
+    i2c_dev = SYS_BUS_DEVICE(qdev_create(NULL, "pxa2xx_i2c"));
    qdev_prop_set_uint32(&i2c_dev->qdev, "size", region_size + 1);
    qdev_prop_set_uint32(&i2c_dev->qdev, "offset", base & region_size);

--- a/hw/pxa2xx_dma.c
+++ b/hw/pxa2xx_dma.c
@ -481,8 +481,8 @@ DeviceState *pxa27x_dma_init(hwaddr base, qemu_irq irq)
    qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS);
    qdev_init_nofail(dev);

-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

    return dev;
 }
@ -495,8 +495,8 @@ DeviceState *pxa255_dma_init(hwaddr base, qemu_irq irq)
    qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS);
    qdev_init_nofail(dev);

-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

    return dev;
 }
--- a/hw/pxa2xx_gpio.c
+++ b/hw/pxa2xx_gpio.c
@ -260,12 +260,12 @@ DeviceState *pxa2xx_gpio_init(hwaddr base,
    qdev_prop_set_int32(dev, "ncpu", cs->cpu_index);
    qdev_init_nofail(dev);

-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0,
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
                    qdev_get_gpio_in(pic, PXA2XX_PIC_GPIO_0));
-    sysbus_connect_irq(sysbus_from_qdev(dev), 1,
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1,
                    qdev_get_gpio_in(pic, PXA2XX_PIC_GPIO_1));
-    sysbus_connect_irq(sysbus_from_qdev(dev), 2,
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2,
                    qdev_get_gpio_in(pic, PXA2XX_PIC_GPIO_X));

    return dev;
@ -297,7 +297,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev)
 */
 void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler)
 {
-    PXA2xxGPIOInfo *s = FROM_SYSBUS(PXA2xxGPIOInfo, sysbus_from_qdev(dev));
+    PXA2xxGPIOInfo *s = FROM_SYSBUS(PXA2xxGPIOInfo, SYS_BUS_DEVICE(dev));
    s->read_notify = handler;
 }

--- a/hw/pxa2xx_pic.c
+++ b/hw/pxa2xx_pic.c
@ -261,7 +261,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
 {
    CPUARMState *env = &cpu->env;
    DeviceState *dev = qdev_create(NULL, "pxa2xx_pic");
-    PXA2xxPICState *s = FROM_SYSBUS(PXA2xxPICState, sysbus_from_qdev(dev));
+    PXA2xxPICState *s = FROM_SYSBUS(PXA2xxPICState, SYS_BUS_DEVICE(dev));

    s->cpu = cpu;

@ -279,8 +279,8 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
    /* Enable IC memory-mapped registers access.  */
    memory_region_init_io(&s->iomem, &pxa2xx_pic_ops, s,
                          "pxa2xx-pic", 0x00100000);
-    sysbus_init_mmio(sysbus_from_qdev(dev), &s->iomem);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    /* Enable IC coprocessor access.  */
    define_arm_cp_regs_with_opaque(arm_env_get_cpu(env), pxa_pic_cp_reginfo, s);
--- a/hw/r2d.c
+++ b/hw/r2d.c
@ -262,7 +262,7 @@ static void r2d_init(QEMUMachineInitArgs *args)
    irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s));

    dev = qdev_create(NULL, "sh_pci");
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    qdev_init_nofail(dev);
    sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000));
    sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000));
--- a/hw/realview.c
+++ b/hw/realview.c
@ -140,14 +140,14 @@ static void realview_init(QEMUMachineInitArgs *args,
    qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
    qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
    qdev_init_nofail(sysctl);
-    sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, 0x10000000);
+    sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);

    if (is_mpcore) {
        hwaddr periphbase;
        dev = qdev_create(NULL, is_pb ? "a9mpcore_priv": "realview_mpcore");
        qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
        qdev_init_nofail(dev);
-        busdev = sysbus_from_qdev(dev);
+        busdev = SYS_BUS_DEVICE(dev);
        if (is_pb) {
            periphbase = 0x1f000000;
        } else {
@ -172,8 +172,8 @@ static void realview_init(QEMUMachineInitArgs *args,
    pl041 = qdev_create(NULL, "pl041");
    qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
    qdev_init_nofail(pl041);
-    sysbus_mmio_map(sysbus_from_qdev(pl041), 0, 0x10004000);
-    sysbus_connect_irq(sysbus_from_qdev(pl041), 0, pic[19]);
+    sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000);
+    sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]);

    sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]);
    sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]);
@ -215,7 +215,7 @@ static void realview_init(QEMUMachineInitArgs *args,

    if (!is_pb) {
        dev = qdev_create(NULL, "realview_pci");
-        busdev = sysbus_from_qdev(dev);
+        busdev = SYS_BUS_DEVICE(dev);
        qdev_init_nofail(dev);
        sysbus_mmio_map(busdev, 0, 0x61000000); /* PCI self-config */
        sysbus_mmio_map(busdev, 1, 0x62000000); /* PCI config */
--- a/hw/realview_gic.c
+++ b/hw/realview_gic.c
@ -35,7 +35,7 @@ static int realview_gic_init(SysBusDevice *dev)
    qdev_prop_set_uint32(s->gic, "num-cpu", 1);
    qdev_prop_set_uint32(s->gic, "num-irq", numirq);
    qdev_init_nofail(s->gic);
-    busdev = sysbus_from_qdev(s->gic);
+    busdev = SYS_BUS_DEVICE(s->gic);

    /* Pass through outbound IRQ lines from the GIC */
    sysbus_pass_irq(dev, busdev);
--- a/hw/slavio_intctl.c
+++ b/hw/slavio_intctl.c
@ -210,7 +210,7 @@ void slavio_pic_info(Monitor *mon, DeviceState *dev)
    SLAVIO_INTCTLState *s;
    int i;

-    sd = sysbus_from_qdev(dev);
+    sd = SYS_BUS_DEVICE(dev);
    s = FROM_SYSBUS(SLAVIO_INTCTLState, sd);
    for (i = 0; i < MAX_CPUS; i++) {
        monitor_printf(mon, "per-cpu %d: pending 0x%08x\n", i,
@ -230,7 +230,7 @@ void slavio_irq_info(Monitor *mon, DeviceState *dev)
    int i;
    int64_t count;

-    sd = sysbus_from_qdev(dev);
+    sd = SYS_BUS_DEVICE(dev);
    s = FROM_SYSBUS(SLAVIO_INTCTLState, sd);
    monitor_printf(mon, "IRQ statistics:\n");
    for (i = 0; i < 32; i++) {
--- a/hw/sm501.c
+++ b/hw/sm501.c
@ -1428,9 +1428,9 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
    qdev_prop_set_uint32(dev, "num-ports", 2);
    qdev_prop_set_taddr(dev, "dma-offset", base);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0,
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0,
                    base + MMIO_BASE_OFFSET + SM501_USB_HOST);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

    /* bridge to serial emulation module */
    if (chr) {
--- a/hw/smc91c111.c
+++ b/hw/smc91c111.c
@ -254,7 +254,7 @@ static void smc91c111_queue_tx(smc91c111_state *s, int packet)

 static void smc91c111_reset(DeviceState *dev)
 {
-    smc91c111_state *s = FROM_SYSBUS(smc91c111_state, sysbus_from_qdev(dev));
+    smc91c111_state *s = FROM_SYSBUS(smc91c111_state, SYS_BUS_DEVICE(dev));
    s->bank = 0;
    s->tx_fifo_len = 0;
    s->tx_fifo_done_len = 0;
@ -797,7 +797,7 @@ void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq)
    dev = qdev_create(NULL, "smc91c111");
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(s, 0, base);
    sysbus_connect_irq(s, 0, irq);
 }
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@ -597,7 +597,7 @@ static int spapr_phb_init(SysBusDevice *s)

 static void spapr_phb_reset(DeviceState *qdev)
 {
-    SysBusDevice *s = sysbus_from_qdev(qdev);
+    SysBusDevice *s = SYS_BUS_DEVICE(qdev);
    sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s);

    /* Reset the IOMMU state */
--- a/hw/spitz.c
+++ b/hw/spitz.c
@ -156,7 +156,7 @@ static void sl_flash_register(PXA2xxState *cpu, int size)
        qdev_prop_set_uint8(dev, "chip_id", 0xf1);

    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, FLASH_BASE);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 }

 static int sl_nand_init(SysBusDevice *dev) {
@ -459,7 +459,7 @@ static void spitz_keyboard_register(PXA2xxState *cpu)
    SpitzKeyboardState *s;

    dev = sysbus_create_simple("spitz-keyboard", -1, NULL);
-    s = FROM_SYSBUS(SpitzKeyboardState, sysbus_from_qdev(dev));
+    s = FROM_SYSBUS(SpitzKeyboardState, SYS_BUS_DEVICE(dev));

    for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
        qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@ -1286,8 +1286,8 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
        enet = qdev_create(NULL, "stellaris_enet");
        qdev_set_nic_properties(enet, &nd_table[0]);
        qdev_init_nofail(enet);
-        sysbus_mmio_map(sysbus_from_qdev(enet), 0, 0x40048000);
-        sysbus_connect_irq(sysbus_from_qdev(enet), 0, pic[42]);
+        sysbus_mmio_map(SYS_BUS_DEVICE(enet), 0, 0x40048000);
+        sysbus_connect_irq(SYS_BUS_DEVICE(enet), 0, pic[42]);
    }
    if (board->peripherals & BP_GAMEPAD) {
        qemu_irq gpad_irq[5];
--- a/hw/strongarm.c
+++ b/hw/strongarm.c
@ -619,9 +619,9 @@ static DeviceState *strongarm_gpio_init(hwaddr base,
    dev = qdev_create(NULL, "strongarm-gpio");
    qdev_init_nofail(dev);

-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
    for (i = 0; i < 12; i++)
-        sysbus_connect_irq(sysbus_from_qdev(dev), i,
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
                    qdev_get_gpio_in(pic, SA_PIC_GPIO0_EDGE + i));

    return dev;
@ -1597,9 +1597,9 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
        DeviceState *dev = qdev_create(NULL, "strongarm-uart");
        qdev_prop_set_chr(dev, "chardev", serial_hds[i]);
        qdev_init_nofail(dev);
-        sysbus_mmio_map(sysbus_from_qdev(dev), 0,
+        sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0,
                sa_serial[i].io_base);
-        sysbus_connect_irq(sysbus_from_qdev(dev), 0,
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
                qdev_get_gpio_in(s->pic, sa_serial[i].irq));
    }

--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@ -381,7 +381,7 @@ static void *iommu_init(hwaddr addr, uint32_t version, qemu_irq irq)
    dev = qdev_create(NULL, "iommu");
    qdev_prop_set_uint32(dev, "version", version);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, irq);
    sysbus_mmio_map(s, 0, addr);

@ -398,7 +398,7 @@ static void *sparc32_dma_init(hwaddr daddr, qemu_irq parent_irq,
    qdev_prop_set_ptr(dev, "iommu_opaque", iommu);
    qdev_prop_set_uint32(dev, "is_ledma", is_ledma);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, parent_irq);
    *dev_irq = qdev_get_gpio_in(dev, 0);
    sysbus_mmio_map(s, 0, daddr);
@ -419,7 +419,7 @@ static void lance_init(NICInfo *nd, hwaddr leaddr,
    qdev_set_nic_properties(dev, nd);
    qdev_prop_set_ptr(dev, "dma", dma_opaque);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(s, 0, leaddr);
    sysbus_connect_irq(s, 0, irq);
    reset = qdev_get_gpio_in(dev, 0);
@ -437,7 +437,7 @@ static DeviceState *slavio_intctl_init(hwaddr addr,
    dev = qdev_create(NULL, "slavio_intctl");
    qdev_init_nofail(dev);

-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    for (i = 0; i < MAX_CPUS; i++) {
        for (j = 0; j < MAX_PILS; j++) {
@ -465,7 +465,7 @@ static void slavio_timer_init_all(hwaddr addr, qemu_irq master_irq,
    dev = qdev_create(NULL, "slavio_timer");
    qdev_prop_set_uint32(dev, "num_cpus", num_cpus);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, master_irq);
    sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET);

@ -502,7 +502,7 @@ static void slavio_misc_init(hwaddr base,

    dev = qdev_create(NULL, "slavio_misc");
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    if (base) {
        /* 8 bit registers */
        /* Slavio control */
@ -540,7 +540,7 @@ static void ecc_init(hwaddr base, qemu_irq irq, uint32_t version)
    dev = qdev_create(NULL, "eccmemctl");
    qdev_prop_set_uint32(dev, "version", version);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, irq);
    sysbus_mmio_map(s, 0, base);
    if (version == 0) { // SS-600MP only
@ -555,7 +555,7 @@ static void apc_init(hwaddr power_base, qemu_irq cpu_halt)

    dev = qdev_create(NULL, "apc");
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    /* Power management (APC) XXX: not a Slavio device */
    sysbus_mmio_map(s, 0, power_base);
    sysbus_connect_irq(s, 0, cpu_halt);
@ -574,7 +574,7 @@ static void tcx_init(hwaddr addr, int vram_size, int width,
    qdev_prop_set_uint16(dev, "height", height);
    qdev_prop_set_uint16(dev, "depth", depth);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    /* 8-bit plane */
    sysbus_mmio_map(s, 0, addr + 0x00800000ULL);
    /* DAC */
@ -604,7 +604,7 @@ static void idreg_init(hwaddr addr)

    dev = qdev_create(NULL, "macio_idreg");
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    sysbus_mmio_map(s, 0, addr);
    cpu_physical_memory_write_rom(addr, idreg_data, sizeof(idreg_data));
@ -653,7 +653,7 @@ static void afx_init(hwaddr addr)

    dev = qdev_create(NULL, "tcx_afx");
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    sysbus_mmio_map(s, 0, addr);
 }
@ -703,7 +703,7 @@ static void prom_init(hwaddr addr, const char *bios_name)

    dev = qdev_create(NULL, "openprom");
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    sysbus_mmio_map(s, 0, addr);

@ -793,7 +793,7 @@ static void ram_init(hwaddr addr, ram_addr_t RAM_size,
        exit(1);
    }
    dev = qdev_create(NULL, "memory");
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    d = FROM_SYSBUS(RamDevice, s);
    d->size = RAM_size;
@ -1560,7 +1560,7 @@ static DeviceState *sbi_init(hwaddr addr, qemu_irq **parent_irq)
    dev = qdev_create(NULL, "sbi");
    qdev_init_nofail(dev);

-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    for (i = 0; i < MAX_CPUS; i++) {
        sysbus_connect_irq(s, i, *parent_irq[i]);
@ -1761,7 +1761,7 @@ static DeviceState *sun4c_intctl_init(hwaddr addr,
    dev = qdev_create(NULL, "sun4c_intctl");
    qdev_init_nofail(dev);

-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    for (i = 0; i < MAX_PILS; i++) {
        sysbus_connect_irq(s, i, parent_irq[i]);
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@ -646,7 +646,7 @@ static void prom_init(hwaddr addr, const char *bios_name)

    dev = qdev_create(NULL, "openprom");
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    sysbus_mmio_map(s, 0, addr);

@ -729,7 +729,7 @@ static void ram_init(hwaddr addr, ram_addr_t RAM_size)

    /* allocate RAM */
    dev = qdev_create(NULL, "memory");
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);

    d = FROM_SYSBUS(RamDevice, s);
    d->size = RAM_size;
--- a/hw/sysbus.c
+++ b/hw/sysbus.c
@ -131,7 +131,7 @@ DeviceState *sysbus_create_varargs(const char *name,
    int n;

    dev = qdev_create(NULL, name);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    qdev_init_nofail(dev);
    if (addr != (hwaddr)-1) {
        sysbus_mmio_map(s, 0, addr);
@ -163,7 +163,7 @@ DeviceState *sysbus_try_create_varargs(const char *name,
    if (!dev) {
        return NULL;
    }
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    qdev_init_nofail(dev);
    if (addr != (hwaddr)-1) {
        sysbus_mmio_map(s, 0, addr);
@ -184,7 +184,7 @@ DeviceState *sysbus_try_create_varargs(const char *name,

 static void sysbus_dev_print(Monitor *mon, DeviceState *dev, int indent)
 {
-    SysBusDevice *s = sysbus_from_qdev(dev);
+    SysBusDevice *s = SYS_BUS_DEVICE(dev);
    hwaddr size;
    int i;

@ -198,7 +198,7 @@ static void sysbus_dev_print(Monitor *mon, DeviceState *dev, int indent)

 static char *sysbus_get_fw_dev_path(DeviceState *dev)
 {
-    SysBusDevice *s = sysbus_from_qdev(dev);
+    SysBusDevice *s = SYS_BUS_DEVICE(dev);
    char path[40];
    int off;

--- a/hw/sysbus.h
+++ b/hw/sysbus.h
@ -44,7 +44,6 @@ struct SysBusDevice {
 };

 /* Macros to compensate for lack of type inheritance in C.  */
-#define sysbus_from_qdev(dev) ((SysBusDevice *)(dev))
 #define FROM_SYSBUS(type, dev) DO_UPCAST(type, busdev, dev)

 void *sysbus_new(void);
--- a/hw/tusb6010.c
+++ b/hw/tusb6010.c
@ -740,7 +740,7 @@ static void tusb6010_irq(void *opaque, int source, int level)

 static void tusb6010_reset(DeviceState *dev)
 {
-    TUSBState *s = FROM_SYSBUS(TUSBState, sysbus_from_qdev(dev));
+    TUSBState *s = FROM_SYSBUS(TUSBState, SYS_BUS_DEVICE(dev));
    int i;

    s->test_reset = TUSB_PROD_TEST_RESET_VAL;
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@ -203,7 +203,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
    qdev_prop_set_uint32(sysctl, "sys_id", 0x41007004);
    qdev_prop_set_uint32(sysctl, "proc_id", 0x02000000);
    qdev_init_nofail(sysctl);
-    sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, 0x10000000);
+    sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);

    cpu_pic = arm_pic_init_cpu(cpu);
    dev = sysbus_create_varargs("pl190", 0x10140000,
@ -214,7 +214,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
    }
    dev = sysbus_create_simple("versatilepb_sic", 0x10003000, NULL);
    for (n = 0; n < 32; n++) {
-        sysbus_connect_irq(sysbus_from_qdev(dev), n, pic[n]);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), n, pic[n]);
        sic[n] = qdev_get_gpio_in(dev, n);
    }

@ -222,7 +222,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
    sysbus_create_simple("pl050_mouse", 0x10007000, sic[4]);

    dev = qdev_create(NULL, "versatile_pci");
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    qdev_init_nofail(dev);
    sysbus_mmio_map(busdev, 0, 0x41000000); /* PCI self-config */
    sysbus_mmio_map(busdev, 1, 0x42000000); /* PCI config */
@ -287,8 +287,8 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
    pl041 = qdev_create(NULL, "pl041");
    qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
    qdev_init_nofail(pl041);
-    sysbus_mmio_map(sysbus_from_qdev(pl041), 0, 0x10004000);
-    sysbus_connect_irq(sysbus_from_qdev(pl041), 0, sic[24]);
+    sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000);
+    sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, sic[24]);

    /* Memory map for Versatile/PB:  */
    /* 0x10000000 System registers.  */
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@ -211,7 +211,7 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
    dev = qdev_create(NULL, "a9mpcore_priv");
    qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, 0x1e000000);
    for (n = 0; n < smp_cpus; n++) {
        sysbus_connect_irq(busdev, n, cpu_irq[n]);
@ -307,7 +307,7 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
    dev = qdev_create(NULL, "a15mpcore_priv");
    qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, 0x2c000000);
    for (n = 0; n < smp_cpus; n++) {
        sysbus_connect_irq(busdev, n, cpu_irq[n]);
@ -374,7 +374,7 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
    qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
    qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
    qdev_init_nofail(sysctl);
-    sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, map[VE_SYSREGS]);
+    sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]);

    /* VE_SP810: not modelled */
    /* VE_SERIALPCI: not modelled */
@ -382,8 +382,8 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
    pl041 = qdev_create(NULL, "pl041");
    qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
    qdev_init_nofail(pl041);
-    sysbus_mmio_map(sysbus_from_qdev(pl041), 0, map[VE_PL041]);
-    sysbus_connect_irq(sysbus_from_qdev(pl041), 0, pic[11]);
+    sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, map[VE_PL041]);
+    sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[11]);

    dev = sysbus_create_varargs("pl181", map[VE_MMCI], pic[9], pic[10], NULL);
    /* Wire up MMC card detect and read-only signals */
--- a/hw/xilinx.h
+++ b/hw/xilinx.h
@ -14,8 +14,8 @@ xilinx_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
    dev = qdev_create(NULL, "xlnx.xps-intc");
    qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
    return dev;
 }

@ -29,8 +29,8 @@ xilinx_timer_create(hwaddr base, qemu_irq irq, int oto, int freq)
    qdev_prop_set_uint32(dev, "one-timer-only", oto);
    qdev_prop_set_uint32(dev, "clock-frequency", freq);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
    return dev;
 }

@ -48,8 +48,8 @@ xilinx_ethlite_create(NICInfo *nd, hwaddr base, qemu_irq irq,
    qdev_prop_set_uint32(dev, "tx-ping-pong", txpingpong);
    qdev_prop_set_uint32(dev, "rx-ping-pong", rxpingpong);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
    return dev;
 }

@ -71,8 +71,8 @@ xilinx_axiethernet_create(NICInfo *nd, StreamSlave *peer,
                             &errp);
    assert_no_error(errp);
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

    return dev;
 }
@ -90,9 +90,9 @@ xilinx_axiethernetdma_init(DeviceState *dev, StreamSlave *peer,
    assert_no_error(errp);
    qdev_init_nofail(dev);

-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
-    sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq2);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, irq2);
 }

 #endif
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@ -46,7 +46,7 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq)
    dev = qdev_create(NULL, "cadence_gem");
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);
-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(s, 0, base);
    sysbus_connect_irq(s, 0, irq);
 }
@ -67,7 +67,7 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq,
    qdev_prop_set_uint8(dev, "num-ss-bits", num_ss);
    qdev_prop_set_uint8(dev, "num-busses", num_busses);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, base_addr);
    if (is_qspi) {
        sysbus_mmio_map(busdev, 1, 0xFC000000);
@ -150,12 +150,12 @@ static void zynq_init(QEMUMachineInitArgs *args)

    dev = qdev_create(NULL, "xilinx,zynq_slcr");
    qdev_init_nofail(dev);
-    sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0xF8000000);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8000000);

    dev = qdev_create(NULL, "a9mpcore_priv");
    qdev_prop_set_uint32(dev, "num-cpu", 1);
    qdev_init_nofail(dev);
-    busdev = sysbus_from_qdev(dev);
+    busdev = SYS_BUS_DEVICE(dev);
    sysbus_mmio_map(busdev, 0, 0xF8F00000);
    sysbus_connect_irq(busdev, 0, cpu_irq);

--- a/hw/xtensa_lx60.c
+++ b/hw/xtensa_lx60.c
@ -131,7 +131,7 @@ static void lx60_net_init(MemoryRegion *address_space,
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);

-    s = sysbus_from_qdev(dev);
+    s = SYS_BUS_DEVICE(dev);
    sysbus_connect_irq(s, 0, irq);
    memory_region_add_subregion(address_space, base,
            sysbus_mmio_get_region(s, 0));
--- a/hw/zynq_slcr.c
+++ b/hw/zynq_slcr.c
@ -160,7 +160,7 @@ static void zynq_slcr_reset(DeviceState *d)
 {
    int i;
    ZynqSLCRState *s =
-            FROM_SYSBUS(ZynqSLCRState, sysbus_from_qdev(d));
+            FROM_SYSBUS(ZynqSLCRState, SYS_BUS_DEVICE(d));

    DB_PRINT("RESET\n");

--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@ -2134,7 +2134,7 @@ static void x86_cpu_apic_init(X86CPU *cpu, Error **errp)
        /* NOTE: the APIC is directly connected to the CPU - it is not
           on the global memory bus. */
        /* XXX: what if the base changes? */
-        sysbus_mmio_map(sysbus_from_qdev(env->apic_state), 0, MSI_ADDR_BASE);
+        sysbus_mmio_map(SYS_BUS_DEVICE(env->apic_state), 0, MSI_ADDR_BASE);
        apic_mapped = 1;
    }
 }